Commit 8edbdefe authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson

arm64: dts: qcom: sm8350: Fix UFS PHY clocks

QMP PHY used in SM8350 requires 3 clocks:

* ref - 19.2MHz reference clock from RPMh
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from GCC

While at it, let's move 'clocks' property before 'clock-names' to match
the style used commonly.

Fixes: 59c7cf81 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-15-58a49d2f4605@linaro.orgSigned-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 1d4ef964
...@@ -1746,10 +1746,12 @@ ufs_mem_phy: phy@1d87000 { ...@@ -1746,10 +1746,12 @@ ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8350-qmp-ufs-phy"; compatible = "qcom,sm8350-qmp-ufs-phy";
reg = <0 0x01d87000 0 0x1000>; reg = <0 0x01d87000 0 0x1000>;
clock-names = "ref",
"ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>, clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>; <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
<&gcc GCC_UFS_1_CLKREF_EN>;
clock-names = "ref",
"ref_aux",
"qref";
resets = <&ufs_mem_hc 0>; resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy"; reset-names = "ufsphy";
......
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