Commit 8f585d14 authored by Kartik's avatar Kartik Committed by Jassi Brar

mailbox: tegra-hsp: Add tegra_hsp_sm_ops

This patch introduces tegra_hsp_sm_ops to abstract send & receive
API's for shared mailboxes.
Signed-off-by: default avatarKartik <kkartik@nvidia.com>
Signed-off-by: default avatarJassi Brar <jaswinder.singh@linaro.org>
parent 1b3418ac
...@@ -67,8 +67,14 @@ struct tegra_hsp_doorbell { ...@@ -67,8 +67,14 @@ struct tegra_hsp_doorbell {
unsigned int index; unsigned int index;
}; };
struct tegra_hsp_sm_ops {
void (*send)(struct tegra_hsp_channel *channel, void *data);
void (*recv)(struct tegra_hsp_channel *channel);
};
struct tegra_hsp_mailbox { struct tegra_hsp_mailbox {
struct tegra_hsp_channel channel; struct tegra_hsp_channel channel;
const struct tegra_hsp_sm_ops *ops;
unsigned int index; unsigned int index;
bool producer; bool producer;
}; };
...@@ -208,8 +214,7 @@ static irqreturn_t tegra_hsp_shared_irq(int irq, void *data) ...@@ -208,8 +214,7 @@ static irqreturn_t tegra_hsp_shared_irq(int irq, void *data)
{ {
struct tegra_hsp *hsp = data; struct tegra_hsp *hsp = data;
unsigned long bit, mask; unsigned long bit, mask;
u32 status, value; u32 status;
void *msg;
status = tegra_hsp_readl(hsp, HSP_INT_IR) & hsp->mask; status = tegra_hsp_readl(hsp, HSP_INT_IR) & hsp->mask;
...@@ -245,25 +250,8 @@ static irqreturn_t tegra_hsp_shared_irq(int irq, void *data) ...@@ -245,25 +250,8 @@ static irqreturn_t tegra_hsp_shared_irq(int irq, void *data)
for_each_set_bit(bit, &mask, hsp->num_sm) { for_each_set_bit(bit, &mask, hsp->num_sm) {
struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit];
if (!mb->producer) { if (!mb->producer)
value = tegra_hsp_channel_readl(&mb->channel, mb->ops->recv(&mb->channel);
HSP_SM_SHRD_MBOX);
value &= ~HSP_SM_SHRD_MBOX_FULL;
msg = (void *)(unsigned long)value;
mbox_chan_received_data(mb->channel.chan, msg);
/*
* Need to clear all bits here since some producers,
* such as TCU, depend on fields in the register
* getting cleared by the consumer.
*
* The mailbox API doesn't give the consumers a way
* of doing that explicitly, so we have to make sure
* we cover all possible cases.
*/
tegra_hsp_channel_writel(&mb->channel, 0x0,
HSP_SM_SHRD_MBOX);
}
} }
return IRQ_HANDLED; return IRQ_HANDLED;
...@@ -372,21 +360,52 @@ static const struct mbox_chan_ops tegra_hsp_db_ops = { ...@@ -372,21 +360,52 @@ static const struct mbox_chan_ops tegra_hsp_db_ops = {
.shutdown = tegra_hsp_doorbell_shutdown, .shutdown = tegra_hsp_doorbell_shutdown,
}; };
static void tegra_hsp_sm_send32(struct tegra_hsp_channel *channel, void *data)
{
u32 value;
/* copy data and mark mailbox full */
value = (u32)(unsigned long)data;
value |= HSP_SM_SHRD_MBOX_FULL;
tegra_hsp_channel_writel(channel, value, HSP_SM_SHRD_MBOX);
}
static void tegra_hsp_sm_recv32(struct tegra_hsp_channel *channel)
{
u32 value;
void *msg;
value = tegra_hsp_channel_readl(channel, HSP_SM_SHRD_MBOX);
value &= ~HSP_SM_SHRD_MBOX_FULL;
msg = (void *)(unsigned long)value;
mbox_chan_received_data(channel->chan, msg);
/*
* Need to clear all bits here since some producers, such as TCU, depend
* on fields in the register getting cleared by the consumer.
*
* The mailbox API doesn't give the consumers a way of doing that
* explicitly, so we have to make sure we cover all possible cases.
*/
tegra_hsp_channel_writel(channel, 0x0, HSP_SM_SHRD_MBOX);
}
static const struct tegra_hsp_sm_ops tegra_hsp_sm_32bit_ops = {
.send = tegra_hsp_sm_send32,
.recv = tegra_hsp_sm_recv32,
};
static int tegra_hsp_mailbox_send_data(struct mbox_chan *chan, void *data) static int tegra_hsp_mailbox_send_data(struct mbox_chan *chan, void *data)
{ {
struct tegra_hsp_mailbox *mb = chan->con_priv; struct tegra_hsp_mailbox *mb = chan->con_priv;
struct tegra_hsp *hsp = mb->channel.hsp; struct tegra_hsp *hsp = mb->channel.hsp;
unsigned long flags; unsigned long flags;
u32 value;
if (WARN_ON(!mb->producer)) if (WARN_ON(!mb->producer))
return -EPERM; return -EPERM;
/* copy data and mark mailbox full */ mb->ops->send(&mb->channel, data);
value = (u32)(unsigned long)data;
value |= HSP_SM_SHRD_MBOX_FULL;
tegra_hsp_channel_writel(&mb->channel, value, HSP_SM_SHRD_MBOX);
/* enable EMPTY interrupt for the shared mailbox */ /* enable EMPTY interrupt for the shared mailbox */
spin_lock_irqsave(&hsp->lock, flags); spin_lock_irqsave(&hsp->lock, flags);
...@@ -557,6 +576,7 @@ static struct mbox_chan *tegra_hsp_sm_xlate(struct mbox_controller *mbox, ...@@ -557,6 +576,7 @@ static struct mbox_chan *tegra_hsp_sm_xlate(struct mbox_controller *mbox,
return ERR_PTR(-ENODEV); return ERR_PTR(-ENODEV);
mb = &hsp->mailboxes[index]; mb = &hsp->mailboxes[index];
mb->ops = &tegra_hsp_sm_32bit_ops;
if ((args->args[1] & TEGRA_HSP_SM_FLAG_TX) == 0) if ((args->args[1] & TEGRA_HSP_SM_FLAG_TX) == 0)
mb->producer = false; mb->producer = false;
......
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