Commit 8f778bbc authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "One drm core fix, one exynos regression fix, two sets of radeon fixes
  (Alex was a bit behind last week), and two i915 fixes.

  Nothing too serious we seem to have calmed down i915 since last week"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon: fix wait in radeon_mn_invalidate_range_start
  drm/radeon: add extra check in radeon_ttm_tt_unpin_userptr
  drm: Exynos: Respect framebuffer pitch for FIMD/Mixer
  drm/i915: Reject the colorkey ioctls for primary and cursor planes
  drm/i915: Skip allocating shadow batch for 0-length batches
  drm/radeon: programm the VCE fw BAR as well
  drm/radeon: always dump the ring content if it's available
  radeon: Do not directly dereference pointers to BIOS area.
  drm/radeon/dpm: fix 120hz handling harder
  drm/edid: set ELD for firmware and debugfs override EDIDs
parents 4e8a4830 51b52fac
...@@ -287,6 +287,7 @@ int drm_load_edid_firmware(struct drm_connector *connector) ...@@ -287,6 +287,7 @@ int drm_load_edid_firmware(struct drm_connector *connector)
drm_mode_connector_update_edid_property(connector, edid); drm_mode_connector_update_edid_property(connector, edid);
ret = drm_add_edid_modes(connector, edid); ret = drm_add_edid_modes(connector, edid);
drm_edid_to_eld(connector, edid);
kfree(edid); kfree(edid);
return ret; return ret;
......
...@@ -174,6 +174,7 @@ static int drm_helper_probe_single_connector_modes_merge_bits(struct drm_connect ...@@ -174,6 +174,7 @@ static int drm_helper_probe_single_connector_modes_merge_bits(struct drm_connect
struct edid *edid = (struct edid *) connector->edid_blob_ptr->data; struct edid *edid = (struct edid *) connector->edid_blob_ptr->data;
count = drm_add_edid_modes(connector, edid); count = drm_add_edid_modes(connector, edid);
drm_edid_to_eld(connector, edid);
} else } else
count = (*connector_funcs->get_modes)(connector); count = (*connector_funcs->get_modes)(connector);
} }
......
...@@ -147,6 +147,7 @@ struct fimd_win_data { ...@@ -147,6 +147,7 @@ struct fimd_win_data {
unsigned int ovl_height; unsigned int ovl_height;
unsigned int fb_width; unsigned int fb_width;
unsigned int fb_height; unsigned int fb_height;
unsigned int fb_pitch;
unsigned int bpp; unsigned int bpp;
unsigned int pixel_format; unsigned int pixel_format;
dma_addr_t dma_addr; dma_addr_t dma_addr;
...@@ -532,13 +533,14 @@ static void fimd_win_mode_set(struct exynos_drm_crtc *crtc, ...@@ -532,13 +533,14 @@ static void fimd_win_mode_set(struct exynos_drm_crtc *crtc,
win_data->offset_y = plane->crtc_y; win_data->offset_y = plane->crtc_y;
win_data->ovl_width = plane->crtc_width; win_data->ovl_width = plane->crtc_width;
win_data->ovl_height = plane->crtc_height; win_data->ovl_height = plane->crtc_height;
win_data->fb_pitch = plane->pitch;
win_data->fb_width = plane->fb_width; win_data->fb_width = plane->fb_width;
win_data->fb_height = plane->fb_height; win_data->fb_height = plane->fb_height;
win_data->dma_addr = plane->dma_addr[0] + offset; win_data->dma_addr = plane->dma_addr[0] + offset;
win_data->bpp = plane->bpp; win_data->bpp = plane->bpp;
win_data->pixel_format = plane->pixel_format; win_data->pixel_format = plane->pixel_format;
win_data->buf_offsize = (plane->fb_width - plane->crtc_width) * win_data->buf_offsize =
(plane->bpp >> 3); plane->pitch - (plane->crtc_width * (plane->bpp >> 3));
win_data->line_size = plane->crtc_width * (plane->bpp >> 3); win_data->line_size = plane->crtc_width * (plane->bpp >> 3);
DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n", DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
...@@ -704,7 +706,7 @@ static void fimd_win_commit(struct exynos_drm_crtc *crtc, int zpos) ...@@ -704,7 +706,7 @@ static void fimd_win_commit(struct exynos_drm_crtc *crtc, int zpos)
writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
/* buffer end address */ /* buffer end address */
size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3); size = win_data->fb_pitch * win_data->ovl_height * (win_data->bpp >> 3);
val = (unsigned long)(win_data->dma_addr + size); val = (unsigned long)(win_data->dma_addr + size);
writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
......
...@@ -55,6 +55,7 @@ struct hdmi_win_data { ...@@ -55,6 +55,7 @@ struct hdmi_win_data {
unsigned int fb_x; unsigned int fb_x;
unsigned int fb_y; unsigned int fb_y;
unsigned int fb_width; unsigned int fb_width;
unsigned int fb_pitch;
unsigned int fb_height; unsigned int fb_height;
unsigned int src_width; unsigned int src_width;
unsigned int src_height; unsigned int src_height;
...@@ -438,7 +439,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) ...@@ -438,7 +439,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
} else { } else {
luma_addr[0] = win_data->dma_addr; luma_addr[0] = win_data->dma_addr;
chroma_addr[0] = win_data->dma_addr chroma_addr[0] = win_data->dma_addr
+ (win_data->fb_width * win_data->fb_height); + (win_data->fb_pitch * win_data->fb_height);
} }
if (win_data->scan_flags & DRM_MODE_FLAG_INTERLACE) { if (win_data->scan_flags & DRM_MODE_FLAG_INTERLACE) {
...@@ -447,8 +448,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) ...@@ -447,8 +448,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
luma_addr[1] = luma_addr[0] + 0x40; luma_addr[1] = luma_addr[0] + 0x40;
chroma_addr[1] = chroma_addr[0] + 0x40; chroma_addr[1] = chroma_addr[0] + 0x40;
} else { } else {
luma_addr[1] = luma_addr[0] + win_data->fb_width; luma_addr[1] = luma_addr[0] + win_data->fb_pitch;
chroma_addr[1] = chroma_addr[0] + win_data->fb_width; chroma_addr[1] = chroma_addr[0] + win_data->fb_pitch;
} }
} else { } else {
ctx->interlace = false; ctx->interlace = false;
...@@ -469,10 +470,10 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) ...@@ -469,10 +470,10 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK); vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK);
/* setting size of input image */ /* setting size of input image */
vp_reg_write(res, VP_IMG_SIZE_Y, VP_IMG_HSIZE(win_data->fb_width) | vp_reg_write(res, VP_IMG_SIZE_Y, VP_IMG_HSIZE(win_data->fb_pitch) |
VP_IMG_VSIZE(win_data->fb_height)); VP_IMG_VSIZE(win_data->fb_height));
/* chroma height has to reduced by 2 to avoid chroma distorions */ /* chroma height has to reduced by 2 to avoid chroma distorions */
vp_reg_write(res, VP_IMG_SIZE_C, VP_IMG_HSIZE(win_data->fb_width) | vp_reg_write(res, VP_IMG_SIZE_C, VP_IMG_HSIZE(win_data->fb_pitch) |
VP_IMG_VSIZE(win_data->fb_height / 2)); VP_IMG_VSIZE(win_data->fb_height / 2));
vp_reg_write(res, VP_SRC_WIDTH, win_data->src_width); vp_reg_write(res, VP_SRC_WIDTH, win_data->src_width);
...@@ -559,7 +560,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) ...@@ -559,7 +560,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win)
/* converting dma address base and source offset */ /* converting dma address base and source offset */
dma_addr = win_data->dma_addr dma_addr = win_data->dma_addr
+ (win_data->fb_x * win_data->bpp >> 3) + (win_data->fb_x * win_data->bpp >> 3)
+ (win_data->fb_y * win_data->fb_width * win_data->bpp >> 3); + (win_data->fb_y * win_data->fb_pitch);
src_x_offset = 0; src_x_offset = 0;
src_y_offset = 0; src_y_offset = 0;
...@@ -576,7 +577,8 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) ...@@ -576,7 +577,8 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win)
MXR_GRP_CFG_FORMAT_VAL(fmt), MXR_GRP_CFG_FORMAT_MASK); MXR_GRP_CFG_FORMAT_VAL(fmt), MXR_GRP_CFG_FORMAT_MASK);
/* setup geometry */ /* setup geometry */
mixer_reg_write(res, MXR_GRAPHIC_SPAN(win), win_data->fb_width); mixer_reg_write(res, MXR_GRAPHIC_SPAN(win),
win_data->fb_pitch / (win_data->bpp >> 3));
/* setup display size */ /* setup display size */
if (ctx->mxr_ver == MXR_VER_128_0_0_184 && if (ctx->mxr_ver == MXR_VER_128_0_0_184 &&
...@@ -961,6 +963,7 @@ static void mixer_win_mode_set(struct exynos_drm_crtc *crtc, ...@@ -961,6 +963,7 @@ static void mixer_win_mode_set(struct exynos_drm_crtc *crtc,
win_data->fb_y = plane->fb_y; win_data->fb_y = plane->fb_y;
win_data->fb_width = plane->fb_width; win_data->fb_width = plane->fb_width;
win_data->fb_height = plane->fb_height; win_data->fb_height = plane->fb_height;
win_data->fb_pitch = plane->pitch;
win_data->src_width = plane->src_width; win_data->src_width = plane->src_width;
win_data->src_height = plane->src_height; win_data->src_height = plane->src_height;
......
...@@ -1487,7 +1487,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, ...@@ -1487,7 +1487,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
goto err; goto err;
} }
if (i915_needs_cmd_parser(ring)) { if (i915_needs_cmd_parser(ring) && args->batch_len) {
batch_obj = i915_gem_execbuffer_parse(ring, batch_obj = i915_gem_execbuffer_parse(ring,
&shadow_exec_entry, &shadow_exec_entry,
eb, eb,
......
...@@ -1322,7 +1322,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, ...@@ -1322,7 +1322,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
drm_modeset_lock_all(dev); drm_modeset_lock_all(dev);
plane = drm_plane_find(dev, set->plane_id); plane = drm_plane_find(dev, set->plane_id);
if (!plane) { if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY) {
ret = -ENOENT; ret = -ENOENT;
goto out_unlock; goto out_unlock;
} }
...@@ -1349,7 +1349,7 @@ int intel_sprite_get_colorkey(struct drm_device *dev, void *data, ...@@ -1349,7 +1349,7 @@ int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
drm_modeset_lock_all(dev); drm_modeset_lock_all(dev);
plane = drm_plane_find(dev, get->plane_id); plane = drm_plane_find(dev, get->plane_id);
if (!plane) { if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY) {
ret = -ENOENT; ret = -ENOENT;
goto out_unlock; goto out_unlock;
} }
......
...@@ -2129,6 +2129,7 @@ ...@@ -2129,6 +2129,7 @@
#define VCE_UENC_REG_CLOCK_GATING 0x207c0 #define VCE_UENC_REG_CLOCK_GATING 0x207c0
#define VCE_SYS_INT_EN 0x21300 #define VCE_SYS_INT_EN 0x21300
# define VCE_SYS_INT_TRAP_INTERRUPT_EN (1 << 3) # define VCE_SYS_INT_TRAP_INTERRUPT_EN (1 << 3)
#define VCE_LMI_VCPU_CACHE_40BIT_BAR 0x2145c
#define VCE_LMI_CTRL2 0x21474 #define VCE_LMI_CTRL2 0x21474
#define VCE_LMI_CTRL 0x21498 #define VCE_LMI_CTRL 0x21498
#define VCE_LMI_VM_CTRL 0x214a0 #define VCE_LMI_VM_CTRL 0x214a0
......
...@@ -1565,6 +1565,7 @@ struct radeon_dpm { ...@@ -1565,6 +1565,7 @@ struct radeon_dpm {
int new_active_crtc_count; int new_active_crtc_count;
u32 current_active_crtcs; u32 current_active_crtcs;
int current_active_crtc_count; int current_active_crtc_count;
bool single_display;
struct radeon_dpm_dynamic_state dyn_state; struct radeon_dpm_dynamic_state dyn_state;
struct radeon_dpm_fan fan; struct radeon_dpm_fan fan;
u32 tdp_limit; u32 tdp_limit;
......
...@@ -76,7 +76,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) ...@@ -76,7 +76,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)
static bool radeon_read_bios(struct radeon_device *rdev) static bool radeon_read_bios(struct radeon_device *rdev)
{ {
uint8_t __iomem *bios; uint8_t __iomem *bios, val1, val2;
size_t size; size_t size;
rdev->bios = NULL; rdev->bios = NULL;
...@@ -86,15 +86,19 @@ static bool radeon_read_bios(struct radeon_device *rdev) ...@@ -86,15 +86,19 @@ static bool radeon_read_bios(struct radeon_device *rdev)
return false; return false;
} }
if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { val1 = readb(&bios[0]);
val2 = readb(&bios[1]);
if (size == 0 || val1 != 0x55 || val2 != 0xaa) {
pci_unmap_rom(rdev->pdev, bios); pci_unmap_rom(rdev->pdev, bios);
return false; return false;
} }
rdev->bios = kmemdup(bios, size, GFP_KERNEL); rdev->bios = kzalloc(size, GFP_KERNEL);
if (rdev->bios == NULL) { if (rdev->bios == NULL) {
pci_unmap_rom(rdev->pdev, bios); pci_unmap_rom(rdev->pdev, bios);
return false; return false;
} }
memcpy_fromio(rdev->bios, bios, size);
pci_unmap_rom(rdev->pdev, bios); pci_unmap_rom(rdev->pdev, bios);
return true; return true;
} }
......
...@@ -122,7 +122,6 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn, ...@@ -122,7 +122,6 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn,
it = interval_tree_iter_first(&rmn->objects, start, end); it = interval_tree_iter_first(&rmn->objects, start, end);
while (it) { while (it) {
struct radeon_bo *bo; struct radeon_bo *bo;
struct fence *fence;
int r; int r;
bo = container_of(it, struct radeon_bo, mn_it); bo = container_of(it, struct radeon_bo, mn_it);
...@@ -134,12 +133,10 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn, ...@@ -134,12 +133,10 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn,
continue; continue;
} }
fence = reservation_object_get_excl(bo->tbo.resv); r = reservation_object_wait_timeout_rcu(bo->tbo.resv, true,
if (fence) { false, MAX_SCHEDULE_TIMEOUT);
r = radeon_fence_wait((struct radeon_fence *)fence, false); if (r)
if (r) DRM_ERROR("(%d) failed to wait for user bo\n", r);
DRM_ERROR("(%d) failed to wait for user bo\n", r);
}
radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU); radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);
r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
......
...@@ -837,12 +837,8 @@ static void radeon_dpm_thermal_work_handler(struct work_struct *work) ...@@ -837,12 +837,8 @@ static void radeon_dpm_thermal_work_handler(struct work_struct *work)
radeon_pm_compute_clocks(rdev); radeon_pm_compute_clocks(rdev);
} }
static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev, static bool radeon_dpm_single_display(struct radeon_device *rdev)
enum radeon_pm_state_type dpm_state)
{ {
int i;
struct radeon_ps *ps;
u32 ui_class;
bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ?
true : false; true : false;
...@@ -858,6 +854,17 @@ static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev, ...@@ -858,6 +854,17 @@ static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120)) if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120))
single_display = false; single_display = false;
return single_display;
}
static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
enum radeon_pm_state_type dpm_state)
{
int i;
struct radeon_ps *ps;
u32 ui_class;
bool single_display = radeon_dpm_single_display(rdev);
/* certain older asics have a separare 3D performance state, /* certain older asics have a separare 3D performance state,
* so try that first if the user selected performance * so try that first if the user selected performance
*/ */
...@@ -983,6 +990,7 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) ...@@ -983,6 +990,7 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
struct radeon_ps *ps; struct radeon_ps *ps;
enum radeon_pm_state_type dpm_state; enum radeon_pm_state_type dpm_state;
int ret; int ret;
bool single_display = radeon_dpm_single_display(rdev);
/* if dpm init failed */ /* if dpm init failed */
if (!rdev->pm.dpm_enabled) if (!rdev->pm.dpm_enabled)
...@@ -1007,6 +1015,9 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) ...@@ -1007,6 +1015,9 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
/* vce just modifies an existing state so force a change */ /* vce just modifies an existing state so force a change */
if (ps->vce_active != rdev->pm.dpm.vce_active) if (ps->vce_active != rdev->pm.dpm.vce_active)
goto force; goto force;
/* user has made a display change (such as timing) */
if (rdev->pm.dpm.single_display != single_display)
goto force;
if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) { if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) {
/* for pre-BTC and APUs if the num crtcs changed but state is the same, /* for pre-BTC and APUs if the num crtcs changed but state is the same,
* all we need to do is update the display configuration. * all we need to do is update the display configuration.
...@@ -1069,6 +1080,7 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) ...@@ -1069,6 +1080,7 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
rdev->pm.dpm.single_display = single_display;
/* wait for the rings to drain */ /* wait for the rings to drain */
for (i = 0; i < RADEON_NUM_RINGS; i++) { for (i = 0; i < RADEON_NUM_RINGS; i++) {
......
...@@ -495,7 +495,7 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data) ...@@ -495,7 +495,7 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
seq_printf(m, "%u dwords in ring\n", count); seq_printf(m, "%u dwords in ring\n", count);
if (!ring->ready) if (!ring->ring)
return 0; return 0;
/* print 8 dw before current rptr as often it's the last executed /* print 8 dw before current rptr as often it's the last executed
......
...@@ -598,6 +598,10 @@ static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm) ...@@ -598,6 +598,10 @@ static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
enum dma_data_direction direction = write ? enum dma_data_direction direction = write ?
DMA_BIDIRECTIONAL : DMA_TO_DEVICE; DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
/* double check that we don't free the table twice */
if (!ttm->sg->sgl)
return;
/* free the sg table and pages again */ /* free the sg table and pages again */
dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction); dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
......
...@@ -156,6 +156,9 @@ int vce_v2_0_resume(struct radeon_device *rdev) ...@@ -156,6 +156,9 @@ int vce_v2_0_resume(struct radeon_device *rdev)
WREG32(VCE_LMI_SWAP_CNTL1, 0); WREG32(VCE_LMI_SWAP_CNTL1, 0);
WREG32(VCE_LMI_VM_CTRL, 0); WREG32(VCE_LMI_VM_CTRL, 0);
WREG32(VCE_LMI_VCPU_CACHE_40BIT_BAR, addr >> 8);
addr &= 0xff;
size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size); size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size);
WREG32(VCE_VCPU_CACHE_OFFSET0, addr & 0x7fffffff); WREG32(VCE_VCPU_CACHE_OFFSET0, addr & 0x7fffffff);
WREG32(VCE_VCPU_CACHE_SIZE0, size); WREG32(VCE_VCPU_CACHE_SIZE0, size);
......
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