Commit 902d97a4 authored by Yassine Oudjana's avatar Yassine Oudjana Committed by Bjorn Andersson

arm64: dts: qcom: msm8996: Revamp reserved memory

Fix a total overlap between zap_shader_region and slpi_region, and rename
all regions to match the naming convention in other Qualcomm SoC device trees.
Signed-off-by: default avatarYassine Oudjana <y.oudjana@protonmail.com>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210926190555.278589-2-y.oudjana@protonmail.com
parent 0deb2624
...@@ -13,9 +13,10 @@ ...@@ -13,9 +13,10 @@
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-mpp.h> #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
/delete-node/ &slpi_region; /delete-node/ &adsp_mem;
/delete-node/ &venus_region; /delete-node/ &slpi_mem;
/delete-node/ &zap_shader_region; /delete-node/ &venus_mem;
/delete-node/ &gpu_mem;
/ { / {
qcom,msm-id = <246 0x30001>; /* MSM8996 V3.1 (Final) */ qcom,msm-id = <246 0x30001>; /* MSM8996 V3.1 (Final) */
...@@ -46,18 +47,23 @@ cont_splash_mem: memory@83401000 { ...@@ -46,18 +47,23 @@ cont_splash_mem: memory@83401000 {
no-map; no-map;
}; };
zap_shader_region: gpu@90400000 { adsp_mem: adsp@8ea00000 {
reg = <0x0 0x8ea00000 0x0 0x1a00000>;
no-map;
};
gpu_mem: gpu@90400000 {
compatible = "shared-dma-pool"; compatible = "shared-dma-pool";
reg = <0x0 0x90400000 0x0 0x2000>; reg = <0x0 0x90400000 0x0 0x2000>;
no-map; no-map;
}; };
slpi_region: memory@90500000 { slpi_mem: memory@90500000 {
reg = <0 0x90500000 0 0xa00000>; reg = <0 0x90500000 0 0xa00000>;
no-map; no-map;
}; };
venus_region: memory@90f00000 { venus_mem: memory@90f00000 {
reg = <0 0x90f00000 0 0x500000>; reg = <0 0x90f00000 0 0x500000>;
no-map; no-map;
}; };
......
...@@ -66,32 +66,32 @@ memory@88800000 { ...@@ -66,32 +66,32 @@ memory@88800000 {
/* This platform has all PIL regions offset by 0x1400000 */ /* This platform has all PIL regions offset by 0x1400000 */
/delete-node/ mpss@88800000; /delete-node/ mpss@88800000;
mpss_region: mpss@89c00000 { mpss_mem: mpss@89c00000 {
reg = <0x0 0x89c00000 0x0 0x6200000>; reg = <0x0 0x89c00000 0x0 0x6200000>;
no-map; no-map;
}; };
/delete-node/ adsp@8ea00000; /delete-node/ adsp@8ea00000;
adsp_region: adsp@8ea00000 { adsp_mem: adsp@8fe00000 {
reg = <0x0 0x8fe00000 0x0 0x1b00000>; reg = <0x0 0x8fe00000 0x0 0x1b00000>;
no-map; no-map;
}; };
/delete-node/ slpi@90b00000; /delete-node/ slpi@90500000;
slpi_region: slpi@91900000 { slpi_mem: slpi@91900000 {
reg = <0x0 0x91900000 0x0 0xa00000>; reg = <0x0 0x91900000 0x0 0xa00000>;
no-map; no-map;
}; };
/delete-node/ gpu@8f200000; /delete-node/ gpu@90f00000;
zap_shader_region: gpu@92300000 { gpu_mem: gpu@92300000 {
compatible = "shared-dma-pool"; compatible = "shared-dma-pool";
reg = <0x0 0x92300000 0x0 0x2000>; reg = <0x0 0x92300000 0x0 0x2000>;
no-map; no-map;
}; };
/delete-node/ venus@91000000; /delete-node/ venus@91000000;
venus_region: venus@90400000 { venus_mem: venus@92400000 {
reg = <0x0 0x92400000 0x0 0x500000>; reg = <0x0 0x92400000 0x0 0x500000>;
no-map; no-map;
}; };
...@@ -107,7 +107,7 @@ ramoops@92900000 { ...@@ -107,7 +107,7 @@ ramoops@92900000 {
pmsg-size = <0x40000>; pmsg-size = <0x40000>;
}; };
/delete-node/ rmtfs@86700000; /delete-node/ rmtfs;
rmtfs@f6c00000 { rmtfs@f6c00000 {
compatible = "qcom,rmtfs-mem"; compatible = "qcom,rmtfs-mem";
reg = <0 0xf6c00000 0 0x200000>; reg = <0 0xf6c00000 0 0x200000>;
...@@ -118,7 +118,7 @@ rmtfs@f6c00000 { ...@@ -118,7 +118,7 @@ rmtfs@f6c00000 {
}; };
/delete-node/ mba@91500000; /delete-node/ mba@91500000;
mba_region: mba@f6f00000 { mba_mem: mba@f6f00000 {
reg = <0x0 0xf6f00000 0x0 0x100000>; reg = <0x0 0xf6f00000 0x0 0x100000>;
no-map; no-map;
}; };
......
...@@ -384,60 +384,65 @@ reserved-memory { ...@@ -384,60 +384,65 @@ reserved-memory {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
mba_region: mba@91500000 { hyp_mem: memory@85800000 {
reg = <0x0 0x91500000 0x0 0x200000>; reg = <0x0 0x85800000 0x0 0x600000>;
no-map; no-map;
}; };
slpi_region: slpi@90b00000 { xbl_mem: memory@85e00000 {
reg = <0x0 0x90b00000 0x0 0xa00000>; reg = <0x0 0x85e00000 0x0 0x200000>;
no-map; no-map;
}; };
venus_region: venus@90400000 { smem_mem: smem-mem@86000000 {
reg = <0x0 0x90400000 0x0 0x700000>; reg = <0x0 0x86000000 0x0 0x200000>;
no-map; no-map;
}; };
adsp_region: adsp@8ea00000 { tz_mem: memory@86200000 {
reg = <0x0 0x8ea00000 0x0 0x1a00000>; reg = <0x0 0x86200000 0x0 0x2600000>;
no-map; no-map;
}; };
mpss_region: mpss@88800000 { rmtfs_mem: rmtfs {
reg = <0x0 0x88800000 0x0 0x6200000>; compatible = "qcom,rmtfs-mem";
size = <0x0 0x200000>;
alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>;
no-map; no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
}; };
smem_mem: smem-mem@86000000 { mpss_mem: mpss@88800000 {
reg = <0x0 0x86000000 0x0 0x200000>; reg = <0x0 0x88800000 0x0 0x6200000>;
no-map; no-map;
}; };
memory@85800000 { adsp_mem: adsp@8ea00000 {
reg = <0x0 0x85800000 0x0 0x800000>; reg = <0x0 0x8ea00000 0x0 0x1b00000>;
no-map; no-map;
}; };
memory@86200000 { slpi_mem: slpi@90500000 {
reg = <0x0 0x86200000 0x0 0x2600000>; reg = <0x0 0x90500000 0x0 0xa00000>;
no-map; no-map;
}; };
rmtfs@86700000 { gpu_mem: gpu@90f00000 {
compatible = "qcom,rmtfs-mem"; compatible = "shared-dma-pool";
reg = <0x0 0x90f00000 0x0 0x100000>;
size = <0x0 0x200000>;
alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>;
no-map; no-map;
};
qcom,client-id = <1>; venus_mem: venus@91000000 {
qcom,vmid = <15>; reg = <0x0 0x91000000 0x0 0x500000>;
no-map;
}; };
zap_shader_region: gpu@8f200000 { mba_mem: mba@91500000 {
compatible = "shared-dma-pool"; reg = <0x0 0x91500000 0x0 0x200000>;
reg = <0x0 0x90b00000 0x0 0xa00000>;
no-map; no-map;
}; };
}; };
...@@ -1033,7 +1038,7 @@ opp-133000000 { ...@@ -1033,7 +1038,7 @@ opp-133000000 {
}; };
zap-shader { zap-shader {
memory-region = <&zap_shader_region>; memory-region = <&gpu_mem>;
}; };
}; };
...@@ -2027,7 +2032,7 @@ venus: video-codec@c00000 { ...@@ -2027,7 +2032,7 @@ venus: video-codec@c00000 {
<&venus_smmu 0x2c>, <&venus_smmu 0x2c>,
<&venus_smmu 0x2d>, <&venus_smmu 0x2d>,
<&venus_smmu 0x31>; <&venus_smmu 0x31>;
memory-region = <&venus_region>; memory-region = <&venus_mem>;
status = "disabled"; status = "disabled";
video-decoder { video-decoder {
...@@ -3034,7 +3039,7 @@ adsp_pil: remoteproc@9300000 { ...@@ -3034,7 +3039,7 @@ adsp_pil: remoteproc@9300000 {
clocks = <&rpmcc RPM_SMD_BB_CLK1>; clocks = <&rpmcc RPM_SMD_BB_CLK1>;
clock-names = "xo"; clock-names = "xo";
memory-region = <&adsp_region>; memory-region = <&adsp_mem>;
qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-states = <&smp2p_adsp_out 0>;
qcom,smem-state-names = "stop"; qcom,smem-state-names = "stop";
......
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