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Commit 9059d1bf authored by Mark M. Hoffman's avatar Mark M. Hoffman Committed by Greg Kroah-Hartman
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[PATCH] I2C: remove initialization of limits by w83781d driver 

This patch is from the lm_sensors project CVS, from this revision:

	1.111 (mds) remove initialization of limits by driver

It is better to set these limits by a combination of /etc/sensors.conf
and 'sensors -s'; "mechanism not policy." And what's not to like about
a patch that removes 163 lines?
parent 995d2aa2
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Showing with 0 additions and 173 deletions
drivers/i2c/chips/w83781d.c
View file @ 9059d1bf
...@@ -208,72 +208,6 @@ DIV_TO_REG(long val, enum chips type) ...@@ -208,72 +208,6 @@ DIV_TO_REG(long val, enum chips type)
return ((u8) i); return ((u8) i);
} }
/* Initial limits */
#define W83781D_INIT_IN_0 (vid == 3500 ? 280 : vid / 10)
#define W83781D_INIT_IN_1 (vid == 3500 ? 280 : vid / 10)
#define W83781D_INIT_IN_2 330
#define W83781D_INIT_IN_3 (((500) * 100) / 168)
#define W83781D_INIT_IN_4 (((1200) * 10) / 38)
#define W83781D_INIT_IN_5 (((-1200) * -604) / 2100)
#define W83781D_INIT_IN_6 (((-500) * -604) / 909)
#define W83781D_INIT_IN_7 (((500) * 100) / 168)
#define W83781D_INIT_IN_8 300
/* Initial limits for 782d/783s negative voltages */
/* Note level shift. Change min/max below if you change these. */
#define W83782D_INIT_IN_5 ((((-1200) + 1491) * 100)/514)
#define W83782D_INIT_IN_6 ((( (-500) + 771) * 100)/314)
#define W83781D_INIT_IN_PERCENTAGE 10
#define W83781D_INIT_IN_MIN(val) (val - val * W83781D_INIT_IN_PERCENTAGE / 100)
#define W83781D_INIT_IN_MAX(val) (val + val * W83781D_INIT_IN_PERCENTAGE / 100)
#define W83781D_INIT_IN_MIN_0 W83781D_INIT_IN_MIN(W83781D_INIT_IN_0)
#define W83781D_INIT_IN_MAX_0 W83781D_INIT_IN_MAX(W83781D_INIT_IN_0)
#define W83781D_INIT_IN_MIN_1 W83781D_INIT_IN_MIN(W83781D_INIT_IN_1)
#define W83781D_INIT_IN_MAX_1 W83781D_INIT_IN_MAX(W83781D_INIT_IN_1)
#define W83781D_INIT_IN_MIN_2 W83781D_INIT_IN_MIN(W83781D_INIT_IN_2)
#define W83781D_INIT_IN_MAX_2 W83781D_INIT_IN_MAX(W83781D_INIT_IN_2)
#define W83781D_INIT_IN_MIN_3 W83781D_INIT_IN_MIN(W83781D_INIT_IN_3)
#define W83781D_INIT_IN_MAX_3 W83781D_INIT_IN_MAX(W83781D_INIT_IN_3)
#define W83781D_INIT_IN_MIN_4 W83781D_INIT_IN_MIN(W83781D_INIT_IN_4)
#define W83781D_INIT_IN_MAX_4 W83781D_INIT_IN_MAX(W83781D_INIT_IN_4)
#define W83781D_INIT_IN_MIN_5 W83781D_INIT_IN_MIN(W83781D_INIT_IN_5)
#define W83781D_INIT_IN_MAX_5 W83781D_INIT_IN_MAX(W83781D_INIT_IN_5)
#define W83781D_INIT_IN_MIN_6 W83781D_INIT_IN_MIN(W83781D_INIT_IN_6)
#define W83781D_INIT_IN_MAX_6 W83781D_INIT_IN_MAX(W83781D_INIT_IN_6)
#define W83781D_INIT_IN_MIN_7 W83781D_INIT_IN_MIN(W83781D_INIT_IN_7)
#define W83781D_INIT_IN_MAX_7 W83781D_INIT_IN_MAX(W83781D_INIT_IN_7)
#define W83781D_INIT_IN_MIN_8 W83781D_INIT_IN_MIN(W83781D_INIT_IN_8)
#define W83781D_INIT_IN_MAX_8 W83781D_INIT_IN_MAX(W83781D_INIT_IN_8)
/* Initial limits for 782d/783s negative voltages */
/* These aren't direct multiples because of level shift */
/* Beware going negative - check */
#define W83782D_INIT_IN_MIN_5_TMP \
(((-1200 * (100 + W83781D_INIT_IN_PERCENTAGE)) + (1491 * 100))/514)
#define W83782D_INIT_IN_MIN_5 \
((W83782D_INIT_IN_MIN_5_TMP > 0) ? W83782D_INIT_IN_MIN_5_TMP : 0)
#define W83782D_INIT_IN_MAX_5 \
(((-1200 * (100 - W83781D_INIT_IN_PERCENTAGE)) + (1491 * 100))/514)
#define W83782D_INIT_IN_MIN_6_TMP \
((( -500 * (100 + W83781D_INIT_IN_PERCENTAGE)) + (771 * 100))/314)
#define W83782D_INIT_IN_MIN_6 \
((W83782D_INIT_IN_MIN_6_TMP > 0) ? W83782D_INIT_IN_MIN_6_TMP : 0)
#define W83782D_INIT_IN_MAX_6 \
((( -500 * (100 - W83781D_INIT_IN_PERCENTAGE)) + (771 * 100))/314)
#define W83781D_INIT_FAN_MIN_1 3000
#define W83781D_INIT_FAN_MIN_2 3000
#define W83781D_INIT_FAN_MIN_3 3000
/* temp = value / 100 */
#define W83781D_INIT_TEMP_OVER 6000
#define W83781D_INIT_TEMP_HYST 12700 /* must be 127 for ALARM to work */
#define W83781D_INIT_TEMP2_OVER 6000
#define W83781D_INIT_TEMP2_HYST 5000
#define W83781D_INIT_TEMP3_OVER 6000
#define W83781D_INIT_TEMP3_HYST 5000
/* There are some complications in a module like this. First off, W83781D chips /* There are some complications in a module like this. First off, W83781D chips
may be both present on the SMBus and the ISA bus, and we have to handle may be both present on the SMBus and the ISA bus, and we have to handle
those cases separately at some places. Second, there might be several those cases separately at some places. Second, there might be several
...@@ -1688,113 +1622,6 @@ w83781d_init_client(struct i2c_client *client) ...@@ -1688,113 +1622,6 @@ w83781d_init_client(struct i2c_client *client)
#endif /* W83781D_RT */ #endif /* W83781D_RT */
if (init) { if (init) {
w83781d_write_value(client, W83781D_REG_IN_MIN(0),
IN_TO_REG(W83781D_INIT_IN_MIN_0));
w83781d_write_value(client, W83781D_REG_IN_MAX(0),
IN_TO_REG(W83781D_INIT_IN_MAX_0));
if (type != w83783s && type != w83697hf) {
w83781d_write_value(client, W83781D_REG_IN_MIN(1),
IN_TO_REG(W83781D_INIT_IN_MIN_1));
w83781d_write_value(client, W83781D_REG_IN_MAX(1),
IN_TO_REG(W83781D_INIT_IN_MAX_1));
}
w83781d_write_value(client, W83781D_REG_IN_MIN(2),
IN_TO_REG(W83781D_INIT_IN_MIN_2));
w83781d_write_value(client, W83781D_REG_IN_MAX(2),
IN_TO_REG(W83781D_INIT_IN_MAX_2));
w83781d_write_value(client, W83781D_REG_IN_MIN(3),
IN_TO_REG(W83781D_INIT_IN_MIN_3));
w83781d_write_value(client, W83781D_REG_IN_MAX(3),
IN_TO_REG(W83781D_INIT_IN_MAX_3));
w83781d_write_value(client, W83781D_REG_IN_MIN(4),
IN_TO_REG(W83781D_INIT_IN_MIN_4));
w83781d_write_value(client, W83781D_REG_IN_MAX(4),
IN_TO_REG(W83781D_INIT_IN_MAX_4));
if (type == w83781d || type == as99127f) {
w83781d_write_value(client, W83781D_REG_IN_MIN(5),
IN_TO_REG(W83781D_INIT_IN_MIN_5));
w83781d_write_value(client, W83781D_REG_IN_MAX(5),
IN_TO_REG(W83781D_INIT_IN_MAX_5));
} else {
w83781d_write_value(client, W83781D_REG_IN_MIN(5),
IN_TO_REG(W83782D_INIT_IN_MIN_5));
w83781d_write_value(client, W83781D_REG_IN_MAX(5),
IN_TO_REG(W83782D_INIT_IN_MAX_5));
}
if (type == w83781d || type == as99127f) {
w83781d_write_value(client, W83781D_REG_IN_MIN(6),
IN_TO_REG(W83781D_INIT_IN_MIN_6));
w83781d_write_value(client, W83781D_REG_IN_MAX(6),
IN_TO_REG(W83781D_INIT_IN_MAX_6));
} else {
w83781d_write_value(client, W83781D_REG_IN_MIN(6),
IN_TO_REG(W83782D_INIT_IN_MIN_6));
w83781d_write_value(client, W83781D_REG_IN_MAX(6),
IN_TO_REG(W83782D_INIT_IN_MAX_6));
}
if ((type == w83782d) || (type == w83627hf) ||
(type == w83697hf)) {
w83781d_write_value(client, W83781D_REG_IN_MIN(7),
IN_TO_REG(W83781D_INIT_IN_MIN_7));
w83781d_write_value(client, W83781D_REG_IN_MAX(7),
IN_TO_REG(W83781D_INIT_IN_MAX_7));
w83781d_write_value(client, W83781D_REG_IN_MIN(8),
IN_TO_REG(W83781D_INIT_IN_MIN_8));
w83781d_write_value(client, W83781D_REG_IN_MAX(8),
IN_TO_REG(W83781D_INIT_IN_MAX_8));
w83781d_write_value(client, W83781D_REG_VBAT,
(w83781d_read_value
(client,
W83781D_REG_VBAT) | 0x01));
}
w83781d_write_value(client, W83781D_REG_FAN_MIN(1),
FAN_TO_REG(W83781D_INIT_FAN_MIN_1, 2));
w83781d_write_value(client, W83781D_REG_FAN_MIN(2),
FAN_TO_REG(W83781D_INIT_FAN_MIN_2, 2));
if (type != w83697hf) {
w83781d_write_value(client, W83781D_REG_FAN_MIN(3),
FAN_TO_REG(W83781D_INIT_FAN_MIN_3,
2));
}
w83781d_write_value(client, W83781D_REG_TEMP_OVER(1),
TEMP_TO_REG(W83781D_INIT_TEMP_OVER));
w83781d_write_value(client, W83781D_REG_TEMP_HYST(1),
TEMP_TO_REG(W83781D_INIT_TEMP_HYST));
if (type == as99127f) {
w83781d_write_value(client, W83781D_REG_TEMP_OVER(2),
AS99127_TEMP_ADD_TO_REG
(W83781D_INIT_TEMP2_OVER));
w83781d_write_value(client, W83781D_REG_TEMP_HYST(2),
AS99127_TEMP_ADD_TO_REG
(W83781D_INIT_TEMP2_HYST));
} else {
w83781d_write_value(client, W83781D_REG_TEMP_OVER(2),
TEMP_ADD_TO_REG
(W83781D_INIT_TEMP2_OVER));
w83781d_write_value(client, W83781D_REG_TEMP_HYST(2),
TEMP_ADD_TO_REG
(W83781D_INIT_TEMP2_HYST));
}
w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 0x00);
if (type == as99127f) {
w83781d_write_value(client, W83781D_REG_TEMP_OVER(3),
AS99127_TEMP_ADD_TO_REG
(W83781D_INIT_TEMP3_OVER));
w83781d_write_value(client, W83781D_REG_TEMP_HYST(3),
AS99127_TEMP_ADD_TO_REG
(W83781D_INIT_TEMP3_HYST));
} else if (type != w83783s && type != w83697hf) {
w83781d_write_value(client, W83781D_REG_TEMP_OVER(3),
TEMP_ADD_TO_REG
(W83781D_INIT_TEMP3_OVER));
w83781d_write_value(client, W83781D_REG_TEMP_HYST(3),
TEMP_ADD_TO_REG
(W83781D_INIT_TEMP3_HYST));
}
if (type != w83783s && type != w83697hf) { if (type != w83783s && type != w83697hf) {
w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG, w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
0x00); 0x00);
......
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