Commit 91a7c50c authored by Chris Brandt's avatar Chris Brandt Committed by Simon Horman

ARM: dts: r7s72100: fix ethernet clock parent

Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.

Fixes: 969244f9 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: default avatarChris Brandt <chris.brandt@renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 403fe77e
...@@ -121,7 +121,7 @@ mstp7_clks: mstp7_clks@fcfe0430 { ...@@ -121,7 +121,7 @@ mstp7_clks: mstp7_clks@fcfe0430 {
#clock-cells = <1>; #clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0430 4>; reg = <0xfcfe0430 4>;
clocks = <&p0_clk>; clocks = <&b_clk>;
clock-indices = <R7S72100_CLK_ETHER>; clock-indices = <R7S72100_CLK_ETHER>;
clock-output-names = "ether"; clock-output-names = "ether";
}; };
......
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