Commit 920a4cd3 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher

drm/amdgpu: add gmc cg support for sienna_cichlid

Add gmc clockgating support for sienna_cichlid.
The athub version used for sienna_cichlid is v2.1.
Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 45d76eeb
...@@ -48,6 +48,7 @@ ...@@ -48,6 +48,7 @@
#include "gfxhub_v2_1.h" #include "gfxhub_v2_1.h"
#include "mmhub_v2_0.h" #include "mmhub_v2_0.h"
#include "athub_v2_0.h" #include "athub_v2_0.h"
#include "athub_v2_1.h"
/* XXX Move this macro to navi10 header file, which is like vid.h for VI.*/ /* XXX Move this macro to navi10 header file, which is like vid.h for VI.*/
#define AMDGPU_NUM_OF_VMIDS 8 #define AMDGPU_NUM_OF_VMIDS 8
...@@ -1078,7 +1079,10 @@ static int gmc_v10_0_set_clockgating_state(void *handle, ...@@ -1078,7 +1079,10 @@ static int gmc_v10_0_set_clockgating_state(void *handle,
if (r) if (r)
return r; return r;
return athub_v2_0_set_clockgating(adev, state); if (adev->asic_type == CHIP_SIENNA_CICHLID)
return athub_v2_1_set_clockgating(adev, state);
else
return athub_v2_0_set_clockgating(adev, state);
} }
static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags) static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags)
...@@ -1087,7 +1091,10 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags) ...@@ -1087,7 +1091,10 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags)
mmhub_v2_0_get_clockgating(adev, flags); mmhub_v2_0_get_clockgating(adev, flags);
athub_v2_0_get_clockgating(adev, flags); if (adev->asic_type == CHIP_SIENNA_CICHLID)
athub_v2_1_get_clockgating(adev, flags);
else
athub_v2_0_get_clockgating(adev, flags);
} }
static int gmc_v10_0_set_powergating_state(void *handle, static int gmc_v10_0_set_powergating_state(void *handle,
......
...@@ -461,6 +461,7 @@ int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev, ...@@ -461,6 +461,7 @@ int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
case CHIP_NAVI10: case CHIP_NAVI10:
case CHIP_NAVI14: case CHIP_NAVI14:
case CHIP_NAVI12: case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
mmhub_v2_0_update_medium_grain_clock_gating(adev, mmhub_v2_0_update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE); state == AMD_CG_STATE_GATE);
mmhub_v2_0_update_medium_grain_light_sleep(adev, mmhub_v2_0_update_medium_grain_light_sleep(adev,
......
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