Commit 925b6e59 authored by Arunpravin Paneer Selvam's avatar Arunpravin Paneer Selvam Committed by Christian König

Revert "drm/amdgpu: add drm buddy support to amdgpu"

This reverts commit c9cad937.

This is part of a revert of the following commits:
commit 708d19d9 ("drm/amdgpu: move internal vram_mgr function into the C file")
commit 5e3f1e77 ("drm/amdgpu: fix start calculation in amdgpu_vram_mgr_new")
commit c9cad937 ("drm/amdgpu: add drm buddy support to amdgpu")

[WHY]
Few users reported garbaged graphics as soon as x starts,
reverting until this can be resolved.
Signed-off-by: default avatarArunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220708093047.492662-3-Arunpravin.PaneerSelvam@amd.comReviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
parent b68277f1
...@@ -256,7 +256,6 @@ config DRM_AMDGPU ...@@ -256,7 +256,6 @@ config DRM_AMDGPU
select HWMON select HWMON
select BACKLIGHT_CLASS_DEVICE select BACKLIGHT_CLASS_DEVICE
select INTERVAL_TREE select INTERVAL_TREE
select DRM_BUDDY
help help
Choose this option if you have a recent AMD Radeon graphics card. Choose this option if you have a recent AMD Radeon graphics card.
......
...@@ -30,15 +30,12 @@ ...@@ -30,15 +30,12 @@
#include <drm/ttm/ttm_resource.h> #include <drm/ttm/ttm_resource.h>
#include <drm/ttm/ttm_range_manager.h> #include <drm/ttm/ttm_range_manager.h>
#include "amdgpu_vram_mgr.h"
/* state back for walking over vram_mgr and gtt_mgr allocations */ /* state back for walking over vram_mgr and gtt_mgr allocations */
struct amdgpu_res_cursor { struct amdgpu_res_cursor {
uint64_t start; uint64_t start;
uint64_t size; uint64_t size;
uint64_t remaining; uint64_t remaining;
void *node; struct drm_mm_node *node;
uint32_t mem_type;
}; };
/** /**
...@@ -55,41 +52,19 @@ static inline void amdgpu_res_first(struct ttm_resource *res, ...@@ -55,41 +52,19 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
uint64_t start, uint64_t size, uint64_t start, uint64_t size,
struct amdgpu_res_cursor *cur) struct amdgpu_res_cursor *cur)
{ {
struct drm_buddy_block *block;
struct list_head *head, *next;
struct drm_mm_node *node; struct drm_mm_node *node;
if (!res) if (!res || res->mem_type == TTM_PL_SYSTEM) {
goto fallback; cur->start = start;
cur->size = size;
cur->remaining = size;
cur->node = NULL;
WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
return;
}
BUG_ON(start + size > res->num_pages << PAGE_SHIFT); BUG_ON(start + size > res->num_pages << PAGE_SHIFT);
cur->mem_type = res->mem_type;
switch (cur->mem_type) {
case TTM_PL_VRAM:
head = &to_amdgpu_vram_mgr_resource(res)->blocks;
block = list_first_entry_or_null(head,
struct drm_buddy_block,
link);
if (!block)
goto fallback;
while (start >= amdgpu_vram_mgr_block_size(block)) {
start -= amdgpu_vram_mgr_block_size(block);
next = block->link.next;
if (next != head)
block = list_entry(next, struct drm_buddy_block, link);
}
cur->start = amdgpu_vram_mgr_block_start(block) + start;
cur->size = min(amdgpu_vram_mgr_block_size(block) - start, size);
cur->remaining = size;
cur->node = block;
break;
case TTM_PL_TT:
node = to_ttm_range_mgr_node(res)->mm_nodes; node = to_ttm_range_mgr_node(res)->mm_nodes;
while (start >= node->size << PAGE_SHIFT) while (start >= node->size << PAGE_SHIFT)
start -= node++->size << PAGE_SHIFT; start -= node++->size << PAGE_SHIFT;
...@@ -98,20 +73,6 @@ static inline void amdgpu_res_first(struct ttm_resource *res, ...@@ -98,20 +73,6 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
cur->size = min((node->size << PAGE_SHIFT) - start, size); cur->size = min((node->size << PAGE_SHIFT) - start, size);
cur->remaining = size; cur->remaining = size;
cur->node = node; cur->node = node;
break;
default:
goto fallback;
}
return;
fallback:
cur->start = start;
cur->size = size;
cur->remaining = size;
cur->node = NULL;
WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
return;
} }
/** /**
...@@ -124,9 +85,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res, ...@@ -124,9 +85,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
*/ */
static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size) static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
{ {
struct drm_buddy_block *block; struct drm_mm_node *node = cur->node;
struct drm_mm_node *node;
struct list_head *next;
BUG_ON(size > cur->remaining); BUG_ON(size > cur->remaining);
...@@ -140,27 +99,9 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size) ...@@ -140,27 +99,9 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
return; return;
} }
switch (cur->mem_type) {
case TTM_PL_VRAM:
block = cur->node;
next = block->link.next;
block = list_entry(next, struct drm_buddy_block, link);
cur->node = block;
cur->start = amdgpu_vram_mgr_block_start(block);
cur->size = min(amdgpu_vram_mgr_block_size(block), cur->remaining);
break;
case TTM_PL_TT:
node = cur->node;
cur->node = ++node; cur->node = ++node;
cur->start = node->start << PAGE_SHIFT; cur->start = node->start << PAGE_SHIFT;
cur->size = min(node->size << PAGE_SHIFT, cur->remaining); cur->size = min(node->size << PAGE_SHIFT, cur->remaining);
break;
default:
return;
}
} }
#endif #endif
...@@ -26,7 +26,6 @@ ...@@ -26,7 +26,6 @@
#include <linux/dma-direction.h> #include <linux/dma-direction.h>
#include <drm/gpu_scheduler.h> #include <drm/gpu_scheduler.h>
#include "amdgpu_vram_mgr.h"
#include "amdgpu.h" #include "amdgpu.h"
#define AMDGPU_PL_GDS (TTM_PL_PRIV + 0) #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
...@@ -39,6 +38,15 @@ ...@@ -39,6 +38,15 @@
#define AMDGPU_POISON 0xd0bed0be #define AMDGPU_POISON 0xd0bed0be
struct amdgpu_vram_mgr {
struct ttm_resource_manager manager;
struct drm_mm mm;
spinlock_t lock;
struct list_head reservations_pending;
struct list_head reserved_pages;
atomic64_t vis_usage;
};
struct amdgpu_gtt_mgr { struct amdgpu_gtt_mgr {
struct ttm_resource_manager manager; struct ttm_resource_manager manager;
struct drm_mm mm; struct drm_mm mm;
......
/* SPDX-License-Identifier: MIT
* Copyright 2021 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __AMDGPU_VRAM_MGR_H__
#define __AMDGPU_VRAM_MGR_H__
#include <drm/drm_buddy.h>
struct amdgpu_vram_mgr {
struct ttm_resource_manager manager;
struct drm_buddy mm;
/* protects access to buffer objects */
struct mutex lock;
struct list_head reservations_pending;
struct list_head reserved_pages;
atomic64_t vis_usage;
u64 default_page_size;
};
struct amdgpu_vram_mgr_resource {
struct ttm_resource base;
struct list_head blocks;
unsigned long flags;
};
static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)
{
return drm_buddy_block_offset(block);
}
static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)
{
return PAGE_SIZE << drm_buddy_block_order(block);
}
static inline struct drm_buddy_block *
amdgpu_vram_mgr_first_block(struct list_head *list)
{
return list_first_entry_or_null(list, struct drm_buddy_block, link);
}
static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct list_head *head)
{
struct drm_buddy_block *block;
u64 start, size;
block = amdgpu_vram_mgr_first_block(head);
if (!block)
return false;
while (head != block->link.next) {
start = amdgpu_vram_mgr_block_start(block);
size = amdgpu_vram_mgr_block_size(block);
block = list_entry(block->link.next, struct drm_buddy_block, link);
if (start + size != amdgpu_vram_mgr_block_start(block))
return false;
}
return true;
}
static inline struct amdgpu_vram_mgr_resource *
to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
{
return container_of(res, struct amdgpu_vram_mgr_resource, base);
}
#endif
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