Commit 92f06c38 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'sunxi-drivers-for-4.19' of...

Merge tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers

Allwinner drivers changes for 4.19

There's been work for this release cycles in both the SRAM controller
driver in order to support more SoCs, as part of our VPU work, but also to
enable the EMAC on the A64 (that needs to poke at registers within the same
register space).

Some work has been needed too to represent the bus to the display engine
controllers that all need an SRAM to be mapped to the CPU to be able to
access those controllers' registers.

* tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  soc: sunxi: Add the A13, A23 and H3 system control compatibles
  drivers: soc: sunxi: Add support for the C1 SRAM region
  dt-bindings: sram: sunxi: Populate valid sections compatibles
  dt-bindings: sram: sunxi: Add A13, A20, A23 and H3 dedicated bindings
  soc: sunxi: sram: Add dt match for the A10 system-control compatible
  dt-bindings: sram: sunxi: Introduce new A10 binding for system-control
  bus: add bus driver for accessing Allwinner A64 DE2
  dt-bindings: add binding for the Allwinner A64 DE2 bus
  soc: sunxi: sram: Add updated compatible string for A64 system control
  dt-bindings: sram: Rename A64 SRAM controller compatible
  soc: sunxi: export a regmap for EMAC clock reg on A64
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d7e83230 7377330a
Device tree bindings for Allwinner A64 DE2 bus
The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C)
to be claimed for enabling the access.
Required properties:
- compatible: Should contain "allwinner,sun50i-a64-de2"
- reg: A resource specifier for the register space
- #address-cells: Must be set to 1
- #size-cells: Must be set to 1
- ranges: Must be set up to map the address space inside the
DE2, for the sub-blocks of DE2.
- allwinner,sram: the SRAM that needs to be claimed
Example:
de2@1000000 {
compatible = "allwinner,sun50i-a64-de2";
reg = <0x1000000 0x400000>;
allwinner,sram = <&de2_sram 1>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1000000 0x400000>;
display_clocks: clock@0 {
compatible = "allwinner,sun50i-a64-de2-clk";
reg = <0x0 0x100000>;
clocks = <&ccu CLK_DE>,
<&ccu CLK_BUS_DE>;
clock-names = "mod",
"bus";
resets = <&ccu RST_BUS_DE>;
#clock-cells = <1>;
#reset-cells = <1>;
};
};
...@@ -10,8 +10,14 @@ Controller Node ...@@ -10,8 +10,14 @@ Controller Node
Required properties: Required properties:
- compatible : should be: - compatible : should be:
- "allwinner,sun4i-a10-sram-controller" - "allwinner,sun4i-a10-sram-controller" (deprecated)
- "allwinner,sun50i-a64-sram-controller" - "allwinner,sun4i-a10-system-control"
- "allwinner,sun5i-a13-system-control"
- "allwinner,sun7i-a20-system-control", "allwinner,sun4i-a10-system-control"
- "allwinner,sun8i-a23-system-control"
- "allwinner,sun8i-h3-system-control"
- "allwinner,sun50i-a64-sram-controller" (deprecated)
- "allwinner,sun50i-a64-system-control"
- reg : sram controller register offset + length - reg : sram controller register offset + length
SRAM nodes SRAM nodes
...@@ -26,8 +32,25 @@ once again the representation described in the mmio-sram binding. ...@@ -26,8 +32,25 @@ once again the representation described in the mmio-sram binding.
The valid sections compatible for A10 are: The valid sections compatible for A10 are:
- allwinner,sun4i-a10-sram-a3-a4 - allwinner,sun4i-a10-sram-a3-a4
- allwinner,sun4i-a10-sram-c1
- allwinner,sun4i-a10-sram-d - allwinner,sun4i-a10-sram-d
The valid sections compatible for A13 are:
- allwinner,sun5i-a13-sram-a3-a4, allwinner,sun4i-a10-sram-a3-a4
- allwinner,sun5i-a13-sram-c1, allwinner,sun4i-a10-sram-c1
- allwinner,sun5i-a13-sram-d, allwinner,sun4i-a10-sram-d
The valid sections compatible for A20 are:
- allwinner,sun7i-a20-sram-a3-a4, allwinner,sun4i-a10-sram-a3-a4
- allwinner,sun7i-a20-sram-c1, allwinner,sun4i-a10-sram-c1
- allwinner,sun7i-a20-sram-d, allwinner,sun4i-a10-sram-d
The valid sections compatible for A23/A33 are:
- allwinner,sun8i-a23-sram-c1, allwinner,sun4i-a10-sram-c1
The valid sections compatible for H3 are:
- allwinner,sun8i-h3-sram-c1, allwinner,sun4i-a10-sram-c1
The valid sections compatible for A64 are: The valid sections compatible for A64 are:
- allwinner,sun50i-a64-sram-c - allwinner,sun50i-a64-sram-c
...@@ -47,8 +70,8 @@ This valid values for this argument are: ...@@ -47,8 +70,8 @@ This valid values for this argument are:
Example Example
------- -------
sram-controller@1c00000 { system-control@1c00000 {
compatible = "allwinner,sun4i-a10-sram-controller"; compatible = "allwinner,sun4i-a10-system-control";
reg = <0x01c00000 0x30>; reg = <0x01c00000 0x30>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
......
...@@ -103,6 +103,16 @@ config SIMPLE_PM_BUS ...@@ -103,6 +103,16 @@ config SIMPLE_PM_BUS
Controller (BSC, sometimes called "LBSC within Bus Bridge", or Controller (BSC, sometimes called "LBSC within Bus Bridge", or
"External Bus Interface") as found on several Renesas ARM SoCs. "External Bus Interface") as found on several Renesas ARM SoCs.
config SUN50I_DE2_BUS
bool "Allwinner A64 DE2 Bus Driver"
default ARM64
depends on ARCH_SUNXI
select SUNXI_SRAM
help
Say y here to enable support for Allwinner A64 DE2 bus driver. It's
mostly transparent, but a SRAM region needs to be claimed in the SRAM
controller to make the all blocks in the DE2 part accessible.
config SUNXI_RSB config SUNXI_RSB
tristate "Allwinner sunXi Reduced Serial Bus Driver" tristate "Allwinner sunXi Reduced Serial Bus Driver"
default MACH_SUN8I || MACH_SUN9I || ARM64 default MACH_SUN8I || MACH_SUN9I || ARM64
......
...@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o ...@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
obj-$(CONFIG_QCOM_EBI2) += qcom-ebi2.o obj-$(CONFIG_QCOM_EBI2) += qcom-ebi2.o
obj-$(CONFIG_SUN50I_DE2_BUS) += sun50i-de2.o
obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
......
// SPDX-License-Identifier: GPL-2.0
/*
* Allwinner A64 Display Engine 2.0 Bus Driver
*
* Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
*/
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/soc/sunxi/sunxi_sram.h>
static int sun50i_de2_bus_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
int ret;
ret = sunxi_sram_claim(&pdev->dev);
if (ret) {
dev_err(&pdev->dev, "Error couldn't map SRAM to device\n");
return ret;
}
of_platform_populate(np, NULL, NULL, &pdev->dev);
return 0;
}
static int sun50i_de2_bus_remove(struct platform_device *pdev)
{
sunxi_sram_release(&pdev->dev);
return 0;
}
static const struct of_device_id sun50i_de2_bus_of_match[] = {
{ .compatible = "allwinner,sun50i-a64-de2", },
{ /* sentinel */ }
};
static struct platform_driver sun50i_de2_bus_driver = {
.probe = sun50i_de2_bus_probe,
.remove = sun50i_de2_bus_remove,
.driver = {
.name = "sun50i-de2-bus",
.of_match_table = sun50i_de2_bus_of_match,
},
};
builtin_platform_driver(sun50i_de2_bus_driver);
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/soc/sunxi/sunxi_sram.h> #include <linux/soc/sunxi/sunxi_sram.h>
...@@ -63,6 +64,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = { ...@@ -63,6 +64,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
SUNXI_SRAM_MAP(1, 1, "emac")), SUNXI_SRAM_MAP(1, 1, "emac")),
}; };
static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
.data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
SUNXI_SRAM_MAP(0, 0, "cpu"),
SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
};
static struct sunxi_sram_desc sun4i_a10_sram_d = { static struct sunxi_sram_desc sun4i_a10_sram_d = {
.data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1, .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
SUNXI_SRAM_MAP(0, 0, "cpu"), SUNXI_SRAM_MAP(0, 0, "cpu"),
...@@ -80,6 +87,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = { ...@@ -80,6 +87,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = {
.compatible = "allwinner,sun4i-a10-sram-a3-a4", .compatible = "allwinner,sun4i-a10-sram-a3-a4",
.data = &sun4i_a10_sram_a3_a4.data, .data = &sun4i_a10_sram_a3_a4.data,
}, },
{
.compatible = "allwinner,sun4i-a10-sram-c1",
.data = &sun4i_a10_sram_c1.data,
},
{ {
.compatible = "allwinner,sun4i-a10-sram-d", .compatible = "allwinner,sun4i-a10-sram-d",
.data = &sun4i_a10_sram_d.data, .data = &sun4i_a10_sram_d.data,
...@@ -281,13 +292,51 @@ int sunxi_sram_release(struct device *dev) ...@@ -281,13 +292,51 @@ int sunxi_sram_release(struct device *dev)
} }
EXPORT_SYMBOL(sunxi_sram_release); EXPORT_SYMBOL(sunxi_sram_release);
struct sunxi_sramc_variant {
bool has_emac_clock;
};
static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = {
/* Nothing special */
};
static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = {
.has_emac_clock = true,
};
#define SUNXI_SRAM_EMAC_CLOCK_REG 0x30
static bool sunxi_sram_regmap_accessible_reg(struct device *dev,
unsigned int reg)
{
if (reg == SUNXI_SRAM_EMAC_CLOCK_REG)
return true;
return false;
}
static struct regmap_config sunxi_sram_emac_clock_regmap = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
/* last defined register */
.max_register = SUNXI_SRAM_EMAC_CLOCK_REG,
/* other devices have no business accessing other registers */
.readable_reg = sunxi_sram_regmap_accessible_reg,
.writeable_reg = sunxi_sram_regmap_accessible_reg,
};
static int sunxi_sram_probe(struct platform_device *pdev) static int sunxi_sram_probe(struct platform_device *pdev)
{ {
struct resource *res; struct resource *res;
struct dentry *d; struct dentry *d;
struct regmap *emac_clock;
const struct sunxi_sramc_variant *variant;
sram_dev = &pdev->dev; sram_dev = &pdev->dev;
variant = of_device_get_match_data(&pdev->dev);
if (!variant)
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(&pdev->dev, res); base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(base)) if (IS_ERR(base))
...@@ -300,12 +349,46 @@ static int sunxi_sram_probe(struct platform_device *pdev) ...@@ -300,12 +349,46 @@ static int sunxi_sram_probe(struct platform_device *pdev)
if (!d) if (!d)
return -ENOMEM; return -ENOMEM;
if (variant->has_emac_clock) {
emac_clock = devm_regmap_init_mmio(&pdev->dev, base,
&sunxi_sram_emac_clock_regmap);
if (IS_ERR(emac_clock))
return PTR_ERR(emac_clock);
}
return 0; return 0;
} }
static const struct of_device_id sunxi_sram_dt_match[] = { static const struct of_device_id sunxi_sram_dt_match[] = {
{ .compatible = "allwinner,sun4i-a10-sram-controller" }, {
{ .compatible = "allwinner,sun50i-a64-sram-controller" }, .compatible = "allwinner,sun4i-a10-sram-controller",
.data = &sun4i_a10_sramc_variant,
},
{
.compatible = "allwinner,sun4i-a10-system-control",
.data = &sun4i_a10_sramc_variant,
},
{
.compatible = "allwinner,sun5i-a13-system-control",
.data = &sun4i_a10_sramc_variant,
},
{
.compatible = "allwinner,sun8i-a23-system-control",
.data = &sun4i_a10_sramc_variant,
},
{
.compatible = "allwinner,sun8i-h3-system-control",
.data = &sun4i_a10_sramc_variant,
},
{
.compatible = "allwinner,sun50i-a64-sram-controller",
.data = &sun50i_a64_sramc_variant,
},
{
.compatible = "allwinner,sun50i-a64-system-control",
.data = &sun50i_a64_sramc_variant,
},
{ }, { },
}; };
MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
......
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