Commit 92f33bf1 authored by Mark Brown's avatar Mark Brown

Refactor acp legacy driver and add

Merge series from Syed Saba Kareem <Syed.SabaKareem@amd.com>:

This patch series to refactor acp leagacy driver and add pm ops
support for rembrandt platforms.
parents cd2f8ce3 5debf4ae
......@@ -18,6 +18,9 @@ if SND_SOC_AMD_ACP_COMMON
config SND_SOC_AMD_ACP_PDM
tristate
config SND_SOC_AMD_ACP_LEGACY_COMMON
tristate
config SND_SOC_AMD_ACP_I2S
tristate
......@@ -36,6 +39,7 @@ config SND_AMD_ASOC_RENOIR
select SND_SOC_AMD_ACP_PCM
select SND_SOC_AMD_ACP_I2S
select SND_SOC_AMD_ACP_PDM
select SND_SOC_AMD_ACP_LEGACY_COMMON
depends on X86 && PCI
help
This option enables Renoir I2S support on AMD platform.
......@@ -45,6 +49,7 @@ config SND_AMD_ASOC_REMBRANDT
select SND_SOC_AMD_ACP_PCM
select SND_SOC_AMD_ACP_I2S
select SND_SOC_AMD_ACP_PDM
select SND_SOC_AMD_ACP_LEGACY_COMMON
depends on X86 && PCI
help
This option enables Rembrandt I2S support on AMD platform.
......
......@@ -8,6 +8,7 @@
snd-acp-pcm-objs := acp-platform.o
snd-acp-i2s-objs := acp-i2s.o
snd-acp-pdm-objs := acp-pdm.o
snd-acp-legacy-common-objs := acp-legacy-common.o
snd-acp-pci-objs := acp-pci.o
#platform specific driver
......@@ -22,6 +23,7 @@ snd-acp-sof-mach-objs := acp-sof-mach.o
obj-$(CONFIG_SND_SOC_AMD_ACP_PCM) += snd-acp-pcm.o
obj-$(CONFIG_SND_SOC_AMD_ACP_I2S) += snd-acp-i2s.o
obj-$(CONFIG_SND_SOC_AMD_ACP_PDM) += snd-acp-pdm.o
obj-$(CONFIG_SND_SOC_AMD_ACP_LEGACY_COMMON) += snd-acp-legacy-common.o
obj-$(CONFIG_SND_SOC_AMD_ACP_PCI) += snd-acp-pci.o
obj-$(CONFIG_SND_AMD_ASOC_RENOIR) += snd-acp-renoir.o
......
......@@ -149,6 +149,7 @@ static int acp_i2s_hwparams(struct snd_pcm_substream *substream, struct snd_pcm_
dev_err(dev, "Invalid dai id %x\n", dai->driver->id);
return -EINVAL;
}
adata->xfer_tx_resolution[dai->driver->id - 1] = xfer_resolution;
} else {
switch (dai->driver->id) {
case I2S_BT_INSTANCE:
......@@ -167,6 +168,7 @@ static int acp_i2s_hwparams(struct snd_pcm_substream *substream, struct snd_pcm_
dev_err(dev, "Invalid dai id %x\n", dai->driver->id);
return -EINVAL;
}
adata->xfer_rx_resolution[dai->driver->id - 1] = xfer_resolution;
}
val = readl(adata->acp_base + reg_val);
......
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
//
// This file is provided under a dual BSD/GPLv2 license. When using or
// redistributing this file, you may do so under either license.
//
// Copyright(c) 2023 Advanced Micro Devices, Inc.
//
// Authors: Syed Saba Kareem <Syed.SabaKareem@amd.com>
//
/*
* Common file to be used by amd platforms
*/
#include "amd.h"
#include <linux/pci.h>
#include <linux/export.h>
void acp_enable_interrupts(struct acp_dev_data *adata)
{
struct acp_resource *rsrc = adata->rsrc;
u32 ext_intr_ctrl;
writel(0x01, ACP_EXTERNAL_INTR_ENB(adata));
ext_intr_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
ext_intr_ctrl |= ACP_ERROR_MASK;
writel(ext_intr_ctrl, ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
}
EXPORT_SYMBOL_NS_GPL(acp_enable_interrupts, SND_SOC_ACP_COMMON);
void acp_disable_interrupts(struct acp_dev_data *adata)
{
struct acp_resource *rsrc = adata->rsrc;
writel(ACP_EXT_INTR_STAT_CLEAR_MASK, ACP_EXTERNAL_INTR_STAT(adata, rsrc->irqp_used));
writel(0x00, ACP_EXTERNAL_INTR_ENB(adata));
}
EXPORT_SYMBOL_NS_GPL(acp_disable_interrupts, SND_SOC_ACP_COMMON);
static void set_acp_pdm_ring_buffer(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct acp_stream *stream = runtime->private_data;
struct device *dev = dai->component->dev;
struct acp_dev_data *adata = dev_get_drvdata(dev);
u32 physical_addr, pdm_size, period_bytes;
period_bytes = frames_to_bytes(runtime, runtime->period_size);
pdm_size = frames_to_bytes(runtime, runtime->buffer_size);
physical_addr = stream->reg_offset + MEM_WINDOW_START;
/* Init ACP PDM Ring buffer */
writel(physical_addr, adata->acp_base + ACP_WOV_RX_RINGBUFADDR);
writel(pdm_size, adata->acp_base + ACP_WOV_RX_RINGBUFSIZE);
writel(period_bytes, adata->acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
}
static void set_acp_pdm_clk(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct device *dev = dai->component->dev;
struct acp_dev_data *adata = dev_get_drvdata(dev);
unsigned int pdm_ctrl;
/* Enable default ACP PDM clk */
writel(PDM_CLK_FREQ_MASK, adata->acp_base + ACP_WOV_CLK_CTRL);
pdm_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL);
pdm_ctrl |= PDM_MISC_CTRL_MASK;
writel(pdm_ctrl, adata->acp_base + ACP_WOV_MISC_CTRL);
set_acp_pdm_ring_buffer(substream, dai);
}
void restore_acp_pdm_params(struct snd_pcm_substream *substream,
struct acp_dev_data *adata)
{
struct snd_soc_dai *dai;
struct snd_soc_pcm_runtime *soc_runtime;
u32 ext_int_ctrl;
soc_runtime = asoc_substream_to_rtd(substream);
dai = asoc_rtd_to_cpu(soc_runtime, 0);
/* Programming channel mask and sampling rate */
writel(adata->ch_mask, adata->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
writel(PDM_DEC_64, adata->acp_base + ACP_WOV_PDM_DECIMATION_FACTOR);
/* Enabling ACP Pdm interuppts */
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, 0));
ext_int_ctrl |= PDM_DMA_INTR_MASK;
writel(ext_int_ctrl, ACP_EXTERNAL_INTR_CNTL(adata, 0));
set_acp_pdm_clk(substream, dai);
}
EXPORT_SYMBOL_NS_GPL(restore_acp_pdm_params, SND_SOC_ACP_COMMON);
static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct device *dev = dai->component->dev;
struct acp_dev_data *adata = dev_get_drvdata(dev);
struct acp_resource *rsrc = adata->rsrc;
struct acp_stream *stream = substream->runtime->private_data;
u32 reg_dma_size, reg_fifo_size, reg_fifo_addr;
u32 phy_addr, acp_fifo_addr, ext_int_ctrl;
unsigned int dir = substream->stream;
switch (dai->driver->id) {
case I2S_SP_INSTANCE:
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
reg_dma_size = ACP_I2S_TX_DMA_SIZE;
acp_fifo_addr = rsrc->sram_pte_offset +
SP_PB_FIFO_ADDR_OFFSET;
reg_fifo_addr = ACP_I2S_TX_FIFOADDR;
reg_fifo_size = ACP_I2S_TX_FIFOSIZE;
phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
writel(phy_addr, adata->acp_base + ACP_I2S_TX_RINGBUFADDR);
} else {
reg_dma_size = ACP_I2S_RX_DMA_SIZE;
acp_fifo_addr = rsrc->sram_pte_offset +
SP_CAPT_FIFO_ADDR_OFFSET;
reg_fifo_addr = ACP_I2S_RX_FIFOADDR;
reg_fifo_size = ACP_I2S_RX_FIFOSIZE;
phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
writel(phy_addr, adata->acp_base + ACP_I2S_RX_RINGBUFADDR);
}
break;
case I2S_BT_INSTANCE:
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
reg_dma_size = ACP_BT_TX_DMA_SIZE;
acp_fifo_addr = rsrc->sram_pte_offset +
BT_PB_FIFO_ADDR_OFFSET;
reg_fifo_addr = ACP_BT_TX_FIFOADDR;
reg_fifo_size = ACP_BT_TX_FIFOSIZE;
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
writel(phy_addr, adata->acp_base + ACP_BT_TX_RINGBUFADDR);
} else {
reg_dma_size = ACP_BT_RX_DMA_SIZE;
acp_fifo_addr = rsrc->sram_pte_offset +
BT_CAPT_FIFO_ADDR_OFFSET;
reg_fifo_addr = ACP_BT_RX_FIFOADDR;
reg_fifo_size = ACP_BT_RX_FIFOSIZE;
phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
writel(phy_addr, adata->acp_base + ACP_BT_RX_RINGBUFADDR);
}
break;
case I2S_HS_INSTANCE:
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
reg_dma_size = ACP_HS_TX_DMA_SIZE;
acp_fifo_addr = rsrc->sram_pte_offset +
HS_PB_FIFO_ADDR_OFFSET;
reg_fifo_addr = ACP_HS_TX_FIFOADDR;
reg_fifo_size = ACP_HS_TX_FIFOSIZE;
phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
writel(phy_addr, adata->acp_base + ACP_HS_TX_RINGBUFADDR);
} else {
reg_dma_size = ACP_HS_RX_DMA_SIZE;
acp_fifo_addr = rsrc->sram_pte_offset +
HS_CAPT_FIFO_ADDR_OFFSET;
reg_fifo_addr = ACP_HS_RX_FIFOADDR;
reg_fifo_size = ACP_HS_RX_FIFOSIZE;
phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
writel(phy_addr, adata->acp_base + ACP_HS_RX_RINGBUFADDR);
}
break;
default:
dev_err(dev, "Invalid dai id %x\n", dai->driver->id);
return -EINVAL;
}
writel(DMA_SIZE, adata->acp_base + reg_dma_size);
writel(acp_fifo_addr, adata->acp_base + reg_fifo_addr);
writel(FIFO_SIZE, adata->acp_base + reg_fifo_size);
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
ext_int_ctrl |= BIT(I2S_RX_THRESHOLD(rsrc->offset)) |
BIT(BT_RX_THRESHOLD(rsrc->offset)) |
BIT(I2S_TX_THRESHOLD(rsrc->offset)) |
BIT(BT_TX_THRESHOLD(rsrc->offset)) |
BIT(HS_RX_THRESHOLD(rsrc->offset)) |
BIT(HS_TX_THRESHOLD(rsrc->offset));
writel(ext_int_ctrl, ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
return 0;
}
int restore_acp_i2s_params(struct snd_pcm_substream *substream,
struct acp_dev_data *adata,
struct acp_stream *stream)
{
struct snd_soc_dai *dai;
struct snd_soc_pcm_runtime *soc_runtime;
u32 tdm_fmt, reg_val, fmt_reg, val;
soc_runtime = asoc_substream_to_rtd(substream);
dai = asoc_rtd_to_cpu(soc_runtime, 0);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
tdm_fmt = adata->tdm_tx_fmt[stream->dai_id - 1];
switch (stream->dai_id) {
case I2S_BT_INSTANCE:
reg_val = ACP_BTTDM_ITER;
fmt_reg = ACP_BTTDM_TXFRMT;
break;
case I2S_SP_INSTANCE:
reg_val = ACP_I2STDM_ITER;
fmt_reg = ACP_I2STDM_TXFRMT;
break;
case I2S_HS_INSTANCE:
reg_val = ACP_HSTDM_ITER;
fmt_reg = ACP_HSTDM_TXFRMT;
break;
default:
pr_err("Invalid dai id %x\n", stream->dai_id);
return -EINVAL;
}
val = adata->xfer_tx_resolution[stream->dai_id - 1] << 3;
} else {
tdm_fmt = adata->tdm_rx_fmt[stream->dai_id - 1];
switch (stream->dai_id) {
case I2S_BT_INSTANCE:
reg_val = ACP_BTTDM_IRER;
fmt_reg = ACP_BTTDM_RXFRMT;
break;
case I2S_SP_INSTANCE:
reg_val = ACP_I2STDM_IRER;
fmt_reg = ACP_I2STDM_RXFRMT;
break;
case I2S_HS_INSTANCE:
reg_val = ACP_HSTDM_IRER;
fmt_reg = ACP_HSTDM_RXFRMT;
break;
default:
pr_err("Invalid dai id %x\n", stream->dai_id);
return -EINVAL;
}
val = adata->xfer_rx_resolution[stream->dai_id - 1] << 3;
}
writel(val, adata->acp_base + reg_val);
if (adata->tdm_mode == TDM_ENABLE) {
writel(tdm_fmt, adata->acp_base + fmt_reg);
val = readl(adata->acp_base + reg_val);
writel(val | 0x2, adata->acp_base + reg_val);
}
return set_acp_i2s_dma_fifo(substream, dai);
}
EXPORT_SYMBOL_NS_GPL(restore_acp_i2s_params, SND_SOC_ACP_COMMON);
static int acp_power_on(struct acp_chip_info *chip)
{
u32 val, acp_pgfsm_stat_reg, acp_pgfsm_ctrl_reg;
void __iomem *base;
base = chip->base;
switch (chip->acp_rev) {
case ACP3X_DEV:
acp_pgfsm_stat_reg = ACP_PGFSM_STATUS;
acp_pgfsm_ctrl_reg = ACP_PGFSM_CONTROL;
break;
case ACP6X_DEV:
acp_pgfsm_stat_reg = ACP6X_PGFSM_STATUS;
acp_pgfsm_ctrl_reg = ACP6X_PGFSM_CONTROL;
break;
default:
return -EINVAL;
}
val = readl(base + acp_pgfsm_stat_reg);
if (val == ACP_POWERED_ON)
return 0;
if ((val & ACP_PGFSM_STATUS_MASK) != ACP_POWER_ON_IN_PROGRESS)
writel(ACP_PGFSM_CNTL_POWER_ON_MASK, base + acp_pgfsm_ctrl_reg);
return readl_poll_timeout(base + acp_pgfsm_stat_reg, val,
!val, DELAY_US, ACP_TIMEOUT);
}
static int acp_reset(void __iomem *base)
{
u32 val;
int ret;
writel(1, base + ACP_SOFT_RESET);
ret = readl_poll_timeout(base + ACP_SOFT_RESET, val, val & ACP_SOFT_RST_DONE_MASK,
DELAY_US, ACP_TIMEOUT);
if (ret)
return ret;
writel(0, base + ACP_SOFT_RESET);
return readl_poll_timeout(base + ACP_SOFT_RESET, val, !val, DELAY_US, ACP_TIMEOUT);
}
int acp_init(struct acp_chip_info *chip)
{
int ret;
/* power on */
ret = acp_power_on(chip);
if (ret) {
pr_err("ACP power on failed\n");
return ret;
}
writel(0x01, chip->base + ACP_CONTROL);
/* Reset */
ret = acp_reset(chip->base);
if (ret) {
pr_err("ACP reset failed\n");
return ret;
}
return 0;
}
EXPORT_SYMBOL_NS_GPL(acp_init, SND_SOC_ACP_COMMON);
int acp_deinit(void __iomem *base)
{
int ret;
/* Reset */
ret = acp_reset(base);
if (ret)
return ret;
writel(0, base + ACP_CONTROL);
return 0;
}
EXPORT_SYMBOL_NS_GPL(acp_deinit, SND_SOC_ACP_COMMON);
int smn_write(struct pci_dev *dev, u32 smn_addr, u32 data)
{
pci_write_config_dword(dev, 0x60, smn_addr);
pci_write_config_dword(dev, 0x64, data);
return 0;
}
EXPORT_SYMBOL_NS_GPL(smn_write, SND_SOC_ACP_COMMON);
int smn_read(struct pci_dev *dev, u32 smn_addr)
{
u32 data;
pci_write_config_dword(dev, 0x60, smn_addr);
pci_read_config_dword(dev, 0x64, &data);
return data;
}
EXPORT_SYMBOL_NS_GPL(smn_read, SND_SOC_ACP_COMMON);
MODULE_LICENSE("Dual BSD/GPL");
......@@ -16,6 +16,7 @@
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include "amd.h"
#include "../mach-config.h"
......@@ -106,6 +107,7 @@ static int acp_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id
goto unregister_dmic_dev;
}
acp_init(chip);
res = devm_kcalloc(&pci->dev, num_res, sizeof(struct resource), GFP_KERNEL);
if (!res) {
ret = -ENOMEM;
......@@ -139,7 +141,12 @@ static int acp_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id
ret = PTR_ERR(pdev);
goto unregister_dmic_dev;
}
chip->chip_pdev = pdev;
dev_set_drvdata(&pci->dev, chip);
pm_runtime_set_autosuspend_delay(&pci->dev, 2000);
pm_runtime_use_autosuspend(&pci->dev);
pm_runtime_put_noidle(&pci->dev);
pm_runtime_allow(&pci->dev);
return ret;
unregister_dmic_dev:
......@@ -152,12 +159,56 @@ static int acp_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id
return ret;
};
static int __maybe_unused snd_acp_suspend(struct device *dev)
{
struct acp_chip_info *chip;
int ret;
chip = dev_get_drvdata(dev);
ret = acp_deinit(chip->base);
if (ret)
dev_err(dev, "ACP de-init failed\n");
return ret;
}
static int __maybe_unused snd_acp_resume(struct device *dev)
{
struct acp_chip_info *chip;
struct acp_dev_data *adata;
struct device child;
int ret;
chip = dev_get_drvdata(dev);
ret = acp_init(chip);
if (ret)
dev_err(dev, "ACP init failed\n");
child = chip->chip_pdev->dev;
adata = dev_get_drvdata(&child);
if (adata)
acp_enable_interrupts(adata);
return ret;
}
static const struct dev_pm_ops acp_pm_ops = {
SET_RUNTIME_PM_OPS(snd_acp_suspend, snd_acp_resume, NULL)
SET_SYSTEM_SLEEP_PM_OPS(snd_acp_suspend, snd_acp_resume)
};
static void acp_pci_remove(struct pci_dev *pci)
{
struct acp_chip_info *chip;
int ret;
chip = pci_get_drvdata(pci);
pm_runtime_forbid(&pci->dev);
pm_runtime_get_noresume(&pci->dev);
if (dmic_dev)
platform_device_unregister(dmic_dev);
if (pdev)
platform_device_unregister(pdev);
ret = acp_deinit(chip->base);
if (ret)
dev_err(&pci->dev, "ACP de-init failed\n");
}
/* PCI IDs */
......@@ -173,8 +224,12 @@ static struct pci_driver snd_amd_acp_pci_driver = {
.id_table = acp_pci_ids,
.probe = acp_pci_probe,
.remove = acp_pci_remove,
.driver = {
.pm = &acp_pm_ops,
},
};
module_pci_driver(snd_amd_acp_pci_driver);
MODULE_LICENSE("Dual BSD/GPL");
MODULE_IMPORT_NS(SND_SOC_ACP_COMMON);
MODULE_ALIAS(DRV_NAME);
......@@ -25,18 +25,6 @@
#define DRV_NAME "acp-pdm"
#define PDM_DMA_STAT 0x10
#define PDM_DMA_INTR_MASK 0x10000
#define PDM_DEC_64 0x2
#define PDM_CLK_FREQ_MASK 0x07
#define PDM_MISC_CTRL_MASK 0x10
#define PDM_ENABLE 0x01
#define PDM_DISABLE 0x00
#define DMA_EN_MASK 0x02
#define DELAY_US 5
#define PDM_TIMEOUT 1000
#define ACP_REGION2_OFFSET 0x02000000
static int acp_dmic_prepare(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
......@@ -135,6 +123,7 @@ static int acp_dmic_hwparams(struct snd_pcm_substream *substream,
return -EINVAL;
}
adata->ch_mask = ch_mask;
if (params_format(hwparams) != SNDRV_PCM_FORMAT_S32_LE) {
dev_err(dai->dev, "Invalid format:%d\n", params_format(hwparams));
return -EINVAL;
......
......@@ -127,7 +127,7 @@ static irqreturn_t i2s_irq_handler(int irq, void *data)
return IRQ_NONE;
}
static void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream *stream)
void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream *stream)
{
struct acp_resource *rsrc = adata->rsrc;
u32 pte_reg, pte_size, reg_val;
......@@ -143,8 +143,9 @@ static void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream
writel(PAGE_SIZE_4K_ENABLE, adata->acp_base + pte_size);
writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
}
EXPORT_SYMBOL_NS_GPL(config_pte_for_stream, SND_SOC_ACP_COMMON);
static void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream, int size)
void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream, int size)
{
struct snd_pcm_substream *substream = stream->substream;
struct acp_resource *rsrc = adata->rsrc;
......@@ -168,6 +169,7 @@ static void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream
addr += PAGE_SIZE;
}
}
EXPORT_SYMBOL_NS_GPL(config_acp_dma, SND_SOC_ACP_COMMON);
static int acp_dma_open(struct snd_soc_component *component, struct snd_pcm_substream *substream)
{
......
......@@ -19,30 +19,17 @@
#include <sound/soc.h>
#include <sound/soc-dai.h>
#include <linux/dma-mapping.h>
#include <linux/pci.h>
#include <linux/pm_runtime.h>
#include "amd.h"
#define DRV_NAME "acp_asoc_rembrandt"
#define ACP6X_PGFSM_CONTROL 0x1024
#define ACP6X_PGFSM_STATUS 0x1028
#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
#define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0x00
#define ACP_PGFSM_STATUS_MASK 0x03
#define ACP_POWERED_ON 0x00
#define ACP_POWER_ON_IN_PROGRESS 0x01
#define ACP_POWERED_OFF 0x02
#define ACP_POWER_OFF_IN_PROGRESS 0x03
#define ACP_ERROR_MASK 0x20000000
#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF
static int rmb_acp_init(void __iomem *base);
static int rmb_acp_deinit(void __iomem *base);
#define MP1_C2PMSG_69 0x3B10A14
#define MP1_C2PMSG_85 0x3B10A54
#define MP1_C2PMSG_93 0x3B10A74
#define HOST_BRIDGE_ID 0x14B5
static struct acp_resource rsrc = {
.offset = 0,
......@@ -180,108 +167,22 @@ static struct snd_soc_dai_driver acp_rmb_dai[] = {
},
};
static int acp6x_power_on(void __iomem *base)
{
u32 val;
int timeout;
val = readl(base + ACP6X_PGFSM_STATUS);
if (val == ACP_POWERED_ON)
return 0;
if ((val & ACP_PGFSM_STATUS_MASK) !=
ACP_POWER_ON_IN_PROGRESS)
writel(ACP_PGFSM_CNTL_POWER_ON_MASK,
base + ACP6X_PGFSM_CONTROL);
timeout = 0;
while (++timeout < 500) {
val = readl(base + ACP6X_PGFSM_STATUS);
if (!val)
return 0;
udelay(1);
}
return -ETIMEDOUT;
}
static int acp6x_reset(void __iomem *base)
{
u32 val;
int timeout;
writel(1, base + ACP_SOFT_RESET);
timeout = 0;
while (++timeout < 500) {
val = readl(base + ACP_SOFT_RESET);
if (val & ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK)
break;
cpu_relax();
}
writel(0, base + ACP_SOFT_RESET);
timeout = 0;
while (++timeout < 500) {
val = readl(base + ACP_SOFT_RESET);
if (!val)
return 0;
cpu_relax();
}
return -ETIMEDOUT;
}
static void acp6x_enable_interrupts(struct acp_dev_data *adata)
{
struct acp_resource *rsrc = adata->rsrc;
u32 ext_intr_ctrl;
writel(0x01, ACP_EXTERNAL_INTR_ENB(adata));
ext_intr_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
ext_intr_ctrl |= ACP_ERROR_MASK;
writel(ext_intr_ctrl, ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
}
static void acp6x_disable_interrupts(struct acp_dev_data *adata)
{
struct acp_resource *rsrc = adata->rsrc;
writel(ACP_EXT_INTR_STAT_CLEAR_MASK,
ACP_EXTERNAL_INTR_STAT(adata, rsrc->irqp_used));
writel(0x00, ACP_EXTERNAL_INTR_ENB(adata));
}
static int rmb_acp_init(void __iomem *base)
{
int ret;
/* power on */
ret = acp6x_power_on(base);
if (ret) {
pr_err("ACP power on failed\n");
return ret;
}
writel(0x01, base + ACP_CONTROL);
/* Reset */
ret = acp6x_reset(base);
if (ret) {
pr_err("ACP reset failed\n");
return ret;
}
return 0;
}
static int rmb_acp_deinit(void __iomem *base)
static int acp6x_master_clock_generate(struct device *dev)
{
int ret = 0;
int data = 0;
struct pci_dev *smn_dev;
/* Reset */
ret = acp6x_reset(base);
if (ret) {
pr_err("ACP reset failed\n");
return ret;
smn_dev = pci_get_device(PCI_VENDOR_ID_AMD, HOST_BRIDGE_ID, NULL);
if (!smn_dev) {
dev_err(dev, "Failed to get host bridge device\n");
return -ENODEV;
}
writel(0x00, base + ACP_CONTROL);
smn_write(smn_dev, MP1_C2PMSG_93, 0);
smn_write(smn_dev, MP1_C2PMSG_85, 0xC4);
smn_write(smn_dev, MP1_C2PMSG_69, 0x4);
read_poll_timeout(smn_read, data, data, DELAY_US,
ACP_TIMEOUT, false, smn_dev, MP1_C2PMSG_93);
return 0;
}
......@@ -303,8 +204,6 @@ static int rembrandt_audio_probe(struct platform_device *pdev)
return -ENODEV;
}
rmb_acp_init(chip->base);
adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
if (!adata)
return -ENOMEM;
......@@ -335,9 +234,14 @@ static int rembrandt_audio_probe(struct platform_device *pdev)
acp_machine_select(adata);
dev_set_drvdata(dev, adata);
acp6x_enable_interrupts(adata);
acp6x_master_clock_generate(dev);
acp_enable_interrupts(adata);
acp_platform_register(dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_mark_last_busy(&pdev->dev);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
return 0;
}
......@@ -345,19 +249,51 @@ static void rembrandt_audio_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct acp_dev_data *adata = dev_get_drvdata(dev);
struct acp_chip_info *chip = dev_get_platdata(dev);
rmb_acp_deinit(chip->base);
acp6x_disable_interrupts(adata);
acp_disable_interrupts(adata);
acp_platform_unregister(dev);
pm_runtime_disable(&pdev->dev);
}
static int __maybe_unused rmb_pcm_resume(struct device *dev)
{
struct acp_dev_data *adata = dev_get_drvdata(dev);
struct acp_stream *stream;
struct snd_pcm_substream *substream;
snd_pcm_uframes_t buf_in_frames;
u64 buf_size;
acp6x_master_clock_generate(dev);
spin_lock(&adata->acp_lock);
list_for_each_entry(stream, &adata->stream_list, list) {
if (stream) {
substream = stream->substream;
if (substream && substream->runtime) {
buf_in_frames = (substream->runtime->buffer_size);
buf_size = frames_to_bytes(substream->runtime, buf_in_frames);
config_pte_for_stream(adata, stream);
config_acp_dma(adata, stream, buf_size);
if (stream->dai_id)
restore_acp_i2s_params(substream, adata, stream);
else
restore_acp_pdm_params(substream, adata);
}
}
}
spin_unlock(&adata->acp_lock);
return 0;
}
static const struct dev_pm_ops rmb_dma_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(NULL, rmb_pcm_resume)
};
static struct platform_driver rembrandt_driver = {
.probe = rembrandt_audio_probe,
.remove_new = rembrandt_audio_remove,
.driver = {
.name = "acp_asoc_rembrandt",
.pm = &rmb_dma_pm_ops,
},
};
......
......@@ -25,20 +25,6 @@
#define DRV_NAME "acp_asoc_renoir"
#define ACP_SOFT_RST_DONE_MASK 0x00010001
#define ACP_PWR_ON_MASK 0x01
#define ACP_PWR_OFF_MASK 0x00
#define ACP_PGFSM_STAT_MASK 0x03
#define ACP_POWERED_ON 0x00
#define ACP_PWR_ON_IN_PROGRESS 0x01
#define ACP_POWERED_OFF 0x02
#define DELAY_US 5
#define ACP_TIMEOUT 500
#define ACP_ERROR_MASK 0x20000000
#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF
static struct acp_resource rsrc = {
.offset = 20,
.no_of_ctrls = 1,
......@@ -154,89 +140,7 @@ static struct snd_soc_dai_driver acp_renoir_dai[] = {
},
};
static int acp3x_power_on(void __iomem *base)
{
u32 val;
val = readl(base + ACP_PGFSM_STATUS);
if (val == ACP_POWERED_ON)
return 0;
if ((val & ACP_PGFSM_STAT_MASK) != ACP_PWR_ON_IN_PROGRESS)
writel(ACP_PWR_ON_MASK, base + ACP_PGFSM_CONTROL);
return readl_poll_timeout(base + ACP_PGFSM_STATUS, val, !val, DELAY_US, ACP_TIMEOUT);
}
static int acp3x_reset(void __iomem *base)
{
u32 val;
int ret;
writel(1, base + ACP_SOFT_RESET);
ret = readl_poll_timeout(base + ACP_SOFT_RESET, val, val & ACP_SOFT_RST_DONE_MASK,
DELAY_US, ACP_TIMEOUT);
if (ret)
return ret;
writel(0, base + ACP_SOFT_RESET);
return readl_poll_timeout(base + ACP_SOFT_RESET, val, !val, DELAY_US, ACP_TIMEOUT);
}
static void acp3x_enable_interrupts(struct acp_dev_data *adata)
{
struct acp_resource *rsrc = adata->rsrc;
u32 ext_intr_ctrl;
writel(0x01, ACP_EXTERNAL_INTR_ENB(adata));
ext_intr_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
ext_intr_ctrl |= ACP_ERROR_MASK;
writel(ext_intr_ctrl, ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
}
static void acp3x_disable_interrupts(struct acp_dev_data *adata)
{
struct acp_resource *rsrc = adata->rsrc;
writel(ACP_EXT_INTR_STAT_CLEAR_MASK,
ACP_EXTERNAL_INTR_STAT(adata, rsrc->irqp_used));
writel(0x00, ACP_EXTERNAL_INTR_ENB(adata));
}
static int rn_acp_init(void __iomem *base)
{
int ret;
/* power on */
ret = acp3x_power_on(base);
if (ret)
return ret;
writel(0x01, base + ACP_CONTROL);
/* Reset */
ret = acp3x_reset(base);
if (ret)
return ret;
return 0;
}
static int rn_acp_deinit(void __iomem *base)
{
int ret = 0;
/* Reset */
ret = acp3x_reset(base);
if (ret)
return ret;
writel(0x00, base + ACP_CONTROL);
return 0;
}
static int renoir_audio_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
......@@ -256,12 +160,6 @@ static int renoir_audio_probe(struct platform_device *pdev)
return -ENODEV;
}
ret = rn_acp_init(chip->base);
if (ret) {
dev_err(&pdev->dev, "ACP Init failed\n");
return -EINVAL;
}
adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
if (!adata)
return -ENOMEM;
......@@ -290,7 +188,7 @@ static int renoir_audio_probe(struct platform_device *pdev)
acp_machine_select(adata);
dev_set_drvdata(dev, adata);
acp3x_enable_interrupts(adata);
acp_enable_interrupts(adata);
acp_platform_register(dev);
return 0;
......@@ -300,17 +198,8 @@ static void renoir_audio_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct acp_dev_data *adata = dev_get_drvdata(dev);
struct acp_chip_info *chip;
int ret;
chip = dev_get_platdata(&pdev->dev);
acp3x_disable_interrupts(adata);
ret = rn_acp_deinit(chip->base);
if (ret)
dev_err(&pdev->dev, "ACP de-init Failed (%pe)\n", ERR_PTR(ret));
acp_disable_interrupts(adata);
acp_platform_unregister(dev);
}
......
......@@ -92,10 +92,43 @@
#define SLOT_WIDTH_24 0x18
#define SLOT_WIDTH_32 0x20
#define ACP6X_PGFSM_CONTROL 0x1024
#define ACP6X_PGFSM_STATUS 0x1028
#define ACP_SOFT_RST_DONE_MASK 0x00010001
#define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0x00
#define ACP_PGFSM_STATUS_MASK 0x03
#define ACP_POWERED_ON 0x00
#define ACP_POWER_ON_IN_PROGRESS 0x01
#define ACP_POWERED_OFF 0x02
#define ACP_POWER_OFF_IN_PROGRESS 0x03
#define ACP_ERROR_MASK 0x20000000
#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xffffffff
#define ACP_TIMEOUT 500
#define DELAY_US 5
#define ACP_SUSPEND_DELAY_MS 2000
#define PDM_DMA_STAT 0x10
#define PDM_DMA_INTR_MASK 0x10000
#define PDM_DEC_64 0x2
#define PDM_CLK_FREQ_MASK 0x07
#define PDM_MISC_CTRL_MASK 0x10
#define PDM_ENABLE 0x01
#define PDM_DISABLE 0x00
#define DMA_EN_MASK 0x02
#define DELAY_US 5
#define PDM_TIMEOUT 1000
#define ACP_REGION2_OFFSET 0x02000000
struct acp_chip_info {
char *name; /* Platform name */
unsigned int acp_rev; /* ACP Revision id */
void __iomem *base; /* ACP memory PCI base */
struct platform_device *chip_pdev;
};
struct acp_stream {
......@@ -144,8 +177,11 @@ struct acp_dev_data {
u32 lrclk_div;
struct acp_resource *rsrc;
u32 ch_mask;
u32 tdm_tx_fmt[3];
u32 tdm_rx_fmt[3];
u32 xfer_tx_resolution[3];
u32 xfer_rx_resolution[3];
};
union acp_i2stdm_mstrclkgen {
......@@ -168,9 +204,24 @@ int acp_platform_unregister(struct device *dev);
int acp_machine_select(struct acp_dev_data *adata);
int smn_read(struct pci_dev *dev, u32 smn_addr);
int smn_write(struct pci_dev *dev, u32 smn_addr, u32 data);
int acp_init(struct acp_chip_info *chip);
int acp_deinit(void __iomem *base);
void acp_enable_interrupts(struct acp_dev_data *adata);
void acp_disable_interrupts(struct acp_dev_data *adata);
/* Machine configuration */
int snd_amd_acp_find_config(struct pci_dev *pci);
void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream *stream);
void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream, int size);
void restore_acp_pdm_params(struct snd_pcm_substream *substream,
struct acp_dev_data *adata);
int restore_acp_i2s_params(struct snd_pcm_substream *substream,
struct acp_dev_data *adata, struct acp_stream *stream);
static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int direction)
{
u64 byte_count = 0, low = 0, high = 0;
......
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