Commit 948b0ae6 authored by Jani Nikula's avatar Jani Nikula

drm/i915/edp: postpone MSO init until after EDID read

MSO will require segment pixel overlap information from the
EDID. Postpone MSO init until after we've read and cached the EDID.
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7a360fca01be0f971337b3635f4e4752922ffebe.1630419362.git.jani.nikula@intel.com
parent 18a9cbbe
...@@ -2568,8 +2568,6 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) ...@@ -2568,8 +2568,6 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
*/ */
intel_edp_init_source_oui(intel_dp, true); intel_edp_init_source_oui(intel_dp, true);
intel_edp_mso_init(intel_dp);
return true; return true;
} }
...@@ -4848,6 +4846,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, ...@@ -4848,6 +4846,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
if (fixed_mode) if (fixed_mode)
downclock_mode = intel_drrs_init(intel_connector, fixed_mode); downclock_mode = intel_drrs_init(intel_connector, fixed_mode);
/* MSO requires information from the EDID */
intel_edp_mso_init(intel_dp);
/* multiply the mode clock and horizontal timings for MSO */ /* multiply the mode clock and horizontal timings for MSO */
intel_edp_mso_mode_fixup(intel_connector, fixed_mode); intel_edp_mso_mode_fixup(intel_connector, fixed_mode);
intel_edp_mso_mode_fixup(intel_connector, downclock_mode); intel_edp_mso_mode_fixup(intel_connector, downclock_mode);
......
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