Commit 949feacb authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'nios2-v4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2

Pull nios2 updates from Ley Foon Tan:

 - add defconfig and device tree for max 10 support
 - migrate to new 'set-state' interface for timer
 - fix unaligned handler
 - MAINTAINERS: update nios2 git repo

* tag 'nios2-v4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
  nios2: add Max10 defconfig
  nios2: Add Max10 device tree
  MAINTAINERS: update nios2 git repo
  nios2: remove unused statistic counters
  nios2: fixed variable imm16 to s16
  nios2/time: Migrate to new 'set-state' interface
parents 384989b5 08441d46
...@@ -7377,7 +7377,7 @@ F: drivers/scsi/nsp32* ...@@ -7377,7 +7377,7 @@ F: drivers/scsi/nsp32*
NIOS2 ARCHITECTURE NIOS2 ARCHITECTURE
M: Ley Foon Tan <lftan@altera.com> M: Ley Foon Tan <lftan@altera.com>
L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers) L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers)
T: git git://git.rocketboards.org/linux-socfpga-next.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2.git
S: Maintained S: Maintained
F: arch/nios2/ F: arch/nios2/
......
/*
* Copyright (C) 2015 Altera Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
/dts-v1/;
/ {
model = "Altera NiosII Max10";
compatible = "altr,niosii-max10";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu: cpu@0 {
device_type = "cpu";
compatible = "altr,nios2-1.1";
reg = <0x00000000>;
interrupt-controller;
#interrupt-cells = <1>;
altr,exception-addr = <0xc8000120>;
altr,fast-tlb-miss-addr = <0xc0000100>;
altr,has-div = <1>;
altr,has-initda = <1>;
altr,has-mmu = <1>;
altr,has-mul = <1>;
altr,implementation = "fast";
altr,pid-num-bits = <8>;
altr,reset-addr = <0xd4000000>;
altr,tlb-num-entries = <256>;
altr,tlb-num-ways = <16>;
altr,tlb-ptr-sz = <8>;
clock-frequency = <75000000>;
dcache-line-size = <32>;
dcache-size = <32768>;
icache-line-size = <32>;
icache-size = <32768>;
};
};
memory {
device_type = "memory";
reg = <0x08000000 0x08000000>,
<0x00000000 0x00000400>;
};
sopc0: sopc@0 {
device_type = "soc";
ranges;
#address-cells = <1>;
#size-cells = <1>;
compatible = "altr,avalon", "simple-bus";
bus-frequency = <75000000>;
jtag_uart: serial@18001530 {
compatible = "altr,juart-1.0";
reg = <0x18001530 0x00000008>;
interrupt-parent = <&cpu>;
interrupts = <7>;
};
a_16550_uart_0: serial@18001600 {
compatible = "altr,16550-FIFO32", "ns16550a";
reg = <0x18001600 0x00000200>;
interrupt-parent = <&cpu>;
interrupts = <1>;
auto-flow-control = <1>;
clock-frequency = <50000000>;
fifo-size = <32>;
reg-io-width = <4>;
reg-shift = <2>;
};
sysid: sysid@18001528 {
compatible = "altr,sysid-1.0";
reg = <0x18001528 0x00000008>;
id = <4207856382>;
timestamp = <1431309290>;
};
rgmii_0_eth_tse_0: ethernet@400 {
compatible = "altr,tse-msgdma-1.0", "altr,tse-1.0";
reg = <0x00000400 0x00000400>,
<0x00000820 0x00000020>,
<0x00000800 0x00000020>,
<0x000008c0 0x00000008>,
<0x00000840 0x00000020>,
<0x00000860 0x00000020>;
reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
interrupt-parent = <&cpu>;
interrupts = <2 3>;
interrupt-names = "rx_irq", "tx_irq";
rx-fifo-depth = <8192>;
tx-fifo-depth = <8192>;
address-bits = <48>;
max-frame-size = <1518>;
local-mac-address = [00 00 00 00 00 00];
altr,has-supplementary-unicast;
altr,enable-sup-addr = <1>;
altr,has-hash-multicast-filter;
altr,enable-hash = <1>;
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
rgmii_0_eth_tse_0_mdio: mdio {
compatible = "altr,tse-mdio";
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
device_type = "ethernet-phy";
};
};
};
enet_pll: clock@0 {
compatible = "altr,pll-1.0";
#clock-cells = <1>;
enet_pll_c0: enet_pll_c0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
clock-output-names = "enet_pll-c0";
};
enet_pll_c1: enet_pll_c1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "enet_pll-c1";
};
enet_pll_c2: enet_pll_c2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2500000>;
clock-output-names = "enet_pll-c2";
};
};
sys_pll: clock@1 {
compatible = "altr,pll-1.0";
#clock-cells = <1>;
sys_pll_c0: sys_pll_c0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "sys_pll-c0";
};
sys_pll_c1: sys_pll_c1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "sys_pll-c1";
};
sys_pll_c2: sys_pll_c2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <75000000>;
clock-output-names = "sys_pll-c2";
};
};
sys_clk_timer: timer@18001440 {
compatible = "altr,timer-1.0";
reg = <0x18001440 0x00000020>;
interrupt-parent = <&cpu>;
interrupts = <0>;
clock-frequency = <75000000>;
};
led_pio: gpio@180014d0 {
compatible = "altr,pio-1.0";
reg = <0x180014d0 0x00000010>;
altr,gpio-bank-width = <4>;
resetvalue = <15>;
#gpio-cells = <2>;
gpio-controller;
};
button_pio: gpio@180014c0 {
compatible = "altr,pio-1.0";
reg = <0x180014c0 0x00000010>;
interrupt-parent = <&cpu>;
interrupts = <6>;
altr,gpio-bank-width = <3>;
altr,interrupt-type = <2>;
edge_type = <1>;
level_trigger = <0>;
resetvalue = <0>;
#gpio-cells = <2>;
gpio-controller;
};
sys_clk_timer_1: timer@880 {
compatible = "altr,timer-1.0";
reg = <0x00000880 0x00000020>;
interrupt-parent = <&cpu>;
interrupts = <5>;
clock-frequency = <75000000>;
};
fpga_leds: leds {
compatible = "gpio-leds";
led_fpga0: fpga0 {
label = "fpga_led0";
gpios = <&led_pio 0 1>;
};
led_fpga1: fpga1 {
label = "fpga_led1";
gpios = <&led_pio 1 1>;
};
led_fpga2: fpga2 {
label = "fpga_led2";
gpios = <&led_pio 2 1>;
};
led_fpga3: fpga3 {
label = "fpga_led3";
gpios = <&led_pio 3 1>;
};
};
};
chosen {
bootargs = "debug console=ttyS0,115200";
};
};
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSCTL_SYSCALL=y
# CONFIG_ELF_CORE is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_TIMERFD is not set
# CONFIG_EVENTFD is not set
# CONFIG_SHMEM is not set
# CONFIG_AIO is not set
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_NIOS2_MEM_BASE=0x8000000
CONFIG_NIOS2_HW_MUL_SUPPORT=y
CONFIG_NIOS2_HW_DIV_SUPPORT=y
CONFIG_CUSTOM_CACHE_SETTINGS=y
CONFIG_NIOS2_DCACHE_SIZE=0x8000
CONFIG_NIOS2_ICACHE_SIZE=0x8000
# CONFIG_NIOS2_CMDLINE_IGNORE_DTB is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FW_LOADER is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_NETDEVICES=y
CONFIG_ALTERA_TSE=y
CONFIG_MARVELL_PHY=y
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_VT is not set
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_ALTERA_JTAGUART=y
# CONFIG_HW_RANDOM is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_ALTERA=y
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_ROOT_NFS=y
CONFIG_SUNRPC_DEBUG=y
CONFIG_DEBUG_INFO=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
...@@ -32,8 +32,6 @@ ...@@ -32,8 +32,6 @@
#define INST_STW 0x15 #define INST_STW 0x15
#define INST_LDW 0x17 #define INST_LDW 0x17
static unsigned long ma_user, ma_kern, ma_skipped, ma_half, ma_word;
static unsigned int ma_usermode; static unsigned int ma_usermode;
#define UM_WARN 0x01 #define UM_WARN 0x01
#define UM_FIXUP 0x02 #define UM_FIXUP 0x02
...@@ -53,7 +51,6 @@ static int reg_offsets[32]; ...@@ -53,7 +51,6 @@ static int reg_offsets[32];
static inline u32 get_reg_val(struct pt_regs *fp, int reg) static inline u32 get_reg_val(struct pt_regs *fp, int reg)
{ {
u8 *p = ((u8 *)fp) + reg_offsets[reg]; u8 *p = ((u8 *)fp) + reg_offsets[reg];
return *(u32 *)p; return *(u32 *)p;
} }
...@@ -71,14 +68,13 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -71,14 +68,13 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
u32 isn, addr, val; u32 isn, addr, val;
int in_kernel; int in_kernel;
u8 a, b, d0, d1, d2, d3; u8 a, b, d0, d1, d2, d3;
u16 imm16; s16 imm16;
unsigned int fault; unsigned int fault;
/* back up one instruction */ /* back up one instruction */
fp->ea -= 4; fp->ea -= 4;
if (fixup_exception(fp)) { if (fixup_exception(fp)) {
ma_skipped++;
return; return;
} }
...@@ -103,18 +99,11 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -103,18 +99,11 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
fault |= __get_user(d1, (u8 *)(addr+1)); fault |= __get_user(d1, (u8 *)(addr+1));
val = (d1 << 8) | d0; val = (d1 << 8) | d0;
put_reg_val(fp, b, val); put_reg_val(fp, b, val);
ma_half++;
break; break;
case INST_STH: case INST_STH:
val = get_reg_val(fp, b); val = get_reg_val(fp, b);
d1 = val >> 8; d1 = val >> 8;
d0 = val >> 0; d0 = val >> 0;
pr_debug("sth: ra=%d (%08x) rb=%d (%08x), imm16 %04x addr %08x val %08x\n",
a, get_reg_val(fp, a),
b, get_reg_val(fp, b),
imm16, addr, val);
if (in_kernel) { if (in_kernel) {
*(u8 *)(addr+0) = d0; *(u8 *)(addr+0) = d0;
*(u8 *)(addr+1) = d1; *(u8 *)(addr+1) = d1;
...@@ -122,14 +111,12 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -122,14 +111,12 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
fault |= __put_user(d0, (u8 *)(addr+0)); fault |= __put_user(d0, (u8 *)(addr+0));
fault |= __put_user(d1, (u8 *)(addr+1)); fault |= __put_user(d1, (u8 *)(addr+1));
} }
ma_half++;
break; break;
case INST_LDH: case INST_LDH:
fault |= __get_user(d0, (u8 *)(addr+0)); fault |= __get_user(d0, (u8 *)(addr+0));
fault |= __get_user(d1, (u8 *)(addr+1)); fault |= __get_user(d1, (u8 *)(addr+1));
val = (short)((d1 << 8) | d0); val = (short)((d1 << 8) | d0);
put_reg_val(fp, b, val); put_reg_val(fp, b, val);
ma_half++;
break; break;
case INST_STW: case INST_STW:
val = get_reg_val(fp, b); val = get_reg_val(fp, b);
...@@ -148,7 +135,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -148,7 +135,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
fault |= __put_user(d2, (u8 *)(addr+2)); fault |= __put_user(d2, (u8 *)(addr+2));
fault |= __put_user(d3, (u8 *)(addr+3)); fault |= __put_user(d3, (u8 *)(addr+3));
} }
ma_word++;
break; break;
case INST_LDW: case INST_LDW:
fault |= __get_user(d0, (u8 *)(addr+0)); fault |= __get_user(d0, (u8 *)(addr+0));
...@@ -157,7 +143,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -157,7 +143,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
fault |= __get_user(d3, (u8 *)(addr+3)); fault |= __get_user(d3, (u8 *)(addr+3));
val = (d3 << 24) | (d2 << 16) | (d1 << 8) | d0; val = (d3 << 24) | (d2 << 16) | (d1 << 8) | d0;
put_reg_val(fp, b, val); put_reg_val(fp, b, val);
ma_word++;
break; break;
} }
} }
...@@ -186,7 +171,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -186,7 +171,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
* note exception and skip bad instruction (return) * note exception and skip bad instruction (return)
*/ */
if (in_kernel) { if (in_kernel) {
ma_kern++;
fp->ea += 4; fp->ea += 4;
if (ma_usermode & KM_WARN) { if (ma_usermode & KM_WARN) {
...@@ -200,8 +184,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) ...@@ -200,8 +184,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
return; return;
} }
ma_user++;
/* /*
* user mode - * user mode -
* possibly warn, * possibly warn,
......
...@@ -130,7 +130,7 @@ static void nios2_timer_stop(struct nios2_timer *timer) ...@@ -130,7 +130,7 @@ static void nios2_timer_stop(struct nios2_timer *timer)
} }
static void nios2_timer_config(struct nios2_timer *timer, unsigned long period, static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
enum clock_event_mode mode) bool periodic)
{ {
u16 ctrl; u16 ctrl;
...@@ -148,7 +148,7 @@ static void nios2_timer_config(struct nios2_timer *timer, unsigned long period, ...@@ -148,7 +148,7 @@ static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG); timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG);
ctrl |= ALTERA_TIMER_CONTROL_START_MSK | ALTERA_TIMER_CONTROL_ITO_MSK; ctrl |= ALTERA_TIMER_CONTROL_START_MSK | ALTERA_TIMER_CONTROL_ITO_MSK;
if (mode == CLOCK_EVT_MODE_PERIODIC) if (periodic)
ctrl |= ALTERA_TIMER_CONTROL_CONT_MSK; ctrl |= ALTERA_TIMER_CONTROL_CONT_MSK;
else else
ctrl &= ~ALTERA_TIMER_CONTROL_CONT_MSK; ctrl &= ~ALTERA_TIMER_CONTROL_CONT_MSK;
...@@ -160,32 +160,38 @@ static int nios2_timer_set_next_event(unsigned long delta, ...@@ -160,32 +160,38 @@ static int nios2_timer_set_next_event(unsigned long delta,
{ {
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt); struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
nios2_timer_config(&nios2_ced->timer, delta, evt->mode); nios2_timer_config(&nios2_ced->timer, delta, false);
return 0; return 0;
} }
static void nios2_timer_set_mode(enum clock_event_mode mode, static int nios2_timer_shutdown(struct clock_event_device *evt)
struct clock_event_device *evt) {
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
struct nios2_timer *timer = &nios2_ced->timer;
nios2_timer_stop(timer);
return 0;
}
static int nios2_timer_set_periodic(struct clock_event_device *evt)
{ {
unsigned long period; unsigned long period;
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt); struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
struct nios2_timer *timer = &nios2_ced->timer; struct nios2_timer *timer = &nios2_ced->timer;
switch (mode) { period = DIV_ROUND_UP(timer->freq, HZ);
case CLOCK_EVT_MODE_PERIODIC: nios2_timer_config(timer, period, true);
period = DIV_ROUND_UP(timer->freq, HZ); return 0;
nios2_timer_config(timer, period, CLOCK_EVT_MODE_PERIODIC); }
break;
case CLOCK_EVT_MODE_ONESHOT: static int nios2_timer_resume(struct clock_event_device *evt)
case CLOCK_EVT_MODE_UNUSED: {
case CLOCK_EVT_MODE_SHUTDOWN: struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
nios2_timer_stop(timer); struct nios2_timer *timer = &nios2_ced->timer;
break;
case CLOCK_EVT_MODE_RESUME: nios2_timer_start(timer);
nios2_timer_start(timer); return 0;
break;
}
} }
irqreturn_t timer_interrupt(int irq, void *dev_id) irqreturn_t timer_interrupt(int irq, void *dev_id)
...@@ -218,7 +224,10 @@ static struct nios2_clockevent_dev nios2_ce = { ...@@ -218,7 +224,10 @@ static struct nios2_clockevent_dev nios2_ce = {
.rating = 250, .rating = 250,
.shift = 32, .shift = 32,
.set_next_event = nios2_timer_set_next_event, .set_next_event = nios2_timer_set_next_event,
.set_mode = nios2_timer_set_mode, .set_state_shutdown = nios2_timer_shutdown,
.set_state_periodic = nios2_timer_set_periodic,
.set_state_oneshot = nios2_timer_shutdown,
.tick_resume = nios2_timer_resume,
}, },
}; };
......
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