Commit 94fc0ee2 authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Simon Horman

arm64: dts: renesas: cat874: Add HDMI video support

The CAT874 board comes with a HDMI connector, managed by
a TDA19988BET chip, connected to the RZ/G2E SoC via DPAD.
This patch adds the necessary support to the board DT.
Signed-off-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 57cfa731
...@@ -22,6 +22,17 @@ chosen { ...@@ -22,6 +22,17 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_out: endpoint {
remote-endpoint = <&tda19988_out>;
};
};
};
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
...@@ -74,6 +85,31 @@ vccq_sdhi0: regulator-vccq-sdhi0 { ...@@ -74,6 +85,31 @@ vccq_sdhi0: regulator-vccq-sdhi0 {
states = <3300000 1 states = <3300000 1
1800000 0>; 1800000 0>;
}; };
x13_clk: x13 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&x13_clk>;
clock-names = "du.0", "du.1", "dclkin.0";
ports {
port@0 {
endpoint {
remote-endpoint = <&tda19988_in>;
};
};
};
}; };
&ehci0 { &ehci0 {
...@@ -85,6 +121,39 @@ &extal_clk { ...@@ -85,6 +121,39 @@ &extal_clk {
clock-frequency = <48000000>; clock-frequency = <48000000>;
}; };
&i2c0 {
status = "okay";
clock-frequency = <100000>;
tda19988: tda19988@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
video-ports = <0x234501>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tda19988_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
tda19988_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
&i2c1 { &i2c1 {
pinctrl-0 = <&i2c1_pins>; pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -98,6 +167,13 @@ rtc@32 { ...@@ -98,6 +167,13 @@ rtc@32 {
}; };
}; };
&lvds0 {
status = "okay";
clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
clock-names = "fck", "dclkin.0", "extal";
};
&ohci0 { &ohci0 {
dr_mode = "host"; dr_mode = "host";
status = "okay"; status = "okay";
...@@ -113,6 +189,12 @@ &pciec0 { ...@@ -113,6 +189,12 @@ &pciec0 {
}; };
&pfc { &pfc {
du_pins: du {
groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
"du_clk_in_0";
function = "du";
};
i2c1_pins: i2c1 { i2c1_pins: i2c1 {
groups = "i2c1_b"; groups = "i2c1_b";
function = "i2c1"; function = "i2c1";
......
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