Commit 95792178 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville

ath9k_hw: merge ath9k_hw_ani_monitor_old and ath9k_hw_ani_monitor_new

After the last rounds of cleanup, these functions are now functionally
equivalent and can thus be merged.
Also get rid of some excessive (and redundant) debug messages.
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 8eb4980c
...@@ -730,40 +730,7 @@ static void ath9k_hw_ani_read_counters(struct ath_hw *ah) ...@@ -730,40 +730,7 @@ static void ath9k_hw_ani_read_counters(struct ath_hw *ah)
} }
static void ath9k_hw_ani_monitor_old(struct ath_hw *ah, void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)
struct ath9k_channel *chan)
{
struct ar5416AniState *aniState;
if (!DO_ANI(ah))
return;
aniState = &ah->curchan->ani;
ath9k_hw_ani_read_counters(ah);
if (aniState->listenTime > 5 * ah->aniperiod) {
if (aniState->ofdmPhyErrCount <= aniState->listenTime *
ah->config.ofdm_trig_low / 1000 &&
aniState->cckPhyErrCount <= aniState->listenTime *
ah->config.cck_trig_low / 1000)
ath9k_hw_ani_lower_immunity(ah);
ath9k_ani_restart(ah);
} else if (aniState->listenTime > ah->aniperiod) {
if (aniState->ofdmPhyErrCount > aniState->listenTime *
ah->config.ofdm_trig_high / 1000) {
ath9k_hw_ani_ofdm_err_trigger(ah);
ath9k_ani_restart(ah);
} else if (aniState->cckPhyErrCount >
aniState->listenTime * ah->config.cck_trig_high /
1000) {
ath9k_hw_ani_cck_err_trigger(ah);
ath9k_ani_restart(ah);
}
}
}
static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
struct ath9k_channel *chan)
{ {
struct ar5416AniState *aniState; struct ar5416AniState *aniState;
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
...@@ -794,54 +761,26 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah, ...@@ -794,54 +761,26 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
if (aniState->listenTime > 5 * ah->aniperiod) { if (aniState->listenTime > 5 * ah->aniperiod) {
if (ofdmPhyErrRate <= ah->config.ofdm_trig_low && if (ofdmPhyErrRate <= ah->config.ofdm_trig_low &&
cckPhyErrRate <= ah->config.cck_trig_low) { cckPhyErrRate <= ah->config.cck_trig_low) {
ath_print(common, ATH_DBG_ANI,
"1. listenTime=%d OFDM:%d errs=%d/s(<%d) "
"CCK:%d errs=%d/s(<%d) -> "
"ath9k_hw_ani_lower_immunity()\n",
aniState->listenTime,
aniState->ofdmNoiseImmunityLevel,
ofdmPhyErrRate,
ah->config.ofdm_trig_low,
aniState->cckNoiseImmunityLevel,
cckPhyErrRate,
ah->config.cck_trig_low);
ath9k_hw_ani_lower_immunity(ah); ath9k_hw_ani_lower_immunity(ah);
aniState->ofdmsTurn = !aniState->ofdmsTurn; aniState->ofdmsTurn = !aniState->ofdmsTurn;
} }
ath_print(common, ATH_DBG_ANI,
"1 listenTime=%d ofdm=%d/s cck=%d/s - "
"calling ath9k_ani_restart()\n",
aniState->listenTime, ofdmPhyErrRate, cckPhyErrRate);
ath9k_ani_restart(ah); ath9k_ani_restart(ah);
} else if (aniState->listenTime > ah->aniperiod) { } else if (aniState->listenTime > ah->aniperiod) {
/* check to see if need to raise immunity */ /* check to see if need to raise immunity */
if (ofdmPhyErrRate > ah->config.ofdm_trig_high && if (ofdmPhyErrRate > ah->config.ofdm_trig_high &&
(cckPhyErrRate <= ah->config.cck_trig_high || (cckPhyErrRate <= ah->config.cck_trig_high ||
aniState->ofdmsTurn)) { aniState->ofdmsTurn)) {
ath_print(common, ATH_DBG_ANI,
"2 listenTime=%d OFDM:%d errs=%d/s(>%d) -> "
"ath9k_hw_ani_ofdm_err_trigger()\n",
aniState->listenTime,
aniState->ofdmNoiseImmunityLevel,
ofdmPhyErrRate,
ah->config.ofdm_trig_high);
ath9k_hw_ani_ofdm_err_trigger(ah); ath9k_hw_ani_ofdm_err_trigger(ah);
ath9k_ani_restart(ah); ath9k_ani_restart(ah);
aniState->ofdmsTurn = false; aniState->ofdmsTurn = false;
} else if (cckPhyErrRate > ah->config.cck_trig_high) { } else if (cckPhyErrRate > ah->config.cck_trig_high) {
ath_print(common, ATH_DBG_ANI,
"3 listenTime=%d CCK:%d errs=%d/s(>%d) -> "
"ath9k_hw_ani_cck_err_trigger()\n",
aniState->listenTime,
aniState->cckNoiseImmunityLevel,
cckPhyErrRate,
ah->config.cck_trig_high);
ath9k_hw_ani_cck_err_trigger(ah); ath9k_hw_ani_cck_err_trigger(ah);
ath9k_ani_restart(ah); ath9k_ani_restart(ah);
aniState->ofdmsTurn = true; aniState->ofdmsTurn = true;
} }
} }
} }
EXPORT_SYMBOL(ath9k_hw_ani_monitor);
void ath9k_enable_mib_counters(struct ath_hw *ah) void ath9k_enable_mib_counters(struct ath_hw *ah)
{ {
...@@ -1065,21 +1004,3 @@ void ath9k_hw_ani_init(struct ath_hw *ah) ...@@ -1065,21 +1004,3 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
ath9k_ani_restart(ah); ath9k_ani_restart(ah);
ath9k_enable_mib_counters(ah); ath9k_enable_mib_counters(ah);
} }
void ath9k_hw_attach_ani_ops_old(struct ath_hw *ah)
{
struct ath_hw_ops *ops = ath9k_hw_ops(ah);
ops->ani_monitor = ath9k_hw_ani_monitor_old;
ath_print(ath9k_hw_common(ah), ATH_DBG_ANY, "Using ANI v1\n");
}
void ath9k_hw_attach_ani_ops_new(struct ath_hw *ah)
{
struct ath_hw_ops *ops = ath9k_hw_ops(ah);
ops->ani_monitor = ath9k_hw_ani_monitor_new;
ath_print(ath9k_hw_common(ah), ATH_DBG_ANY, "Using ANI v2\n");
}
...@@ -572,11 +572,6 @@ void ar9002_hw_attach_ops(struct ath_hw *ah) ...@@ -572,11 +572,6 @@ void ar9002_hw_attach_ops(struct ath_hw *ah)
ar9002_hw_attach_calib_ops(ah); ar9002_hw_attach_calib_ops(ah);
ar9002_hw_attach_mac_ops(ah); ar9002_hw_attach_mac_ops(ah);
if (modparam_force_new_ani)
ath9k_hw_attach_ani_ops_new(ah);
else
ath9k_hw_attach_ani_ops_old(ah);
} }
void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan) void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan)
......
...@@ -333,6 +333,4 @@ void ar9003_hw_attach_ops(struct ath_hw *ah) ...@@ -333,6 +333,4 @@ void ar9003_hw_attach_ops(struct ath_hw *ah)
ar9003_hw_attach_phy_ops(ah); ar9003_hw_attach_phy_ops(ah);
ar9003_hw_attach_calib_ops(ah); ar9003_hw_attach_calib_ops(ah);
ar9003_hw_attach_mac_ops(ah); ar9003_hw_attach_mac_ops(ah);
ath9k_hw_attach_ani_ops_new(ah);
} }
...@@ -128,12 +128,6 @@ static inline void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, void *ds, ...@@ -128,12 +128,6 @@ static inline void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, void *ds,
ath9k_hw_ops(ah)->set11n_virtualmorefrag(ah, ds, vmf); ath9k_hw_ops(ah)->set11n_virtualmorefrag(ah, ds, vmf);
} }
static inline void ath9k_hw_ani_monitor(struct ath_hw *ah,
struct ath9k_channel *chan)
{
ath9k_hw_ops(ah)->ani_monitor(ah, chan);
}
/* Private hardware call ops */ /* Private hardware call ops */
/* PHY ops */ /* PHY ops */
......
...@@ -564,9 +564,6 @@ struct ath_hw_private_ops { ...@@ -564,9 +564,6 @@ struct ath_hw_private_ops {
* *
* @config_pci_powersave: * @config_pci_powersave:
* @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
*
* @ani_monitor: called periodically by the core driver to collect
* MIB stats and adjust ANI if specific thresholds have been reached.
*/ */
struct ath_hw_ops { struct ath_hw_ops {
void (*config_pci_powersave)(struct ath_hw *ah, void (*config_pci_powersave)(struct ath_hw *ah,
...@@ -607,8 +604,6 @@ struct ath_hw_ops { ...@@ -607,8 +604,6 @@ struct ath_hw_ops {
u32 burstDuration); u32 burstDuration);
void (*set11n_virtualmorefrag)(struct ath_hw *ah, void *ds, void (*set11n_virtualmorefrag)(struct ath_hw *ah, void *ds,
u32 vmf); u32 vmf);
void (*ani_monitor)(struct ath_hw *ah, struct ath9k_channel *chan);
}; };
struct ath_nf_limits { struct ath_nf_limits {
...@@ -969,8 +964,7 @@ void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan); ...@@ -969,8 +964,7 @@ void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan);
extern int modparam_force_new_ani; extern int modparam_force_new_ani;
void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning); void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning);
void ath9k_hw_proc_mib_event(struct ath_hw *ah); void ath9k_hw_proc_mib_event(struct ath_hw *ah);
void ath9k_hw_attach_ani_ops_old(struct ath_hw *ah); void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan);
void ath9k_hw_attach_ani_ops_new(struct ath_hw *ah);
#define ATH_PCIE_CAP_LINK_CTRL 0x70 #define ATH_PCIE_CAP_LINK_CTRL 0x70
#define ATH_PCIE_CAP_LINK_L0S 1 #define ATH_PCIE_CAP_LINK_L0S 1
......
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