Commit 95963fd1 authored by Greg Ungerer's avatar Greg Ungerer Committed by Christoph Hellwig

[PATCH] move common timer and vector code for m68knommu/ColdFire/5206

This patch moves common ColdFire vector and timer procesing code from
the local per-processor config.c for the 5206 ColdFire sub-architecture.
All ColdFire CPU's have the same timer and basic vector setup, seems
crazy to repeat this code for each of 6 ColdFire CPU varients.
parent 6b043a6e
...@@ -25,6 +25,14 @@ ...@@ -25,6 +25,14 @@
/***************************************************************************/ /***************************************************************************/
void coldfire_tick(void);
void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *));
unsigned long coldfire_timer_offset(void);
void coldfire_trap_init(void);
void coldfire_reset(void);
/***************************************************************************/
/* /*
* DMA channel base address table. * DMA channel base address table.
*/ */
...@@ -33,47 +41,8 @@ unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { ...@@ -33,47 +41,8 @@ unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
MCF_MBAR + MCFDMA_BASE1, MCF_MBAR + MCFDMA_BASE1,
}; };
unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
/***************************************************************************/
void coldfire_tick(void)
{
volatile unsigned char *timerp;
/* Reset the ColdFire timer */
timerp = (volatile unsigned char *) (MCF_MBAR + MCFTIMER_BASE1);
timerp[MCFTIMER_TER] = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
}
/***************************************************************************/
void coldfire_timer_init(void (*handler)(int, void *, struct pt_regs *))
{
volatile unsigned short *timerp;
volatile unsigned char *icrp;
/* Set up TIMER 1 as poll clock */
timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE1);
timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE;
timerp[MCFTIMER_TRR] = (unsigned short) ((MCF_CLK / 16) / HZ);
timerp[MCFTIMER_TMR] = MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE;
icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_TIMER1ICR);
*icrp = MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI3;
request_irq(29, handler, SA_INTERRUPT, "ColdFire Timer", NULL);
mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_TIMER1);
}
/***************************************************************************/ /***************************************************************************/
/*
* Program the vector to be an auto-vectored.
*/
void mcf_autovector(unsigned int vec) void mcf_autovector(unsigned int vec)
{ {
volatile unsigned char *mbar; volatile unsigned char *mbar;
...@@ -91,65 +60,35 @@ void mcf_autovector(unsigned int vec) ...@@ -91,65 +60,35 @@ void mcf_autovector(unsigned int vec)
/***************************************************************************/ /***************************************************************************/
extern e_vector *_ramvec; void mcf_settimericr(unsigned int timer, unsigned int level)
void set_evector(int vecnum, void (*handler)(void))
{ {
if (vecnum >= 0 && vecnum <= 255) volatile unsigned char *icrp;
_ramvec[vecnum] = handler; unsigned int icr, imr;
}
if (timer <= 2) {
/***************************************************************************/ switch (timer) {
case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
/* assembler routines */ default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
asmlinkage void buserr(void); }
asmlinkage void trap(void);
asmlinkage void system_call(void); icrp = (volatile unsigned char *) (MCF_MBAR + icr);
asmlinkage void inthandler(void); *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
mcf_setimr(mcf_getimr() & ~imr);
void coldfire_trap_init(void) }
{
int i;
#ifndef ENABLE_dBUG
mcf_setimr(MCFSIM_IMR_MASKALL);
#endif
/*
* There is a common trap handler and common interrupt
* handler that handle almost every vector. We treat
* the system call and bus error special, they get their
* own first level handlers.
*/
#ifndef ENABLE_dBUG
for (i = 3; (i <= 23); i++)
_ramvec[i] = trap;
for (i = 33; (i <= 63); i++)
_ramvec[i] = trap;
#endif
for (i = 24; (i <= 30); i++)
_ramvec[i] = inthandler;
#ifndef ENABLE_dBUG
_ramvec[31] = inthandler; // Disables the IRQ7 button
#endif
for (i = 64; (i < 255); i++)
_ramvec[i] = inthandler;
_ramvec[255] = 0;
_ramvec[2] = buserr;
_ramvec[32] = system_call;
} }
/***************************************************************************/ /***************************************************************************/
void config_BSP(char *commandp, int size) void config_BSP(char *commandp, int size)
{ {
mcf_setimr(MCFSIM_IMR_MASKALL);
memset(commandp, 0, size); memset(commandp, 0, size);
mach_sched_init = coldfire_timer_init; mach_sched_init = coldfire_timer_init;
mach_tick = coldfire_tick; mach_tick = coldfire_tick;
mach_gettimeoffset = coldfire_timer_offset;
mach_trap_init = coldfire_trap_init; mach_trap_init = coldfire_trap_init;
mach_reset = coldfire_reset;
} }
/***************************************************************************/ /***************************************************************************/
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