Commit 9713faec authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Borislav Petkov

EDAC: Merge mci.mem_is_per_rank with mci.csbased

Both mci.mem_is_per_rank and mci.csbased denote the same thing: the
memory controller is csrows based. Merge both fields into one.

There's no need for the driver to actually fill it, as the core detects
it by checking if one of the layers has the csrows type as part of the
memory hierarchy:

	if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
			per_rank = true;
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parent 1eef1282
...@@ -2423,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2) ...@@ -2423,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2)
mci->pvt_info = pvt; mci->pvt_info = pvt;
mci->pdev = &pvt->F2->dev; mci->pdev = &pvt->F2->dev;
mci->csbased = 1;
setup_mci_misc_attrs(mci, fam_type); setup_mci_misc_attrs(mci, fam_type);
......
...@@ -86,7 +86,7 @@ static void edac_mc_dump_dimm(struct dimm_info *dimm, int number) ...@@ -86,7 +86,7 @@ static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
edac_dimm_info_location(dimm, location, sizeof(location)); edac_dimm_info_location(dimm, location, sizeof(location));
edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
dimm->mci->mem_is_per_rank ? "rank" : "dimm", dimm->mci->csbased ? "rank" : "dimm",
number, location, dimm->csrow, dimm->cschannel); number, location, dimm->csrow, dimm->cschannel);
edac_dbg(4, " dimm = %p\n", dimm); edac_dbg(4, " dimm = %p\n", dimm);
edac_dbg(4, " dimm->label = '%s'\n", dimm->label); edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
...@@ -341,7 +341,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, ...@@ -341,7 +341,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
memcpy(mci->layers, layers, sizeof(*layer) * n_layers); memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
mci->nr_csrows = tot_csrows; mci->nr_csrows = tot_csrows;
mci->num_cschannel = tot_channels; mci->num_cschannel = tot_channels;
mci->mem_is_per_rank = per_rank; mci->csbased = per_rank;
/* /*
* Alocate and fill the csrow/channels structs * Alocate and fill the csrow/channels structs
...@@ -1235,7 +1235,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type, ...@@ -1235,7 +1235,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
* incrementing the compat API counters * incrementing the compat API counters
*/ */
edac_dbg(4, "%s csrows map: (%d,%d)\n", edac_dbg(4, "%s csrows map: (%d,%d)\n",
mci->mem_is_per_rank ? "rank" : "dimm", mci->csbased ? "rank" : "dimm",
dimm->csrow, dimm->cschannel); dimm->csrow, dimm->cschannel);
if (row == -1) if (row == -1)
row = dimm->csrow; row = dimm->csrow;
......
...@@ -609,7 +609,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci, ...@@ -609,7 +609,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci,
device_initialize(&dimm->dev); device_initialize(&dimm->dev);
dimm->dev.parent = &mci->dev; dimm->dev.parent = &mci->dev;
if (mci->mem_is_per_rank) if (mci->csbased)
dev_set_name(&dimm->dev, "rank%d", index); dev_set_name(&dimm->dev, "rank%d", index);
else else
dev_set_name(&dimm->dev, "dimm%d", index); dev_set_name(&dimm->dev, "dimm%d", index);
......
...@@ -675,11 +675,11 @@ struct mem_ctl_info { ...@@ -675,11 +675,11 @@ struct mem_ctl_info {
* sees memory sticks ("dimms"), and the ones that sees memory ranks. * sees memory sticks ("dimms"), and the ones that sees memory ranks.
* All old memory controllers enumerate memories per rank, but most * All old memory controllers enumerate memories per rank, but most
* of the recent drivers enumerate memories per DIMM, instead. * of the recent drivers enumerate memories per DIMM, instead.
* When the memory controller is per rank, mem_is_per_rank is true. * When the memory controller is per rank, csbased is true.
*/ */
unsigned n_layers; unsigned n_layers;
struct edac_mc_layer *layers; struct edac_mc_layer *layers;
bool mem_is_per_rank; bool csbased;
/* /*
* DIMM info. Will eventually remove the entire csrows_info some day * DIMM info. Will eventually remove the entire csrows_info some day
...@@ -740,8 +740,6 @@ struct mem_ctl_info { ...@@ -740,8 +740,6 @@ struct mem_ctl_info {
u32 fake_inject_ue; u32 fake_inject_ue;
u16 fake_inject_count; u16 fake_inject_count;
#endif #endif
__u8 csbased : 1, /* csrow-based memory controller */
__resv : 7;
}; };
#endif #endif
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