Commit 9787e835 authored by Rodrigo Vivi's avatar Rodrigo Vivi

drm/i915/cnl: Enable DDI-F on Cannonlake.

Now let's finish the Port-F support by adding the
proper port F detection, irq and power well support.

v2: Rebase
v3: Use BIT_ULL
v4: Cover missed case on ddi init.
v5: Update commit message.
v6: Rebase on top of display headers rework.
v7: Squash power-well handling related to DDI F to this
    patch to avoid warns as pointed out by DK.
v8: Introduce DDI_F_LANES to PG2. (DK)
v9: Squash in the PORT_F case for enabling DP MST encoder. (DK)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarDavid Weinehall <david.weinehall@linux.intel.com>
Reviewed-by: default avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-9-rodrigo.vivi@intel.com
parent cf53902f
...@@ -1304,6 +1304,7 @@ enum i915_power_well_id { ...@@ -1304,6 +1304,7 @@ enum i915_power_well_id {
SKL_DISP_PW_DDI_B, SKL_DISP_PW_DDI_B,
SKL_DISP_PW_DDI_C, SKL_DISP_PW_DDI_C,
SKL_DISP_PW_DDI_D, SKL_DISP_PW_DDI_D,
CNL_DISP_PW_DDI_F = 6,
GLK_DISP_PW_AUX_A = 8, GLK_DISP_PW_AUX_A = 8,
GLK_DISP_PW_AUX_B, GLK_DISP_PW_AUX_B,
...@@ -8860,6 +8861,7 @@ enum skl_power_gate { ...@@ -8860,6 +8861,7 @@ enum skl_power_gate {
#define SFUSE_STRAP_RAW_FREQUENCY (1<<8) #define SFUSE_STRAP_RAW_FREQUENCY (1<<8)
#define SFUSE_STRAP_DISPLAY_DISABLED (1<<7) #define SFUSE_STRAP_DISPLAY_DISABLED (1<<7)
#define SFUSE_STRAP_CRT_DISABLED (1<<6) #define SFUSE_STRAP_CRT_DISABLED (1<<6)
#define SFUSE_STRAP_DDIF_DETECTED (1<<3)
#define SFUSE_STRAP_DDIB_DETECTED (1<<2) #define SFUSE_STRAP_DDIB_DETECTED (1<<2)
#define SFUSE_STRAP_DDIC_DETECTED (1<<1) #define SFUSE_STRAP_DDIC_DETECTED (1<<1)
#define SFUSE_STRAP_DDID_DETECTED (1<<0) #define SFUSE_STRAP_DDID_DETECTED (1<<0)
......
...@@ -2910,6 +2910,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) ...@@ -2910,6 +2910,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
intel_dig_port->ddi_io_power_domain = intel_dig_port->ddi_io_power_domain =
POWER_DOMAIN_PORT_DDI_E_IO; POWER_DOMAIN_PORT_DDI_E_IO;
break; break;
case PORT_F:
intel_dig_port->ddi_io_power_domain =
POWER_DOMAIN_PORT_DDI_F_IO;
break;
default: default:
MISSING_CASE(port); MISSING_CASE(port);
} }
......
...@@ -5671,6 +5671,8 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port) ...@@ -5671,6 +5671,8 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
return POWER_DOMAIN_PORT_DDI_D_LANES; return POWER_DOMAIN_PORT_DDI_D_LANES;
case PORT_E: case PORT_E:
return POWER_DOMAIN_PORT_DDI_E_LANES; return POWER_DOMAIN_PORT_DDI_E_LANES;
case PORT_F:
return POWER_DOMAIN_PORT_DDI_F_LANES;
default: default:
MISSING_CASE(port); MISSING_CASE(port);
return POWER_DOMAIN_PORT_OTHER; return POWER_DOMAIN_PORT_OTHER;
...@@ -13624,7 +13626,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) ...@@ -13624,7 +13626,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (found || IS_GEN9_BC(dev_priv)) if (found || IS_GEN9_BC(dev_priv))
intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_A);
/* DDI B, C and D detection is indicated by the SFUSE_STRAP /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
* register */ * register */
found = I915_READ(SFUSE_STRAP); found = I915_READ(SFUSE_STRAP);
...@@ -13634,6 +13636,8 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) ...@@ -13634,6 +13636,8 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_C); intel_ddi_init(dev_priv, PORT_C);
if (found & SFUSE_STRAP_DDID_DETECTED) if (found & SFUSE_STRAP_DDID_DETECTED)
intel_ddi_init(dev_priv, PORT_D); intel_ddi_init(dev_priv, PORT_D);
if (found & SFUSE_STRAP_DDIF_DETECTED)
intel_ddi_init(dev_priv, PORT_F);
/* /*
* On SKL we don't have a way to detect DDI-E so we rely on VBT. * On SKL we don't have a way to detect DDI-E so we rely on VBT.
*/ */
......
...@@ -157,11 +157,13 @@ enum intel_display_power_domain { ...@@ -157,11 +157,13 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_DDI_C_LANES, POWER_DOMAIN_PORT_DDI_C_LANES,
POWER_DOMAIN_PORT_DDI_D_LANES, POWER_DOMAIN_PORT_DDI_D_LANES,
POWER_DOMAIN_PORT_DDI_E_LANES, POWER_DOMAIN_PORT_DDI_E_LANES,
POWER_DOMAIN_PORT_DDI_F_LANES,
POWER_DOMAIN_PORT_DDI_A_IO, POWER_DOMAIN_PORT_DDI_A_IO,
POWER_DOMAIN_PORT_DDI_B_IO, POWER_DOMAIN_PORT_DDI_B_IO,
POWER_DOMAIN_PORT_DDI_C_IO, POWER_DOMAIN_PORT_DDI_C_IO,
POWER_DOMAIN_PORT_DDI_D_IO, POWER_DOMAIN_PORT_DDI_D_IO,
POWER_DOMAIN_PORT_DDI_E_IO, POWER_DOMAIN_PORT_DDI_E_IO,
POWER_DOMAIN_PORT_DDI_F_IO,
POWER_DOMAIN_PORT_DSI, POWER_DOMAIN_PORT_DSI,
POWER_DOMAIN_PORT_CRT, POWER_DOMAIN_PORT_CRT,
POWER_DOMAIN_PORT_OTHER, POWER_DOMAIN_PORT_OTHER,
......
...@@ -6132,7 +6132,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, ...@@ -6132,7 +6132,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
/* init MST on ports that can support it */ /* init MST on ports that can support it */
if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) && if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) &&
(port == PORT_B || port == PORT_C || port == PORT_D)) (port == PORT_B || port == PORT_C ||
port == PORT_D || port == PORT_F))
intel_dp_mst_encoder_init(intel_dig_port, intel_dp_mst_encoder_init(intel_dig_port,
intel_connector->base.base.id); intel_connector->base.base.id);
......
...@@ -94,6 +94,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain) ...@@ -94,6 +94,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "PORT_DDI_D_LANES"; return "PORT_DDI_D_LANES";
case POWER_DOMAIN_PORT_DDI_E_LANES: case POWER_DOMAIN_PORT_DDI_E_LANES:
return "PORT_DDI_E_LANES"; return "PORT_DDI_E_LANES";
case POWER_DOMAIN_PORT_DDI_F_LANES:
return "PORT_DDI_F_LANES";
case POWER_DOMAIN_PORT_DDI_A_IO: case POWER_DOMAIN_PORT_DDI_A_IO:
return "PORT_DDI_A_IO"; return "PORT_DDI_A_IO";
case POWER_DOMAIN_PORT_DDI_B_IO: case POWER_DOMAIN_PORT_DDI_B_IO:
...@@ -104,6 +106,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain) ...@@ -104,6 +106,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "PORT_DDI_D_IO"; return "PORT_DDI_D_IO";
case POWER_DOMAIN_PORT_DDI_E_IO: case POWER_DOMAIN_PORT_DDI_E_IO:
return "PORT_DDI_E_IO"; return "PORT_DDI_E_IO";
case POWER_DOMAIN_PORT_DDI_F_IO:
return "PORT_DDI_F_IO";
case POWER_DOMAIN_PORT_DSI: case POWER_DOMAIN_PORT_DSI:
return "PORT_DSI"; return "PORT_DSI";
case POWER_DOMAIN_PORT_CRT: case POWER_DOMAIN_PORT_CRT:
...@@ -1827,6 +1831,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, ...@@ -1827,6 +1831,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \
BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \
BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \
BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \
BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL(POWER_DOMAIN_AUX_B) | \
BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL(POWER_DOMAIN_AUX_C) | \
BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL(POWER_DOMAIN_AUX_D) | \
...@@ -1861,6 +1866,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, ...@@ -1861,6 +1866,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
#define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \ #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_AUX_F) | \ BIT_ULL(POWER_DOMAIN_AUX_F) | \
BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define CNL_DISPLAY_DC_OFF_POWER_DOMAINS ( \ #define CNL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \ CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
...@@ -2411,6 +2419,12 @@ static struct i915_power_well cnl_power_wells[] = { ...@@ -2411,6 +2419,12 @@ static struct i915_power_well cnl_power_wells[] = {
.ops = &hsw_power_well_ops, .ops = &hsw_power_well_ops,
.id = SKL_DISP_PW_DDI_D, .id = SKL_DISP_PW_DDI_D,
}, },
{
.name = "DDI F IO power well",
.domains = CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = CNL_DISP_PW_DDI_F,
},
{ {
.name = "AUX F", .name = "AUX F",
.domains = CNL_DISPLAY_AUX_F_POWER_DOMAINS, .domains = CNL_DISPLAY_AUX_F_POWER_DOMAINS,
...@@ -2534,13 +2548,13 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) ...@@ -2534,13 +2548,13 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
set_power_wells(power_domains, cnl_power_wells); set_power_wells(power_domains, cnl_power_wells);
/* /*
* Aux IO is getting enabled for all ports * DDI and Aux IO are getting enabled for all ports
* regardless the presence or use. So, in order to avoid * regardless the presence or use. So, in order to avoid
* timeouts, lets remove it from the list * timeouts, lets remove them from the list
* for the SKUs without port F. * for the SKUs without port F.
*/ */
if (!IS_CNL_WITH_PORT_F(dev_priv)) if (!IS_CNL_WITH_PORT_F(dev_priv))
power_domains->power_well_count -= 1; power_domains->power_well_count -= 2;
} else if (IS_BROXTON(dev_priv)) { } else if (IS_BROXTON(dev_priv)) {
set_power_wells(power_domains, bxt_power_wells); set_power_wells(power_domains, bxt_power_wells);
......
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