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Commit 97dd7871 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'aspeed-5.3-devicetree' of... 

Merge tag 'aspeed-5.3-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.3

We have various device tree updates from the OpenBMC project to enable
bits and pieces in existing systems, notably updates to Google's Zaius.

There are some AST2500 machines under development:

  * Lenovo Hr630
  * IBM Swift
  * Facebook YAMP

And some AST2400 machines that have been around but out of tree and have
now joined the party:

  * YADRO VESNIN
  * Microsoft Olympus

* tag 'aspeed-5.3-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: Enable video engine on romulus and wtherspoon
  ARM: dts: aspeed: Add Inspur fp5280g2 BMC machine
  ARM: dts: aspeed: Add YADRO VESNIN BMC
  ARM: dts: aspeed: Add Microsoft Olympus BMC
  ARM: dts: aspeed: Adding Lenovo Hr630 BMC
  ARM: dts: aspeed: Add Facebook YAMP BMC
  ARM: dts: aspeed: swift: Add pca9539 devices
  ARM: dts: aspeed: Add Swift BMC machine
  ARM: dts: aspeed: cmm: enable ehci host controllers
  ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots
  ARM: dts: aspeed: zaius: update 12V brick I2C address
  ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
  ARM: dts: aspeed: quanta-q71: Enable p2a node
  ARM: dts: aspeed: Add aspeed-p2a-ctrl node
  ARM: dts: aspeed: Add Power9 and Power9 CFAM description
  ARM: dts: aspeed: Rename flash-controller nodes
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 791c6fdb 6084110a
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arch/arm/boot/dts/Makefile
View file @ 97dd7871
......@@ -1269,10 +1269,16 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-microsoft-olympus.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
aspeed-bmc-opp-swift.dtb \
aspeed-bmc-opp-vesnin.dtb \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
......
arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
View file @ 97dd7871
......@@ -372,3 +372,11 @@ &i2c13 {
&adc {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts 0 → 100644
View file @ 97dd7871
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
/ {
model = "Facebook YAMP 100 BMC";
compatible = "facebook,yamp-bmc", "aspeed,ast2500";
aliases {
/*
* Override the default uart aliases to avoid breaking
* the legacy applications.
*/
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
/*
* wdt2 is not used by Yamp.
*/
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
i2c-switch@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts 0 → 100644
View file @ 97dd7871
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "FP5280G2 BMC";
compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@9f000000 {
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
coldfire_memory: codefire_memory@9ef00000 {
reg = <0x9ef00000 0x00100000>;
no-map;
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
fsi: gpio-fsi {
compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
memory-region = <&coldfire_memory>;
aspeed,sram = <&sram>;
aspeed,cvic = <&cvic>;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 3)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 0)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
fan0-presence {
label = "fan0-presence";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
linux,code = <1>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
linux,code = <2>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
linux,code = <3>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
linux,code = <4>;
};
fan4-presence {
label = "fan4-presence";
gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan5-presence {
label = "fan5-presence";
gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan6-presence {
label = "fan6-presence";
gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan7-presence {
label = "fan7-presence";
gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
};
leds {
compatible = "gpio-leds";
power {
label = "power";
/* TODO: dummy gpio */
gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 15>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
<&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* Test Point */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart3 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
/* LCD */
status = "okay";
};
&i2c1 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
label = "fru";
};
};
&i2c2 {
status = "okay";
tmp112@48 {
compatible = "ti,tmp112";
reg = <0x48>;
label = "inlet";
};
tmp112@49 {
compatible = "ti,tmp112";
reg = <0x49>;
label = "outlet";
};
i2c-switch@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "psu_inlet";
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "ocp_zone";
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "bmc_zone";
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
tmp112@7c {
compatible = "microchip,emc1413";
reg = <0x7c>;
};
};
};
};
&i2c3 {
/* Riser Card */
status = "okay";
};
&i2c4 {
status = "okay";
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
};
};
&i2c5 {
/* vr */
status = "okay";
};
&i2c6 {
/* bp card */
status = "okay";
};
&i2c7 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adm1278@10 {
compatible = "adi,adm1278";
reg = <0x10>;
};
adm1278@13 {
compatible = "adi,adm1278";
reg = <0x13>;
};
adm1278@50 {
compatible = "adi,adm1278";
reg = <0x50>;
};
adm1278@53 {
compatible = "adi,adm1278";
reg = <0x53>;
};
};
/*pcie riser*/
};
};
&i2c8 {
status = "okay";
pca0: pca9555@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca1: pca9555@21 {
compatible = "nxp,pca9555";
reg = <0x21>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca2: pca9555@22 {
compatible = "nxp,pca9555";
reg = <0x22>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca3: pca9555@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca4: pca9555@24 {
compatible = "nxp,pca9555";
reg = <0x24>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca5: pca9555@25 {
compatible = "nxp,pca9555";
reg = <0x25>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c9 {
/* cpld */
status = "okay";
};
&i2c10 {
/* hdd bp */
status = "okay";
};
&i2c11 {
status = "okay";
power-supply@58 {
compatible = "pmbus";
reg = <0x58>;
};
power-supply@5a {
compatible = "pmbus";
reg = <0x5a>;
};
};
&i2c12 {
/* odcc */
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_b7 {
gpio-hog;
gpios = <ASPEED_GPIO(B,7) GPIO_ACTIVE_LOW>;
output-high;
line-name = "BMC_INIT_OK";
};
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
&pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
&pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
&pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
&pinctrl_adc14_default &pinctrl_adc15_default>;
};
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
};
fan@7 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
};
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts 0 → 100644
View file @ 97dd7871
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for Lenovo Hr630 platform
*
* Copyright (C) 2019-present Lenovo
*/
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "HR630 BMC";
compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
aliases {
i2c14 = &i2c_rbp;
i2c15 = &i2c_fbp1;
i2c16 = &i2c_fbp2;
i2c17 = &i2c_fbp3;
i2c18 = &i2c_riser2;
i2c19 = &i2c_pcie4;
i2c20 = &i2c_riser1;
i2c21 = &i2c_ocp;
};
chosen {
stdout-path = &uart5;
bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x00100000>; /* 1M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
};
fault {
gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>,
<&adc 12>, <&adc 13>, <&adc 14>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default
&pinctrl_nrts2_default
&pinctrl_ndtr2_default
&pinctrl_ndsr2_default
&pinctrl_ncts2_default
&pinctrl_ndcd2_default
&pinctrl_nri2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&ibt {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default
&pinctrl_adc8_default
&pinctrl_adc9_default
&pinctrl_adc10_default
&pinctrl_adc12_default
&pinctrl_adc13_default
&pinctrl_adc14_default>;
};
&i2c0 {
status = "okay";
/* temp1 inlet */
tmp75@4e {
compatible = "national,lm75";
reg = <0x4e>;
};
};
&i2c1 {
status = "okay";
/* temp2 outlet */
tmp75@4d {
compatible = "national,lm75";
reg = <0x4d>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
/* Slot 0,
* Slot 1,
* Slot 2,
* Slot 3
*/
i2c-switch@70 {
compatible = "nxp,pca9545";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect; /* may use mux@70 next. */
i2c_rbp: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_fbp1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_fbp2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_fbp3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c7 {
status = "okay";
/* Slot 0,
* Slot 1,
* Slot 2,
* Slot 3
*/
i2c-switch@76 {
compatible = "nxp,pca9546";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect; /* may use mux@76 next. */
i2c_riser2: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_pcie4: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_riser1: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_ocp: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c8 {
status = "okay";
eeprom@57 {
compatible = "atmel,24c256";
reg = <0x57>;
pagesize = <16>;
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
fan@8 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08>;
};
fan@9 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x09>;
};
fan@10 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
};
fan@11 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
};
fan@12 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
};
fan@13 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
};
};
&gpio {
pin_gpio_b5 {
gpio-hog;
gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "IRQ_BMC_PCH_SMI_LPC_N";
};
pin_gpio_f0 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "IRQ_BMC_PCH_NMI_R";
};
pin_gpio_f3 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_BUS0_RST_OUT_N";
};
pin_gpio_f4 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "FM_SKT0_FAULT_LED";
};
pin_gpio_f5 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "FM_SKT1_FAULT_LED";
};
pin_gpio_g4 {
gpio-hog;
gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "FAN_PWR_CTL_N";
};
pin_gpio_g7 {
gpio-hog;
gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_BMC_PCIE_I2CMUX_N";
};
pin_gpio_h2 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PSU1_FFS_N_R";
};
pin_gpio_h3 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PSU2_FFS_N_R";
};
pin_gpio_i3 {
gpio-hog;
gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_INTRUDED_COVER";
};
pin_gpio_j2 {
gpio-hog;
gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_BIOS_UPDATE_N";
};
pin_gpio_j3 {
gpio-hog;
gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_BMC_HDD_I2CMUX_N";
};
pin_gpio_s2 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_VGA_SW";
};
pin_gpio_s4 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
output;
line-name = "VBAT_EN_N";
};
pin_gpio_s6 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PU_BMC_GPIOS6";
};
pin_gpio_y0 {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_NCSI_MUX_CTL_S0";
};
pin_gpio_y1 {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_NCSI_MUX_CTL_S1";
};
pin_gpio_z0 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_RISER2_INT_N";
};
pin_gpio_z2 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_RISER2_RESET_N";
};
pin_gpio_z3 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "FM_BMC_PCH_SCI_LPC_N";
};
pin_gpio_z7 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_POST_CMPLT_N";
};
pin_gpio_aa0 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "HOST_BMC_USB_SEL";
};
pin_gpio_aa5 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_BUS1_RST_OUT_N";
};
};
arch/arm/boot/dts/aspeed-bmc-microsoft-olympus.dts 0 → 100644
View file @ 97dd7871
//SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Olympus BMC";
compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@40000000 {
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@5f000000 {
no-map;
reg = <0x5f000000 0x01000000>; /* 16M */
};
};
leds {
compatible = "gpio-leds";
bmc_heartbeat {
gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
};
power_green {
gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
};
power_amber {
gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
};
identify {
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
};
fault {
gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
};
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default>;
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <100000>;
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
&i2c7 {
status = "okay";
};
&vuart {
status = "okay";
};
&wdt2 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
};
arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
View file @ 97dd7871
......@@ -322,3 +322,5 @@ &ibt {
&adc {
status = "okay";
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
View file @ 97dd7871
......@@ -347,3 +347,25 @@ pin_gpio_h7 {
line-name = "BMC_TPM_INT_N";
};
};
&fsi {
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
fsi_hub0: hub@3400 {
compatible = "ibm,fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
View file @ 97dd7871
......@@ -42,6 +42,13 @@ gfx_memory: framebuffer {
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
......@@ -304,3 +311,10 @@ &vhub {
&adc {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-swift.dts 0 → 100644
View file @ 97dd7871
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "Swift BMC";
compatible = "ibm,swift-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
compatible = "gpio-keys";
air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 5)>;
};
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(R, 7)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(N, 0)>;
};
oppanel-presence {
label = "oppanel-presence";
gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(A, 7)>;
};
opencapi-riser-presence {
label = "opencapi-riser-presence";
gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 0)>;
};
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 12>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
scm0-presence {
label = "scm0-presence";
gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
scm1-presence {
label = "scm1-presence";
gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
cpu0vrm-presence {
label = "cpu0vrm-presence";
gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
cpu1vrm-presence {
label = "cpu1vrm-presence";
gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
fan0-presence {
label = "fan0-presence";
gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
fanboost-presence {
label = "fanboost-presence";
gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
};
leds {
compatible = "gpio-leds";
fan0 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
};
fan1 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
};
fan2 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
};
fan3 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
};
fanboost {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
};
front-fault {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
};
front-power {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
};
front-id {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
};
rear-fault {
gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
};
rear-id {
gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
};
};
fsi: gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
};
iio-hwmon-dps310 {
compatible = "iio-hwmon";
io-channels = <&dps 0>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <100000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x7F80000>;
label = "obmc-ubi";
};
};
};
flash@1 {
status = "okay";
label = "alt-bmc";
m25p,fast-read;
spi-max-frequency = <100000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "alt-u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "alt-u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x7F80000>;
label = "alt-obmc-ubi";
};
};
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&i2c2 {
status = "okay";
/* MUX ->
* Samtec 1
* Samtec 2
*/
};
&i2c3 {
status = "okay";
max31785@52 {
compatible = "maxim,max31785a";
reg = <0x52>;
#address-cells = <1>;
#size-cells = <0>;
fan@0 {
compatible = "pmbus-fan";
reg = <0>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@1 {
compatible = "pmbus-fan";
reg = <1>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@2 {
compatible = "pmbus-fan";
reg = <2>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@3 {
compatible = "pmbus-fan";
reg = <3>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@4 {
compatible = "pmbus-fan";
reg = <4>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
};
pca0: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
power-supply@68 {
compatible = "ibm,cffps1";
reg = <0x68>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
power-supply@69 {
compatible = "ibm,cffps1";
reg = <0x69>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c7 {
status = "okay";
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
#io-channel-cells = <0>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
si7021a20@20 {
compatible = "si,si7021a20";
reg = <0x20>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
pca1: pca9551@60 {
compatible = "nxp,pca9551";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c8 {
status = "okay";
pca9552: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
"GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
"P9_SCM0_PRES", "P9_SCM1_PRES",
"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
"PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
ucd90160@64 {
compatible = "ti,ucd90160";
reg = <0x64>;
};
};
&i2c9 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
ir35221@71 {
compatible = "infineon,ir35221";
reg = <0x71>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
pca2: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
};
&i2c10 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
ir35221@71 {
compatible = "infineon,ir35221";
reg = <0x71>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
pca3: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
};
&i2c11 {
/* MUX
* -> PCIe Slot 0
* -> PCIe Slot 1
* -> PCIe Slot 2
* -> PCIe Slot 3
*/
status = "okay";
};
&i2c12 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
};
&i2c13 {
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&wdt2 {
aspeed,alt-boot;
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts 0 → 100644
View file @ 97dd7871
// SPDX-License-Identifier: GPL-2.0+
// Copyright 2019 YADRO
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Vesnin BMC";
compatible = "yadro,vesnin-bmc", "aspeed,ast2400";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory {
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@5f000000 {
no-map;
reg = <0x5f000000 0x01000000>; /* 16MB */
};
flash_memory: region@5c000000 {
no-map;
reg = <0x5c000000 0x02000000>; /* 32M */
};
};
leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
};
power_red {
gpios = <&gpio ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>;
};
id_blue {
gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>;
};
alarm_red {
gpios = <&gpio ASPEED_GPIO(N, 6) GPIO_ACTIVE_LOW>;
};
alarm_yel {
gpios = <&gpio ASPEED_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
button_checkstop {
label = "checkstop";
linux,code = <74>;
gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>;
};
button_identify {
label = "identify";
linux,code = <152>;
gpios = <&gpio ASPEED_GPIO(O, 7) GPIO_ACTIVE_LOW>;
};
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1debug_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
};
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi>;
};
&ibt {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&i2c0 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
pagesize = <64>;
};
};
&i2c1 {
status = "okay";
tmp75@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
occ-hwmon@50 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x50>;
};
};
&i2c5 {
status = "okay";
occ-hwmon@51 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x51>;
};
};
&i2c6 {
status = "okay";
w83795g@2f {
compatible = "nuvoton,w83795g";
reg = <0x2f>;
};
};
&i2c7 {
status = "okay";
occ-hwmon@56 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x56>;
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
occ-hwmon@57 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x57>;
};
};
&i2c12 {
status = "okay";
rtc@68 {
compatible = "maxim,ds3231";
reg = <0x68>;
};
};
&i2c13 {
status = "okay";
};
&vuart {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
View file @ 97dd7871
......@@ -33,6 +33,13 @@ gfx_memory: framebuffer {
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32MM */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
......@@ -640,3 +647,10 @@ &adc {
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
View file @ 97dd7871
......@@ -7,6 +7,14 @@ / {
model = "Zaius BMC";
compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
aliases {
i2c15 = &i2cpcie0;
i2c16 = &i2cpcie1;
i2c17 = &i2cpcie2;
i2c19 = &i2cpcie3;
i2c20 = &i2cpcie4;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
......@@ -223,6 +231,27 @@ i2c-switch@71 {
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2cpcie0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2cpcie1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2cpcie2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2ctpm: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
/* MUX1 PCA9546A @71h
......@@ -253,6 +282,17 @@ i2c-switch@71 {
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2cpcie3: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2cpcie4: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
/* MUX1 PCA9546A @71h
......@@ -296,33 +336,98 @@ hotswap@54 {
reg = <0x54>;
};
};
};
vrm@64 {
compatible = "isil,isl68137";
reg = <0x64>;
};
vrm@40 {
compatible = "isil,isl68137";
reg = <0x40>;
};
vrm@60 {
compatible = "isil,isl68137";
reg = <0x60>;
};
vrm@43 {
compatible = "infineon,ir38064";
reg = <0x43>;
};
vrm@41 {
compatible = "isil,isl68137";
reg = <0x41>;
};
/* Master selector PCA9541A @70h (other master: CPU0)
* LM5066I PMBUS @10h
*/
/* 12V Quarter Brick DC/DC Converter Q54SJ12050 @61h */
power-brick@61 {
/*
* Brick will be one of these types/addresses. Depending
* on the board SKU only one is actually present and will successfully
* instantiate while the others will fail the probe operation.
* These are the PVT (and presumably beyond) addresses:
* 12V Quarter Brick DC/DC Converter Q54SJ12050 @6Ah
* 12V Quarter Brick DC/DC Converter Q54SH12050 @30h
*/
power-brick@6a {
compatible = "delta,dps800";
reg = <0x6a>;
};
power-brick@30 {
compatible = "delta,dps800";
reg = <0x61>;
reg = <0x30>;
};
/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
/* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
/* CPU0 VR ISL68137 0.8V PMBUS @60h */
/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */
/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
/* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
/* Master selector PCA9541A @70h (other master: CPU0)
* LM5066I PMBUS @10h
*/
};
&i2c8 {
status = "okay";
/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
/* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
/* CPU1 VR ISL68137 0.8V PMBUS @61h */
vrm@64 {
compatible = "isil,isl68137";
reg = <0x64>;
};
vrm@40 {
compatible = "isil,isl68137";
reg = <0x40>;
};
vrm@41 {
compatible = "isil,isl68137";
reg = <0x41>;
};
vrm@42 {
compatible = "infineon,ir38064";
reg = <0x42>;
};
vrm@60 {
compatible = "isil,isl68137";
reg = <0x60>;
};
/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
/* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
/* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
/* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
/* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */
/* CPU1 VR ISL68137 0.8V PMBUS @60h */
};
......@@ -435,3 +540,5 @@ fan@3 {
&ibt {
status = "okay";
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
View file @ 97dd7871
......@@ -112,6 +112,11 @@ &pinctrl {
&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
};
&p2a {
status = "okay";
memory-region = <&vga_memory>;
};
&ibt {
status = "okay";
};
......
arch/arm/boot/dts/aspeed-g4.dtsi
View file @ 97dd7871
......@@ -53,7 +53,7 @@ ahb {
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
fmc: spi@1e620000 {
reg = < 0x1e620000 0x94
0x20000000 0x10000000 >;
#address-cells = <1>;
......@@ -69,7 +69,7 @@ flash@0 {
};
};
spi: flash-controller@1e630000 {
spi: spi@1e630000 {
reg = < 0x1e630000 0x18
0x30000000 0x10000000 >;
#address-cells = <1>;
......@@ -165,6 +165,10 @@ pinctrl: pinctrl {
compatible = "aspeed,g4-pinctrl";
};
p2a: p2a-control {
compatible = "aspeed,ast2400-p2a-ctrl";
status = "disabled";
};
};
rng: hwrng@1e6e2078 {
......
arch/arm/boot/dts/aspeed-g5.dtsi
View file @ 97dd7871
......@@ -60,7 +60,7 @@ ahb {
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
fmc: spi@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
#address-cells = <1>;
......@@ -86,7 +86,7 @@ flash@2 {
};
};
spi1: flash-controller@1e630000 {
spi1: spi@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x08000000 >;
#address-cells = <1>;
......@@ -106,7 +106,7 @@ flash@1 {
};
};
spi2: flash-controller@1e631000 {
spi2: spi@1e631000 {
reg = < 0x1e631000 0xc4
0x38000000 0x08000000 >;
#address-cells = <1>;
......@@ -219,6 +219,11 @@ pinctrl: pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
p2a: p2a-control {
compatible = "aspeed,ast2500-p2a-ctrl";
status = "disabled";
};
};
rng: hwrng@1e6e2078 {
......
arch/arm/boot/dts/ibm-power9-dual.dtsi 0 → 100644
View file @ 97dd7871
// SPDX-License-Identifier: GPL-2.0+
// Copyright 2018 IBM Corp
&fsi {
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam0_i2c0: i2c-bus@0 {
reg = <0>;
};
cfam0_i2c1: i2c-bus@1 {
reg = <1>;
};
cfam0_i2c2: i2c-bus@2 {
reg = <2>;
};
cfam0_i2c3: i2c-bus@3 {
reg = <3>;
};
cfam0_i2c4: i2c-bus@4 {
reg = <4>;
};
cfam0_i2c5: i2c-bus@5 {
reg = <5>;
};
cfam0_i2c6: i2c-bus@6 {
reg = <6>;
};
cfam0_i2c7: i2c-bus@7 {
reg = <7>;
};
cfam0_i2c8: i2c-bus@8 {
reg = <8>;
};
cfam0_i2c9: i2c-bus@9 {
reg = <9>;
};
cfam0_i2c10: i2c-bus@a {
reg = <10>;
};
cfam0_i2c11: i2c-bus@b {
reg = <11>;
};
cfam0_i2c12: i2c-bus@c {
reg = <12>;
};
cfam0_i2c13: i2c-bus@d {
reg = <13>;
};
cfam0_i2c14: i2c-bus@e {
reg = <14>;
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ0: occ {
compatible = "ibm,p9-occ";
};
};
fsi_hub0: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};
&fsi_hub0 {
cfam@1,0 {
reg = <1 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <1>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam1_i2c0: i2c-bus@0 {
reg = <0>;
};
cfam1_i2c1: i2c-bus@1 {
reg = <1>;
};
cfam1_i2c2: i2c-bus@2 {
reg = <2>;
};
cfam1_i2c3: i2c-bus@3 {
reg = <3>;
};
cfam1_i2c4: i2c-bus@4 {
reg = <4>;
};
cfam1_i2c5: i2c-bus@5 {
reg = <5>;
};
cfam1_i2c6: i2c-bus@6 {
reg = <6>;
};
cfam1_i2c7: i2c-bus@7 {
reg = <7>;
};
cfam1_i2c8: i2c-bus@8 {
reg = <8>;
};
cfam1_i2c9: i2c-bus@9 {
reg = <9>;
};
cfam1_i2c10: i2c-bus@a {
reg = <10>;
};
cfam1_i2c11: i2c-bus@b {
reg = <11>;
};
cfam1_i2c12: i2c-bus@c {
reg = <12>;
};
cfam1_i2c13: i2c-bus@d {
reg = <13>;
};
cfam1_i2c14: i2c-bus@e {
reg = <14>;
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ1: occ {
compatible = "ibm,p9-occ";
};
};
fsi_hub1: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};
/* Legacy OCC numbering (to get rid of when userspace is fixed) */
&fsi_occ0 {
reg = <1>;
};
&fsi_occ1 {
reg = <2>;
};
/ {
aliases {
i2c100 = &cfam0_i2c0;
i2c101 = &cfam0_i2c1;
i2c102 = &cfam0_i2c2;
i2c103 = &cfam0_i2c3;
i2c104 = &cfam0_i2c4;
i2c105 = &cfam0_i2c5;
i2c106 = &cfam0_i2c6;
i2c107 = &cfam0_i2c7;
i2c108 = &cfam0_i2c8;
i2c109 = &cfam0_i2c9;
i2c110 = &cfam0_i2c10;
i2c111 = &cfam0_i2c11;
i2c112 = &cfam0_i2c12;
i2c113 = &cfam0_i2c13;
i2c114 = &cfam0_i2c14;
i2c200 = &cfam1_i2c0;
i2c201 = &cfam1_i2c1;
i2c202 = &cfam1_i2c2;
i2c203 = &cfam1_i2c3;
i2c204 = &cfam1_i2c4;
i2c205 = &cfam1_i2c5;
i2c206 = &cfam1_i2c6;
i2c207 = &cfam1_i2c7;
i2c208 = &cfam1_i2c8;
i2c209 = &cfam1_i2c9;
i2c210 = &cfam1_i2c10;
i2c211 = &cfam1_i2c11;
i2c212 = &cfam1_i2c12;
i2c213 = &cfam1_i2c13;
i2c214 = &cfam1_i2c14;
};
};
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