Commit 9817f061 authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher

drm/amdgpu: move aca/mca init functions into ras_init() stage

adjust the function position to better match aca/mca fini code in ras_fini().
Signed-off-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent be6a69b2
...@@ -712,6 +712,15 @@ void amdgpu_aca_fini(struct amdgpu_device *adev) ...@@ -712,6 +712,15 @@ void amdgpu_aca_fini(struct amdgpu_device *adev)
atomic_set(&aca->ue_update_flag, 0); atomic_set(&aca->ue_update_flag, 0);
} }
int amdgpu_aca_reset(struct amdgpu_device *adev)
{
struct amdgpu_aca *aca = &adev->aca;
atomic_set(&aca->ue_update_flag, 0);
return 0;
}
void amdgpu_aca_set_smu_funcs(struct amdgpu_device *adev, const struct aca_smu_funcs *smu_funcs) void amdgpu_aca_set_smu_funcs(struct amdgpu_device *adev, const struct aca_smu_funcs *smu_funcs)
{ {
struct amdgpu_aca *aca = &adev->aca; struct amdgpu_aca *aca = &adev->aca;
...@@ -885,9 +894,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(aca_debug_mode_fops, NULL, amdgpu_aca_smu_debug_mode_se ...@@ -885,9 +894,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(aca_debug_mode_fops, NULL, amdgpu_aca_smu_debug_mode_se
void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root) void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root)
{ {
#if defined(CONFIG_DEBUG_FS) #if defined(CONFIG_DEBUG_FS)
if (!root || if (!root)
(adev->ip_versions[MP1_HWIP][0] != IP_VERSION(13, 0, 6) &&
adev->ip_versions[MP1_HWIP][0] != IP_VERSION(13, 0, 14)))
return; return;
debugfs_create_file("aca_debug_mode", 0200, root, adev, &aca_debug_mode_fops); debugfs_create_file("aca_debug_mode", 0200, root, adev, &aca_debug_mode_fops);
......
...@@ -192,6 +192,7 @@ struct aca_info { ...@@ -192,6 +192,7 @@ struct aca_info {
int amdgpu_aca_init(struct amdgpu_device *adev); int amdgpu_aca_init(struct amdgpu_device *adev);
void amdgpu_aca_fini(struct amdgpu_device *adev); void amdgpu_aca_fini(struct amdgpu_device *adev);
int amdgpu_aca_reset(struct amdgpu_device *adev);
void amdgpu_aca_set_smu_funcs(struct amdgpu_device *adev, const struct aca_smu_funcs *smu_funcs); void amdgpu_aca_set_smu_funcs(struct amdgpu_device *adev, const struct aca_smu_funcs *smu_funcs);
bool amdgpu_aca_is_enabled(struct amdgpu_device *adev); bool amdgpu_aca_is_enabled(struct amdgpu_device *adev);
......
...@@ -193,27 +193,26 @@ static int amdgpu_mca_bank_set_merge(struct mca_bank_set *mca_set, struct mca_ba ...@@ -193,27 +193,26 @@ static int amdgpu_mca_bank_set_merge(struct mca_bank_set *mca_set, struct mca_ba
return 0; return 0;
} }
static int amdgpu_mca_bank_set_remove_node(struct mca_bank_set *mca_set, struct mca_bank_node *node) static void amdgpu_mca_bank_set_remove_node(struct mca_bank_set *mca_set, struct mca_bank_node *node)
{ {
if (!node) if (!node)
return -EINVAL; return;
list_del(&node->node); list_del(&node->node);
kvfree(node); kvfree(node);
mca_set->nr_entries--; mca_set->nr_entries--;
return 0;
} }
static void amdgpu_mca_bank_set_release(struct mca_bank_set *mca_set) static void amdgpu_mca_bank_set_release(struct mca_bank_set *mca_set)
{ {
struct mca_bank_node *node, *tmp; struct mca_bank_node *node, *tmp;
list_for_each_entry_safe(node, tmp, &mca_set->list, node) { if (list_empty(&mca_set->list))
list_del(&node->node); return;
kvfree(node);
} list_for_each_entry_safe(node, tmp, &mca_set->list, node)
amdgpu_mca_bank_set_remove_node(mca_set, node);
} }
void amdgpu_mca_smu_init_funcs(struct amdgpu_device *adev, const struct amdgpu_mca_smu_funcs *mca_funcs) void amdgpu_mca_smu_init_funcs(struct amdgpu_device *adev, const struct amdgpu_mca_smu_funcs *mca_funcs)
...@@ -608,9 +607,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(mca_debug_mode_fops, NULL, amdgpu_mca_smu_debug_mode_se ...@@ -608,9 +607,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(mca_debug_mode_fops, NULL, amdgpu_mca_smu_debug_mode_se
void amdgpu_mca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root) void amdgpu_mca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root)
{ {
#if defined(CONFIG_DEBUG_FS) #if defined(CONFIG_DEBUG_FS)
if (!root || if (!root)
(amdgpu_ip_version(adev, MP1_HWIP, 0) != IP_VERSION(13, 0, 6) &&
amdgpu_ip_version(adev, MP1_HWIP, 0) != IP_VERSION(13, 0, 14)))
return; return;
debugfs_create_file("mca_debug_mode", 0200, root, adev, &mca_debug_mode_fops); debugfs_create_file("mca_debug_mode", 0200, root, adev, &mca_debug_mode_fops);
......
...@@ -1911,6 +1911,23 @@ static void amdgpu_ras_debugfs_create(struct amdgpu_device *adev, ...@@ -1911,6 +1911,23 @@ static void amdgpu_ras_debugfs_create(struct amdgpu_device *adev,
obj, &amdgpu_ras_debugfs_ops); obj, &amdgpu_ras_debugfs_ops);
} }
static bool amdgpu_ras_aca_is_supported(struct amdgpu_device *adev)
{
bool ret;
switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
case IP_VERSION(13, 0, 6):
case IP_VERSION(13, 0, 14):
ret = true;
break;
default:
ret = false;
break;
}
return ret;
}
void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev) void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev)
{ {
struct amdgpu_ras *con = amdgpu_ras_get_context(adev); struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
...@@ -1937,10 +1954,12 @@ void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev) ...@@ -1937,10 +1954,12 @@ void amdgpu_ras_debugfs_create_all(struct amdgpu_device *adev)
} }
} }
if (amdgpu_ras_aca_is_supported(adev)) {
if (amdgpu_aca_is_enabled(adev)) if (amdgpu_aca_is_enabled(adev))
amdgpu_aca_smu_debugfs_init(adev, dir); amdgpu_aca_smu_debugfs_init(adev, dir);
else else
amdgpu_mca_smu_debugfs_init(adev, dir); amdgpu_mca_smu_debugfs_init(adev, dir);
}
} }
/* debugfs end */ /* debugfs end */
...@@ -3428,6 +3447,15 @@ int amdgpu_ras_init(struct amdgpu_device *adev) ...@@ -3428,6 +3447,15 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
goto release_con; goto release_con;
} }
if (amdgpu_ras_aca_is_supported(adev)) {
if (amdgpu_aca_is_enabled(adev))
r = amdgpu_aca_init(adev);
else
r = amdgpu_mca_init(adev);
if (r)
goto release_con;
}
dev_info(adev->dev, "RAS INFO: ras initialized successfully, " dev_info(adev->dev, "RAS INFO: ras initialized successfully, "
"hardware ability[%x] ras_mask[%x]\n", "hardware ability[%x] ras_mask[%x]\n",
adev->ras_hw_enabled, adev->ras_enabled); adev->ras_hw_enabled, adev->ras_enabled);
...@@ -3636,26 +3664,23 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev) ...@@ -3636,26 +3664,23 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev)
amdgpu_ras_event_mgr_init(adev); amdgpu_ras_event_mgr_init(adev);
if (amdgpu_aca_is_enabled(adev)) { if (amdgpu_ras_aca_is_supported(adev)) {
if (!amdgpu_in_reset(adev)) { if (amdgpu_in_reset(adev)) {
r = amdgpu_aca_init(adev); if (amdgpu_aca_is_enabled(adev))
r = amdgpu_aca_reset(adev);
else
r = amdgpu_mca_reset(adev);
if (r) if (r)
return r; return r;
} }
if (!amdgpu_sriov_vf(adev)) if (!amdgpu_sriov_vf(adev)) {
if (amdgpu_aca_is_enabled(adev))
amdgpu_ras_set_aca_debug_mode(adev, false); amdgpu_ras_set_aca_debug_mode(adev, false);
} else {
if (amdgpu_in_reset(adev))
r = amdgpu_mca_reset(adev);
else else
r = amdgpu_mca_init(adev);
if (r)
return r;
if (!amdgpu_sriov_vf(adev))
amdgpu_ras_set_mca_debug_mode(adev, false); amdgpu_ras_set_mca_debug_mode(adev, false);
} }
}
/* Guest side doesn't need init ras feature */ /* Guest side doesn't need init ras feature */
if (amdgpu_sriov_vf(adev)) if (amdgpu_sriov_vf(adev))
...@@ -3728,10 +3753,12 @@ int amdgpu_ras_fini(struct amdgpu_device *adev) ...@@ -3728,10 +3753,12 @@ int amdgpu_ras_fini(struct amdgpu_device *adev)
amdgpu_ras_fs_fini(adev); amdgpu_ras_fs_fini(adev);
amdgpu_ras_interrupt_remove_all(adev); amdgpu_ras_interrupt_remove_all(adev);
if (amdgpu_ras_aca_is_supported(adev)) {
if (amdgpu_aca_is_enabled(adev)) if (amdgpu_aca_is_enabled(adev))
amdgpu_aca_fini(adev); amdgpu_aca_fini(adev);
else else
amdgpu_mca_fini(adev); amdgpu_mca_fini(adev);
}
WARN(AMDGPU_RAS_GET_FEATURES(con->features), "Feature mask is not cleared"); WARN(AMDGPU_RAS_GET_FEATURES(con->features), "Feature mask is not cleared");
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment