Commit 982ab128 authored by James Smart's avatar James Smart Committed by Martin K. Petersen

scsi: lpfc: Fix lpfc_nvmet_mrq attribute handling when 0

Currently, when lpfc_nvmet_mrq is 0 it could mean 2 different things
depending on when its looked at. If at module load time it specifies the
default number of hardware queues to allocate, with 0 meaning default to
the number of CPUs. But post module load, a value of zero means to disable
mrq use.

Changed the driver so that enablement of mrq is based on whether nvme
target mode is enabled or not. When enabled, mrq is enabled.  Thus, the
cfg_nvemt_mrq field only specifies the number of mrq queues to enable, with
0 defaulting to the number of cpus.
Signed-off-by: default avatarDick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: default avatarJames Smart <jsmart2021@gmail.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 4552e0f6
...@@ -7003,6 +7003,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba) ...@@ -7003,6 +7003,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
if (phba->sli_rev != LPFC_SLI_REV4) { if (phba->sli_rev != LPFC_SLI_REV4) {
/* NVME only supported on SLI4 */ /* NVME only supported on SLI4 */
phba->nvmet_support = 0; phba->nvmet_support = 0;
phba->cfg_nvmet_mrq = 0;
phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
phba->cfg_enable_bbcr = 0; phba->cfg_enable_bbcr = 0;
phba->cfg_xri_rebalancing = 0; phba->cfg_xri_rebalancing = 0;
...@@ -7104,7 +7105,7 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba) ...@@ -7104,7 +7105,7 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba)
} else { } else {
/* Not NVME Target mode. Turn off Target parameters. */ /* Not NVME Target mode. Turn off Target parameters. */
phba->nvmet_support = 0; phba->nvmet_support = 0;
phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF; phba->cfg_nvmet_mrq = 0;
phba->cfg_nvmet_fb_size = 0; phba->cfg_nvmet_fb_size = 0;
} }
} }
......
...@@ -8599,9 +8599,9 @@ lpfc_sli4_queue_verify(struct lpfc_hba *phba) ...@@ -8599,9 +8599,9 @@ lpfc_sli4_queue_verify(struct lpfc_hba *phba)
if (phba->nvmet_support) { if (phba->nvmet_support) {
if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq) if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq)
phba->cfg_nvmet_mrq = phba->cfg_irq_chann; phba->cfg_nvmet_mrq = phba->cfg_irq_chann;
if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
} }
if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
lpfc_printf_log(phba, KERN_ERR, LOG_INIT, lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
"2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
...@@ -10736,7 +10736,7 @@ lpfc_sli4_enable_msix(struct lpfc_hba *phba) ...@@ -10736,7 +10736,7 @@ lpfc_sli4_enable_msix(struct lpfc_hba *phba)
phba->cfg_irq_chann, vectors); phba->cfg_irq_chann, vectors);
if (phba->cfg_irq_chann > vectors) if (phba->cfg_irq_chann > vectors)
phba->cfg_irq_chann = vectors; phba->cfg_irq_chann = vectors;
if (phba->cfg_nvmet_mrq > vectors) if (phba->nvmet_support && (phba->cfg_nvmet_mrq > vectors))
phba->cfg_nvmet_mrq = vectors; phba->cfg_nvmet_mrq = vectors;
} }
...@@ -11293,7 +11293,7 @@ lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) ...@@ -11293,7 +11293,7 @@ lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
!phba->nvme_support) { !phba->nvme_support) {
phba->nvme_support = 0; phba->nvme_support = 0;
phba->nvmet_support = 0; phba->nvmet_support = 0;
phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF; phba->cfg_nvmet_mrq = 0;
lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
"6101 Disabling NVME support: " "6101 Disabling NVME support: "
"Not supported by firmware: %d %d\n", "Not supported by firmware: %d %d\n",
......
...@@ -27,7 +27,6 @@ ...@@ -27,7 +27,6 @@
#define LPFC_NVMET_RQE_DEF_COUNT 2048 #define LPFC_NVMET_RQE_DEF_COUNT 2048
#define LPFC_NVMET_SUCCESS_LEN 12 #define LPFC_NVMET_SUCCESS_LEN 12
#define LPFC_NVMET_MRQ_OFF 0xffff
#define LPFC_NVMET_MRQ_AUTO 0 #define LPFC_NVMET_MRQ_AUTO 0
#define LPFC_NVMET_MRQ_MAX 16 #define LPFC_NVMET_MRQ_MAX 16
......
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