Commit 984cffde authored by Carlo Caione's avatar Carlo Caione Committed by Linus Walleij

pinctrl: Fix gpio/pin mapping for Meson8b

The num_pins field in the struct meson_domain_data must include also the
missing pins in the Meson8b SoC, otherwise the GPIO <-> pin mapping is
broken on this platform. Avoid also the dinamic allocation for GPIOs.
Signed-off-by: default avatarCarlo Caione <carlo@endlessm.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 75e91439
...@@ -569,7 +569,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) ...@@ -569,7 +569,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc)
domain->chip.direction_output = meson_gpio_direction_output; domain->chip.direction_output = meson_gpio_direction_output;
domain->chip.get = meson_gpio_get; domain->chip.get = meson_gpio_get;
domain->chip.set = meson_gpio_set; domain->chip.set = meson_gpio_set;
domain->chip.base = -1; domain->chip.base = domain->data->pin_base;
domain->chip.ngpio = domain->data->num_pins; domain->chip.ngpio = domain->data->num_pins;
domain->chip.can_sleep = false; domain->chip.can_sleep = false;
domain->chip.of_node = domain->of_node; domain->chip.of_node = domain->of_node;
......
...@@ -876,13 +876,13 @@ static struct meson_domain_data meson8b_domain_data[] = { ...@@ -876,13 +876,13 @@ static struct meson_domain_data meson8b_domain_data[] = {
.banks = meson8b_banks, .banks = meson8b_banks,
.num_banks = ARRAY_SIZE(meson8b_banks), .num_banks = ARRAY_SIZE(meson8b_banks),
.pin_base = 0, .pin_base = 0,
.num_pins = 83, .num_pins = 130,
}, },
{ {
.name = "ao-bank", .name = "ao-bank",
.banks = meson8b_ao_banks, .banks = meson8b_ao_banks,
.num_banks = ARRAY_SIZE(meson8b_ao_banks), .num_banks = ARRAY_SIZE(meson8b_ao_banks),
.pin_base = 83, .pin_base = 130,
.num_pins = 16, .num_pins = 16,
}, },
}; };
......
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