Skip to content

L
linux
Commit 99b31e61 authored by Tom Rini's avatar Tom Rini
Browse files
Options

PPC32: Update the Motorola Sandpoint support. 

This removes support for the X2 version of the board,
and has a number of cleanups and enhancements.
parent f4e7c1c1
Expand all Show whitespace changes
Inline Side-by-side
Showing with 778 additions and 268 deletions
arch/ppc/Kconfig
View file @ 99b31e61
......@@ -473,6 +473,10 @@ config PRPMC800
config SANDPOINT
bool "Motorola-Sandpoint"
help
Select SANDPOINT if configuring for a Motorola Sandpoint X3
or X3(b).
X3 (any flavor).
config ADIR
bool "SBS-Adirondack"
......@@ -500,6 +504,11 @@ config PPC_CHRP
depends on PPC_MULTIPLATFORM
default y
config PPC_GEN550
bool
depends on SANDPOINT
default y
config PPC_PMAC
bool
depends on PPC_MULTIPLATFORM
......@@ -515,10 +524,6 @@ config PPC_OF
depends on PPC_PMAC || PPC_CHRP
default y
config SANDPOINT_X3
bool "Sandpoint X3"
depends on SANDPOINT
config FORCE
bool
depends on 6xx && !8260 && (PCORE || POWERPMC250)
......@@ -526,7 +531,7 @@ config FORCE
config EPIC_SERIAL_MODE
bool
depends on 6xx && !8260 && (LOPEC || SANDPOINT_X3)
depends on 6xx && !8260 && (LOPEC || SANDPOINT)
default y
config WILLOW
......
arch/ppc/configs/sandpoint_defconfig
View file @ 99b31e61
......@@ -68,7 +68,7 @@ CONFIG_SANDPOINT=y
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_ZX4500 is not set
CONFIG_SANDPOINT_X3=y
CONFIG_PPC_GEN550=y
CONFIG_EPIC_SERIAL_MODE=y
# CONFIG_MPC10X_STORE_GATHERING is not set
# CONFIG_SMP is not set
......@@ -84,8 +84,8 @@ CONFIG_ALTIVEC=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=m
# CONFIG_PCI_LEGACY_PROC is not set
# CONFIG_PCI_NAMES is not set
......@@ -117,6 +117,11 @@ CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
#
......@@ -147,7 +152,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_MD is not set
#
# ATA/IDE/MFM/RLL support
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
......@@ -166,6 +171,7 @@ CONFIG_BLK_DEV_IDEDISK=y
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
......@@ -173,7 +179,7 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDEPCI is not set
#
# SCSI support
# SCSI device support
#
# CONFIG_SCSI is not set
......@@ -292,6 +298,7 @@ CONFIG_NET_PCI=y
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_TC35815 is not set
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
CONFIG_E100=y
......@@ -412,11 +419,6 @@ CONFIG_FONT_8x16=y
#
# CONFIG_LOGO is not set
#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set
#
# Input device support
#
......@@ -443,6 +445,7 @@ CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
#
# Input Device Drivers
......@@ -731,6 +734,7 @@ CONFIG_USB_SE401=m
#
# USB Network adaptors
#
# CONFIG_USB_AX8817X is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
......
arch/ppc/platforms/Makefile
View file @ 99b31e61
......@@ -43,7 +43,7 @@ obj-$(CONFIG_POWERPMC250) += powerpmc250.o
obj-$(CONFIG_PPLUS) += pplus_pci.o pplus_setup.o
obj-$(CONFIG_PRPMC750) += prpmc750_setup.o prpmc750_pci.o
obj-$(CONFIG_PRPMC800) += prpmc800_setup.o prpmc800_pci.o
obj-$(CONFIG_SANDPOINT) += sandpoint_setup.o sandpoint_pci.o
obj-$(CONFIG_SANDPOINT) += sandpoint.o
obj-$(CONFIG_SPRUCE) += spruce_setup.o spruce_pci.o
obj-$(CONFIG_ZX4500) += zx4500_setup.o zx4500_pci.o
......
arch/ppc/platforms/sandpoint.h
View file @ 99b31e61
......@@ -6,7 +6,7 @@
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
* 2000-2003 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
......@@ -19,8 +19,8 @@
#ifndef __PPC_PLATFORMS_SANDPOINT_H
#define __PPC_PLATFORMS_SANDPOINT_H
#ifdef CONFIG_SANDPOINT_X3
#define SANDPOINT_SIO_SLOT 0 /* Cascaded from EPIC IRQ 0 */
#include <asm/ppcboot.h>
#if 0
/* The Sandpoint X3 allows the IDE interrupt to be directly connected
* from the Windbond (PCI INTC or INTD) to the serial EPIC. Someday
......@@ -34,20 +34,6 @@
#define SANDPOINT_IDE_INT0 14 /* 8259 Test */
#define SANDPOINT_IDE_INT1 15 /* 8259 Test */
#endif
#else
/*
* Define the PCI slot that the 8259 is sharing interrupts with.
* Valid values are 1 (PCI slot 2) and 2 (PCI slot 3).
*/
#define SANDPOINT_SIO_SLOT 1
/* ...and for the IDE from the 8259....
*/
#define SANDPOINT_IDE_INT0 14
#define SANDPOINT_IDE_INT1 15
#endif
#define SANDPOINT_SIO_IRQ (SANDPOINT_SIO_SLOT + NUM_8259_INTERRUPTS)
/*
* The sandpoint boards have processor modules that either have an 8240 or
......@@ -62,7 +48,33 @@
*/
#define SANDPOINT_HOST_BRIDGE_IDSEL 12
/*
* Serial defines.
*/
#define SANDPOINT_SERIAL_0 0xfe0003f8
#define SANDPOINT_SERIAL_1 0xfe0002f8
#define RS_TABLE_SIZE 2
/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
#define BASE_BAUD ( 1843200 / 16 )
#define UART_CLK 1843200
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
#else
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
#endif
#define STD_SERIAL_PORT_DFNS \
{ 0, BASE_BAUD, SANDPOINT_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \
iomem_base: (u8 *)SANDPOINT_SERIAL_0, \
io_type: SERIAL_IO_MEM }, \
{ 0, BASE_BAUD, SANDPOINT_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \
iomem_base: (u8 *)SANDPOINT_SERIAL_1, \
io_type: SERIAL_IO_MEM },
void sandpoint_find_bridges(void);
#define SERIAL_PORT_DFNS \
STD_SERIAL_PORT_DFNS
#endif /* __PPC_PLATFORMS_SANDPOINT_H */
arch/ppc/platforms/sandpoint_pci.c deleted 100644 → 0
View file @ f4e7c1c1
/*
* arch/ppc/platforms/sandpoint_pci.c
*
* PCI setup routines for the Motorola SPS Sandpoint Test Platform
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/mpc10x.h>
#include "sandpoint.h"
/*
* Motorola SPS Sandpoint interrupt routing.
*/
static inline int
sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{ SANDPOINT_SIO_IRQ,
0, 0, 0 }, /* IDSEL 11 - i8259 on Winbond */
{ 0, 0, 0, 0 }, /* IDSEL 12 - unused */
#ifdef CONFIG_SANDPOINT_X3
#if 0 /* This is what it _should_ look like -- Dan */
{ 17, 20, 19, 18 }, /* IDSEL 13 - PCI slot 1 */
{ 18, 17, 20, 19 }, /* IDSEL 14 - PCI slot 2 */
{ 19, 18, 17, 20 }, /* IDSEL 15 - PCI slot 3 */
{ 20, 19, 18, 17 }, /* IDSEL 16 - PCI slot 4 */
#else
{ 18, 21, 20, 19 }, /* IDSEL 13 - PCI slot 1 */
{ 19, 18, 21, 20 }, /* IDSEL 14 - PCI slot 2 */
{ 20, 19, 18, 21 }, /* IDSEL 15 - PCI slot 3 */
{ 21, 20, 19, 18 }, /* IDSEL 16 - PCI slot 4 */
#endif
#else
{ 16, 19, 18, 17 }, /* IDSEL 13 - PCI slot 1 */
{ 17, 16, 19, 18 }, /* IDSEL 14 - PCI slot 2 */
{ 18, 17, 16, 19 }, /* IDSEL 15 - PCI slot 3 */
{ 19, 18, 17, 16 }, /* IDSEL 16 - PCI slot 4 */
#endif
};
const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
static void __init
sandpoint_setup_winbond_83553(struct pci_controller *hose)
{
int devfn;
/*
* Route IDE interrupts directly to the 8259's IRQ 14 & 15.
* We can't route the IDE interrupt to PCI INTC# or INTD# because those
* woule interfere with the PMC's INTC# and INTD# lines.
*/
/*
* Winbond Fcn 0
*/
devfn = PCI_DEVFN(11,0);
early_write_config_byte(hose,
0,
devfn,
0x43, /* IDE Interrupt Routing Control */
0xef);
early_write_config_word(hose,
0,
devfn,
0x44, /* PCI Interrupt Routing Control */
0x0000);
/* Want ISA memory cycles to be forwarded to PCI bus */
early_write_config_byte(hose,
0,
devfn,
0x48, /* ISA-to-PCI Addr Decoder Control */
0xf0);
/* Enable RTC and Keyboard address locations. */
early_write_config_byte(hose,
0,
devfn,
0x4d, /* Chip Select Control Register */
0x00);
/* Enable Port 92. */
early_write_config_byte(hose,
0,
devfn,
0x4e, /* AT System Control Register */
0x06);
/*
* Winbond Fcn 1
*/
devfn = PCI_DEVFN(11,1);
/* Put IDE controller into native mode. */
early_write_config_byte(hose,
0,
devfn,
0x09, /* Programming interface Register */
0x8f);
/* Init IRQ routing, enable both ports, disable fast 16 */
early_write_config_dword(hose,
0,
devfn,
0x40, /* IDE Control/Status Register */
0x00ff0011);
return;
}
static int
sandpoint_exclude_device(u_char bus, u_char devfn)
{
if ((bus == 0) && (PCI_SLOT(devfn) == SANDPOINT_HOST_BRIDGE_IDSEL)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
else {
return PCIBIOS_SUCCESSFUL;
}
}
void __init
sandpoint_find_bridges(void)
{
struct pci_controller *hose;
hose = pcibios_alloc_controller();
if (!hose)
return;
hose->first_busno = 0;
hose->last_busno = 0xff;
if (mpc10x_bridge_init(hose,
MPC10X_MEM_MAP_B,
MPC10X_MEM_MAP_B,
MPC10X_MAPB_EUMB_BASE) == 0) {
/* Do early winbond init, then scan PCI bus */
sandpoint_setup_winbond_83553(hose);
ppc_md.pci_exclude_device = sandpoint_exclude_device;
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
ppc_md.pcibios_fixup = NULL;
ppc_md.pcibios_fixup_bus = NULL;
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = sandpoint_map_irq;
}
else {
if (ppc_md.progress)
ppc_md.progress("Bridge init failed", 0x100);
printk("Host bridge init failed\n");
}
return;
}
arch/ppc/platforms/sandpoint_serial.h deleted 100644 → 0
View file @ f4e7c1c1
/*
* include/asm-ppc/sandpoint_serial.h
*
* Definitions for Motorola SPS Sandpoint Test Platform
*
* Author: Mark A. Greer
* mgreer@mvista.com
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASMPPC_SANDPOINT_SERIAL_H
#define __ASMPPC_SANDPOINT_SERIAL_H
#include <linux/config.h>
#define SANDPOINT_SERIAL_0 0xfe0003f8
#define SANDPOINT_SERIAL_1 0xfe0002f8
#ifdef CONFIG_SERIAL_MANY_PORTS
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE 2
#endif
/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
#define BASE_BAUD ( 1843200 / 16 )
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
#else
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
#endif
#define STD_SERIAL_PORT_DFNS \
{ 0, BASE_BAUD, SANDPOINT_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \
iomem_base: (u8 *)SANDPOINT_SERIAL_0, \
io_type: SERIAL_IO_MEM }, \
{ 0, BASE_BAUD, SANDPOINT_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \
iomem_base: (u8 *)SANDPOINT_SERIAL_1, \
io_type: SERIAL_IO_MEM },
#define SERIAL_PORT_DFNS \
STD_SERIAL_PORT_DFNS
#endif /* __ASMPPC_SANDPOINT_SERIAL_H */
include/asm-ppc/serial.h
View file @ 99b31e61
......@@ -25,7 +25,7 @@
#elif defined(CONFIG_PRPMC800)
#include <platforms/prpmc800_serial.h>
#elif defined(CONFIG_SANDPOINT)
#include <platforms/sandpoint_serial.h>
#include <platforms/sandpoint.h>
#elif defined(CONFIG_SPRUCE)
#include <platforms/spruce_serial.h>
#elif defined(CONFIG_ZX4500)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7