Commit 9a763bfb authored by Uwe Kleine-König's avatar Uwe Kleine-König

ARM: imx: get rid of mxc_gpio_init

This function is defined once for each imx family and so is in the way
when compiling a kernel for more than one SoC.
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
parent 3aad49e1
...@@ -454,26 +454,21 @@ DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1); ...@@ -454,26 +454,21 @@ DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
#ifdef CONFIG_MACH_MX21 #ifdef CONFIG_MACH_MX21
DEFINE_MXC_GPIO_PORTS(MX21, imx21); DEFINE_MXC_GPIO_PORTS(MX21, imx21);
int __init imx21_register_gpios(void)
{
return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
}
#endif #endif
#ifdef CONFIG_MACH_MX27 #ifdef CONFIG_MACH_MX27
DEFINE_MXC_GPIO_PORTS(MX27, imx27); DEFINE_MXC_GPIO_PORTS(MX27, imx27);
#endif
int __init mxc_register_gpios(void) int __init imx27_register_gpios(void)
{ {
#ifdef CONFIG_MACH_MX21 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
if (cpu_is_mx21())
return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
else
#endif
#ifdef CONFIG_MACH_MX27
if (cpu_is_mx27())
return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
else
#endif
return 0;
} }
#endif
#ifdef CONFIG_MACH_MX21 #ifdef CONFIG_MACH_MX21
static struct resource mx21_usbhc_resources[] = { static struct resource mx21_usbhc_resources[] = {
...@@ -500,4 +495,3 @@ struct platform_device mx21_usbhc_device = { ...@@ -500,4 +495,3 @@ struct platform_device mx21_usbhc_device = {
.resource = mx21_usbhc_resources, .resource = mx21_usbhc_resources,
}; };
#endif #endif
...@@ -77,7 +77,10 @@ void __init mx21_map_io(void) ...@@ -77,7 +77,10 @@ void __init mx21_map_io(void)
iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc)); iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
} }
int imx21_register_gpios(void);
void __init mx21_init_irq(void) void __init mx21_init_irq(void)
{ {
imx21_register_gpios();
mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
} }
...@@ -77,7 +77,10 @@ void __init mx27_map_io(void) ...@@ -77,7 +77,10 @@ void __init mx27_map_io(void)
iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc)); iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
} }
int imx27_register_gpios(void);
void __init mx27_init_irq(void) void __init mx27_init_irq(void)
{ {
imx27_register_gpios();
mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
} }
...@@ -237,7 +237,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = { ...@@ -237,7 +237,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
} }
}; };
int __init mxc_register_gpios(void) int __init imx1_register_gpios(void)
{ {
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
} }
...@@ -46,7 +46,10 @@ void __init mx1_map_io(void) ...@@ -46,7 +46,10 @@ void __init mx1_map_io(void)
iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
} }
int imx1_register_gpios(void);
void __init mx1_init_irq(void) void __init mx1_init_irq(void)
{ {
imx1_register_gpios();
mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR));
} }
...@@ -414,7 +414,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = { ...@@ -414,7 +414,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
} }
}; };
int __init mxc_register_gpios(void) int __init imx25_register_gpios(void)
{ {
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
} }
......
...@@ -69,8 +69,11 @@ void __init mx25_map_io(void) ...@@ -69,8 +69,11 @@ void __init mx25_map_io(void)
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
int imx25_register_gpios(void);
void __init mx25_init_irq(void) void __init mx25_init_irq(void)
{ {
imx25_register_gpios();
mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT); mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT);
} }
...@@ -147,7 +147,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = { ...@@ -147,7 +147,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
} }
}; };
int __init mxc_register_gpios(void) int __init imx3x_register_gpios(void)
{ {
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
} }
......
...@@ -97,8 +97,11 @@ void __init mx35_map_io(void) ...@@ -97,8 +97,11 @@ void __init mx35_map_io(void)
} }
#endif #endif
int imx3x_register_gpios(void);
void __init mx31_init_irq(void) void __init mx31_init_irq(void)
{ {
imx3x_register_gpios();
mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
} }
......
...@@ -195,7 +195,7 @@ static struct mxc_gpio_port mxc_gpio_ports[] = { ...@@ -195,7 +195,7 @@ static struct mxc_gpio_port mxc_gpio_ports[] = {
}, },
}; };
int __init mxc_register_gpios(void) int __init imx51_register_gpios(void)
{ {
return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
} }
...@@ -65,6 +65,8 @@ void __init mx51_map_io(void) ...@@ -65,6 +65,8 @@ void __init mx51_map_io(void)
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
int imx51_register_gpios(void);
void __init mx51_init_irq(void) void __init mx51_init_irq(void)
{ {
unsigned long tzic_addr; unsigned long tzic_addr;
...@@ -79,5 +81,6 @@ void __init mx51_init_irq(void) ...@@ -79,5 +81,6 @@ void __init mx51_init_irq(void)
if (!tzic_virt) if (!tzic_virt)
panic("unable to map TZIC interrupt controller\n"); panic("unable to map TZIC interrupt controller\n");
imx51_register_gpios();
tzic_init_irq(tzic_virt); tzic_init_irq(tzic_virt);
} }
...@@ -135,7 +135,7 @@ static struct mxc_gpio_port mxc_gpio_ports[] = { ...@@ -135,7 +135,7 @@ static struct mxc_gpio_port mxc_gpio_ports[] = {
}, },
}; };
int __init mxc_register_gpios(void) int __init mxc91231_register_gpios(void)
{ {
return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
} }
......
...@@ -88,7 +88,10 @@ void __init mxc91231_map_io(void) ...@@ -88,7 +88,10 @@ void __init mxc91231_map_io(void)
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
} }
int mxc91231_register_gpios(void);
void __init mxc91231_init_irq(void) void __init mxc91231_init_irq(void)
{ {
mxc91231_register_gpios();
mxc_init_irq(MXC91231_IO_ADDRESS(MXC91231_AVIC_BASE_ADDR)); mxc_init_irq(MXC91231_IO_ADDRESS(MXC91231_AVIC_BASE_ADDR));
} }
...@@ -142,9 +142,6 @@ void __init mxc_init_irq(void __iomem *irqbase) ...@@ -142,9 +142,6 @@ void __init mxc_init_irq(void __iomem *irqbase)
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
__raw_writel(0, avic_base + AVIC_NIPRIORITY(i)); __raw_writel(0, avic_base + AVIC_NIPRIORITY(i));
/* init architectures chained interrupt handler */
mxc_register_gpios();
#ifdef CONFIG_FIQ #ifdef CONFIG_FIQ
/* Initialize FIQ */ /* Initialize FIQ */
init_FIQ(); init_FIQ();
......
...@@ -145,8 +145,6 @@ void __init tzic_init_irq(void __iomem *irqbase) ...@@ -145,8 +145,6 @@ void __init tzic_init_irq(void __iomem *irqbase)
set_irq_handler(i, handle_level_irq); set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID); set_irq_flags(i, IRQF_VALID);
} }
mxc_register_gpios();
pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); pr_info("TrustZone Interrupt Controller (TZIC) initialized\n");
} }
......
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