Commit 9b633670 authored by Hariprasad Kelam's avatar Hariprasad Kelam Committed by Jakub Kicinski

octeontx2-af: Limit link bringup time at firmware

Set the maximum time firmware should poll for a link.
If not set firmware could block CPU for a long time resulting
in mailbox failures. If link doesn't come up within 1second,
firmware will anyway notify the status as and when LINK comes up
Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarGeetha Sowjanya <gakula@marvell.com>
Link: https://lore.kernel.org/r/20220712161815.12621-1-gakula@marvell.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 5dc0f749
...@@ -1440,11 +1440,19 @@ static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable) ...@@ -1440,11 +1440,19 @@ static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool enable)
u64 req = 0; u64 req = 0;
u64 resp; u64 resp;
if (enable) if (enable) {
req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_UP, req); req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_UP, req);
else /* On CN10K firmware offloads link bring up/down operations to ECP
req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_DOWN, req); * On Octeontx2 link operations are handled by firmware itself
* which can cause mbox errors so configure maximum time firmware
* poll for Link as 1000 ms
*/
if (!is_dev_rpm(cgx))
req = FIELD_SET(LINKCFG_TIMEOUT, 1000, req);
} else {
req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_DOWN, req);
}
return cgx_fwi_cmd_generic(req, &resp, cgx, lmac_id); return cgx_fwi_cmd_generic(req, &resp, cgx, lmac_id);
} }
......
...@@ -92,7 +92,7 @@ ...@@ -92,7 +92,7 @@
#define CGX_COMMAND_REG CGXX_SCRATCH1_REG #define CGX_COMMAND_REG CGXX_SCRATCH1_REG
#define CGX_EVENT_REG CGXX_SCRATCH0_REG #define CGX_EVENT_REG CGXX_SCRATCH0_REG
#define CGX_CMD_TIMEOUT 2200 /* msecs */ #define CGX_CMD_TIMEOUT 5000 /* msecs */
#define DEFAULT_PAUSE_TIME 0x7FF #define DEFAULT_PAUSE_TIME 0x7FF
#define CGX_LMAC_FWI 0 #define CGX_LMAC_FWI 0
......
...@@ -261,4 +261,6 @@ struct cgx_lnk_sts { ...@@ -261,4 +261,6 @@ struct cgx_lnk_sts {
#define CMDMODECHANGE_PORT GENMASK_ULL(21, 14) #define CMDMODECHANGE_PORT GENMASK_ULL(21, 14)
#define CMDMODECHANGE_FLAGS GENMASK_ULL(63, 22) #define CMDMODECHANGE_FLAGS GENMASK_ULL(63, 22)
/* LINK_BRING_UP command timeout */
#define LINKCFG_TIMEOUT GENMASK_ULL(21, 8)
#endif /* __CGX_FW_INTF_H__ */ #endif /* __CGX_FW_INTF_H__ */
...@@ -33,7 +33,7 @@ ...@@ -33,7 +33,7 @@
#define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull)) #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
#define MBOX_RSP_TIMEOUT 3000 /* Time(ms) to wait for mbox response */ #define MBOX_RSP_TIMEOUT 6000 /* Time(ms) to wait for mbox response */
#define MBOX_MSG_ALIGN 16 /* Align mbox msg start to 16bytes */ #define MBOX_MSG_ALIGN 16 /* Align mbox msg start to 16bytes */
......
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