Commit 9c3a3009 authored by Tony Lindgren's avatar Tony Lindgren

Merge tag 'omap-cleanup-b-for-3.5' of...

Merge tag 'omap-cleanup-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-hwmod

Clean up various aspects of the OMAP hwmod code, which is the IP block
control code for OMAP SoCs.  In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
parents e816b57a 3af35fbc
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......@@ -15,10 +15,12 @@
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
#include <plat/l3_2xxx.h>
#include <plat/l4_2xxx.h>
#include "omap_hwmod_common_data.h"
struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
static struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
{
.pa_start = OMAP2_UART1_BASE,
.pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
......@@ -27,7 +29,7 @@ struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
static struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
{
.pa_start = OMAP2_UART2_BASE,
.pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
......@@ -36,7 +38,7 @@ struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
static struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
{
.pa_start = OMAP2_UART3_BASE,
.pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
......@@ -45,7 +47,7 @@ struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
{
.pa_start = 0x4802a000,
.pa_end = 0x4802a000 + SZ_1K - 1,
......@@ -54,7 +56,7 @@ struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
{
.pa_start = 0x48078000,
.pa_end = 0x48078000 + SZ_1K - 1,
......@@ -63,7 +65,7 @@ struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
{
.pa_start = 0x4807a000,
.pa_end = 0x4807a000 + SZ_1K - 1,
......@@ -72,7 +74,7 @@ struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
{
.pa_start = 0x4807c000,
.pa_end = 0x4807c000 + SZ_1K - 1,
......@@ -81,7 +83,7 @@ struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
{
.pa_start = 0x4807e000,
.pa_end = 0x4807e000 + SZ_1K - 1,
......@@ -90,7 +92,7 @@ struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
{
.pa_start = 0x48080000,
.pa_end = 0x48080000 + SZ_1K - 1,
......@@ -99,7 +101,7 @@ struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
{
.pa_start = 0x48082000,
.pa_end = 0x48082000 + SZ_1K - 1,
......@@ -108,7 +110,7 @@ struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
static struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
{
.pa_start = 0x48084000,
.pa_end = 0x48084000 + SZ_1K - 1,
......@@ -127,4 +129,246 @@ struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
{ }
};
/*
* Common interconnect data
*/
/* L3 -> L4_CORE interface */
struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
.master = &omap2xxx_l3_main_hwmod,
.slave = &omap2xxx_l4_core_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* MPU -> L3 interface */
struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
.master = &omap2xxx_mpu_hwmod,
.slave = &omap2xxx_l3_main_hwmod,
.user = OCP_USER_MPU,
};
/* DSS -> l3 */
struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
.master = &omap2xxx_dss_core_hwmod,
.slave = &omap2xxx_l3_main_hwmod,
.fw = {
.omap2 = {
.l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
.flags = OMAP_FIREWALL_L3,
}
},
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4_CORE -> L4_WKUP interface */
struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_l4_wkup_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 CORE -> UART1 interface */
struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_uart1_hwmod,
.clk = "uart1_ick",
.addr = omap2xxx_uart1_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 CORE -> UART2 interface */
struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_uart2_hwmod,
.clk = "uart2_ick",
.addr = omap2xxx_uart2_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 PER -> UART3 interface */
struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_uart3_hwmod,
.clk = "uart3_ick",
.addr = omap2xxx_uart3_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 core -> mcspi1 interface */
struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_mcspi1_hwmod,
.clk = "mcspi1_ick",
.addr = omap2_mcspi1_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 core -> mcspi2 interface */
struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_mcspi2_hwmod,
.clk = "mcspi2_ick",
.addr = omap2_mcspi2_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer2 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer2_hwmod,
.clk = "gpt2_ick",
.addr = omap2xxx_timer2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer3 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer3_hwmod,
.clk = "gpt3_ick",
.addr = omap2xxx_timer3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer4 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer4_hwmod,
.clk = "gpt4_ick",
.addr = omap2xxx_timer4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer5 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer5_hwmod,
.clk = "gpt5_ick",
.addr = omap2xxx_timer5_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer6 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer6_hwmod,
.clk = "gpt6_ick",
.addr = omap2xxx_timer6_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer7 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer7_hwmod,
.clk = "gpt7_ick",
.addr = omap2xxx_timer7_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer8 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer8_hwmod,
.clk = "gpt8_ick",
.addr = omap2xxx_timer8_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer9 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer9_hwmod,
.clk = "gpt9_ick",
.addr = omap2xxx_timer9_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer10 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer10_hwmod,
.clk = "gpt10_ick",
.addr = omap2_timer10_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer11 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer11_hwmod,
.clk = "gpt11_ick",
.addr = omap2_timer11_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> timer12 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_timer12_hwmod,
.clk = "gpt12_ick",
.addr = omap2xxx_timer12_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> dss */
struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_dss_core_hwmod,
.clk = "dss_ick",
.addr = omap2_dss_addrs,
.fw = {
.omap2 = {
.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
.flags = OMAP_FIREWALL_L4,
}
},
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> dss_dispc */
struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_dss_dispc_hwmod,
.clk = "dss_ick",
.addr = omap2_dss_dispc_addrs,
.fw = {
.omap2 = {
.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
.flags = OMAP_FIREWALL_L4,
}
},
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> dss_rfbi */
struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_dss_rfbi_hwmod,
.clk = "dss_ick",
.addr = omap2_dss_rfbi_addrs,
.fw = {
.omap2 = {
.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
.flags = OMAP_FIREWALL_L4,
}
},
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_core -> dss_venc */
struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_dss_venc_hwmod,
.clk = "dss_ick",
.addr = omap2_dss_venc_addrs,
.fw = {
.omap2 = {
.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
.flags = OMAP_FIREWALL_L4,
}
},
.flags = OCPIF_SWSUP_IDLE,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
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......@@ -19,18 +19,6 @@
#include "display.h"
/* Common address space across OMAP2xxx */
extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[];
extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[];
/* Common address space across OMAP2xxx/3xxx */
......@@ -54,6 +42,64 @@ extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
/* Common IP block data across OMAP2xxx */
extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[];
extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[];
extern struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr;
extern struct omap_hwmod omap2xxx_l3_main_hwmod;
extern struct omap_hwmod omap2xxx_l4_core_hwmod;
extern struct omap_hwmod omap2xxx_l4_wkup_hwmod;
extern struct omap_hwmod omap2xxx_mpu_hwmod;
extern struct omap_hwmod omap2xxx_iva_hwmod;
extern struct omap_hwmod omap2xxx_timer1_hwmod;
extern struct omap_hwmod omap2xxx_timer2_hwmod;
extern struct omap_hwmod omap2xxx_timer3_hwmod;
extern struct omap_hwmod omap2xxx_timer4_hwmod;
extern struct omap_hwmod omap2xxx_timer5_hwmod;
extern struct omap_hwmod omap2xxx_timer6_hwmod;
extern struct omap_hwmod omap2xxx_timer7_hwmod;
extern struct omap_hwmod omap2xxx_timer8_hwmod;
extern struct omap_hwmod omap2xxx_timer9_hwmod;
extern struct omap_hwmod omap2xxx_timer10_hwmod;
extern struct omap_hwmod omap2xxx_timer11_hwmod;
extern struct omap_hwmod omap2xxx_timer12_hwmod;
extern struct omap_hwmod omap2xxx_wd_timer2_hwmod;
extern struct omap_hwmod omap2xxx_uart1_hwmod;
extern struct omap_hwmod omap2xxx_uart2_hwmod;
extern struct omap_hwmod omap2xxx_uart3_hwmod;
extern struct omap_hwmod omap2xxx_dss_core_hwmod;
extern struct omap_hwmod omap2xxx_dss_dispc_hwmod;
extern struct omap_hwmod omap2xxx_dss_rfbi_hwmod;
extern struct omap_hwmod omap2xxx_dss_venc_hwmod;
extern struct omap_hwmod omap2xxx_gpio1_hwmod;
extern struct omap_hwmod omap2xxx_gpio2_hwmod;
extern struct omap_hwmod omap2xxx_gpio3_hwmod;
extern struct omap_hwmod omap2xxx_gpio4_hwmod;
extern struct omap_hwmod omap2xxx_mcspi1_hwmod;
extern struct omap_hwmod omap2xxx_mcspi2_hwmod;
/* Common interface data across OMAP2xxx */
extern struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core;
extern struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main;
extern struct omap_hwmod_ocp_if omap2xxx_dss__l3;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup;
extern struct omap_hwmod_ocp_if omap2_l4_core__uart1;
extern struct omap_hwmod_ocp_if omap2_l4_core__uart2;
extern struct omap_hwmod_ocp_if omap2_l4_core__uart3;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi;
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc;
/* Common IP block data */
extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];
......@@ -94,6 +140,7 @@ extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];
extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
/* OMAP hwmod classes - forward declarations */
extern struct omap_hwmod_class l3_hwmod_class;
......
......@@ -145,8 +145,10 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
{
char name[10]; /* 10 = sizeof("gptXX_Xck0") */
struct omap_hwmod *oh;
struct resource irq_rsrc, mem_rsrc;
size_t size;
int res = 0;
int r;
sprintf(name, "timer%d", gptimer_id);
omap_hwmod_setup_one(name);
......@@ -154,9 +156,16 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
if (!oh)
return -ENODEV;
timer->irq = oh->mpu_irqs[0].irq;
timer->phys_base = oh->slaves[0]->addr->pa_start;
size = oh->slaves[0]->addr->pa_end - timer->phys_base;
r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc);
if (r)
return -ENXIO;
timer->irq = irq_rsrc.start;
r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc);
if (r)
return -ENXIO;
timer->phys_base = mem_rsrc.start;
size = mem_rsrc.end - mem_rsrc.start;
/* Static mapping, never released */
timer->io_base = ioremap(timer->phys_base, size);
......
......@@ -213,11 +213,16 @@ struct omap_hwmod_addr_space {
*/
#define OCP_USER_MPU (1 << 0)
#define OCP_USER_SDMA (1 << 1)
#define OCP_USER_DSP (1 << 2)
/* omap_hwmod_ocp_if.flags bits */
#define OCPIF_SWSUP_IDLE (1 << 0)
#define OCPIF_CAN_BURST (1 << 1)
/* omap_hwmod_ocp_if._int_flags possibilities */
#define _OCPIF_INT_FLAGS_REGISTERED (1 << 0)
/**
* struct omap_hwmod_ocp_if - OCP interface data
* @master: struct omap_hwmod that initiates OCP transactions on this link
......@@ -229,6 +234,7 @@ struct omap_hwmod_addr_space {
* @width: OCP data width
* @user: initiators using this interface (see OCP_USER_* macros above)
* @flags: OCP interface flags (see OCPIF_* macros above)
* @_int_flags: internal flags (see _OCPIF_INT_FLAGS* macros above)
*
* It may also be useful to add a tag_cnt field for OCP2.x devices.
*
......@@ -247,6 +253,7 @@ struct omap_hwmod_ocp_if {
u8 width;
u8 user;
u8 flags;
u8 _int_flags;
};
......@@ -305,6 +312,7 @@ struct omap_hwmod_sysc_fields {
* @rev_offs: IP block revision register offset (from module base addr)
* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
* @srst_udelay: Delay needed after doing a softreset in usecs
* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
* @clockact: the default value of the module CLOCKACTIVITY bits
......@@ -326,13 +334,14 @@ struct omap_hwmod_sysc_fields {
* then this field has to be populated with the correct offset structure.
*/
struct omap_hwmod_class_sysconfig {
u16 rev_offs;
u16 sysc_offs;
u16 syss_offs;
u32 rev_offs;
u32 sysc_offs;
u32 syss_offs;
u16 sysc_flags;
struct omap_hwmod_sysc_fields *sysc_fields;
u8 srst_udelay;
u8 idlemodes;
u8 clockact;
struct omap_hwmod_sysc_fields *sysc_fields;
};
/**
......@@ -473,6 +482,16 @@ struct omap_hwmod_class {
int (*reset)(struct omap_hwmod *oh);
};
/**
* struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs
* @ocp_if: OCP interface structure record pointer
* @node: list_head pointing to next struct omap_hwmod_link in a list
*/
struct omap_hwmod_link {
struct omap_hwmod_ocp_if *ocp_if;
struct list_head node;
};
/**
* struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
* @name: name of the hwmod
......@@ -485,12 +504,10 @@ struct omap_hwmod_class {
* @_clk: pointer to the main struct clk (filled in at runtime)
* @opt_clks: other device clocks that drivers can request (0..*)
* @voltdm: pointer to voltage domain (filled in at runtime)
* @masters: ptr to array of OCP ifs that this hwmod can initiate on
* @slaves: ptr to array of OCP ifs that this hwmod can respond on
* @dev_attr: arbitrary device attributes that can be passed to the driver
* @_sysc_cache: internal-use hwmod flags
* @_mpu_rt_va: cached register target start address (internal use)
* @_mpu_port_index: cached MPU register target slave ID (internal use)
* @_mpu_port: cached MPU register target slave (internal use)
* @opt_clks_cnt: number of @opt_clks
* @master_cnt: number of @master entries
* @slaves_cnt: number of @slave entries
......@@ -509,6 +526,8 @@ struct omap_hwmod_class {
*
* Parameter names beginning with an underscore are managed internally by
* the omap_hwmod code and should not be set during initialization.
*
* @masters and @slaves are now deprecated.
*/
struct omap_hwmod {
const char *name;
......@@ -527,15 +546,15 @@ struct omap_hwmod {
struct omap_hwmod_opt_clk *opt_clks;
char *clkdm_name;
struct clockdomain *clkdm;
struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
struct list_head master_ports; /* connect to *_IA */
struct list_head slave_ports; /* connect to *_TA */
void *dev_attr;
u32 _sysc_cache;
void __iomem *_mpu_rt_va;
spinlock_t _lock;
struct list_head node;
struct omap_hwmod_ocp_if *_mpu_port;
u16 flags;
u8 _mpu_port_index;
u8 response_lat;
u8 rst_lines_cnt;
u8 opt_clks_cnt;
......@@ -547,7 +566,6 @@ struct omap_hwmod {
u8 _postsetup_state;
};
int omap_hwmod_register(struct omap_hwmod **ohs);
struct omap_hwmod *omap_hwmod_lookup(const char *name);
int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
void *data);
......@@ -579,6 +597,8 @@ int omap_hwmod_softreset(struct omap_hwmod *oh);
int omap_hwmod_count_resources(struct omap_hwmod *oh);
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
const char *name, struct resource *res);
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
......@@ -617,4 +637,6 @@ extern int omap2430_hwmod_init(void);
extern int omap3xxx_hwmod_init(void);
extern int omap44xx_hwmod_init(void);
extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois);
#endif
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