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Commit 9ca5a7ce authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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ARM: dts: exynos: use lowercase hex addresses 

By convention the hex addresses should be lowercase.

Link: https://lore.kernel.org/r/20230125094513.155063-7-krzysztof.kozlowski@linaro.orgSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 7bac2cd7
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Showing with 171 additions and 171 deletions
arch/arm/boot/dts/exynos-syscon-restart.dtsi
View file @ 9ca5a7ce
...@@ -7,7 +7,7 @@ &pmu_system_controller { ...@@ -7,7 +7,7 @@ &pmu_system_controller {
poweroff: syscon-poweroff { poweroff: syscon-poweroff {
compatible = "syscon-poweroff"; compatible = "syscon-poweroff";
regmap = <&pmu_system_controller>; regmap = <&pmu_system_controller>;
offset = <0x330C>; /* PS_HOLD_CONTROL */ offset = <0x330c>; /* PS_HOLD_CONTROL */
mask = <0x5200>; /* reset value */ mask = <0x5200>; /* reset value */
}; };
......
arch/arm/boot/dts/exynos3250-monk.dts
View file @ 9ca5a7ce
...@@ -31,7 +31,7 @@ memory@40000000 { ...@@ -31,7 +31,7 @@ memory@40000000 {
firmware@205f000 { firmware@205f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>; reg = <0x0205f000 0x1000>;
}; };
gpio-keys { gpio-keys {
......
arch/arm/boot/dts/exynos3250-rinato.dts
View file @ 9ca5a7ce
...@@ -36,7 +36,7 @@ memory@40000000 { ...@@ -36,7 +36,7 @@ memory@40000000 {
firmware@205f000 { firmware@205f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>; reg = <0x0205f000 0x1000>;
}; };
gpio-keys { gpio-keys {
......
arch/arm/boot/dts/exynos3250.dtsi
View file @ 9ca5a7ce
...@@ -188,35 +188,35 @@ mipi_phy: video-phy { ...@@ -188,35 +188,35 @@ mipi_phy: video-phy {
pd_cam: power-domain@10023c00 { pd_cam: power-domain@10023c00 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>; reg = <0x10023c00 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "CAM"; label = "CAM";
}; };
pd_mfc: power-domain@10023c40 { pd_mfc: power-domain@10023c40 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>; reg = <0x10023c40 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "MFC"; label = "MFC";
}; };
pd_g3d: power-domain@10023c60 { pd_g3d: power-domain@10023c60 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>; reg = <0x10023c60 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "G3D"; label = "G3D";
}; };
pd_lcd0: power-domain@10023c80 { pd_lcd0: power-domain@10023c80 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>; reg = <0x10023c80 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "LCD0"; label = "LCD0";
}; };
pd_isp: power-domain@10023ca0 { pd_isp: power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>; reg = <0x10023ca0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "ISP"; label = "ISP";
}; };
...@@ -233,7 +233,7 @@ cmu: clock-controller@10030000 { ...@@ -233,7 +233,7 @@ cmu: clock-controller@10030000 {
cmu_dmc: clock-controller@105c0000 { cmu_dmc: clock-controller@105c0000 {
compatible = "samsung,exynos3250-cmu-dmc"; compatible = "samsung,exynos3250-cmu-dmc";
reg = <0x105C0000 0x2000>; reg = <0x105c0000 0x2000>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
...@@ -248,7 +248,7 @@ rtc: rtc@10070000 { ...@@ -248,7 +248,7 @@ rtc: rtc@10070000 {
tmu: tmu@100c0000 { tmu: tmu@100c0000 {
compatible = "samsung,exynos3250-tmu"; compatible = "samsung,exynos3250-tmu";
reg = <0x100C0000 0x100>; reg = <0x100c0000 0x100>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_TMU_APBIF>; clocks = <&cmu CLK_TMU_APBIF>;
clock-names = "tmu_apbif"; clock-names = "tmu_apbif";
...@@ -342,7 +342,7 @@ fimd: fimd@11c00000 { ...@@ -342,7 +342,7 @@ fimd: fimd@11c00000 {
dsi_0: dsi@11c80000 { dsi_0: dsi@11c80000 {
compatible = "samsung,exynos3250-mipi-dsi"; compatible = "samsung,exynos3250-mipi-dsi";
reg = <0x11C80000 0x10000>; reg = <0x11c80000 0x10000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
samsung,phy-type = <0>; samsung,phy-type = <0>;
power-domains = <&pd_lcd0>; power-domains = <&pd_lcd0>;
...@@ -414,7 +414,7 @@ mshc_2: mmc@12530000 { ...@@ -414,7 +414,7 @@ mshc_2: mmc@12530000 {
exynos_usbphy: usb-phy@125b0000 { exynos_usbphy: usb-phy@125b0000 {
compatible = "samsung,exynos3250-usb2-phy"; compatible = "samsung,exynos3250-usb2-phy";
reg = <0x125B0000 0x100>; reg = <0x125b0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>; samsung,pmureg-phandle = <&pmu_system_controller>;
clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>; clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>;
clock-names = "phy", "ref"; clock-names = "phy", "ref";
...@@ -442,7 +442,7 @@ pdma1: dma-controller@12690000 { ...@@ -442,7 +442,7 @@ pdma1: dma-controller@12690000 {
adc: adc@126c0000 { adc: adc@126c0000 {
compatible = "samsung,exynos3250-adc"; compatible = "samsung,exynos3250-adc";
reg = <0x126C0000 0x100>; reg = <0x126c0000 0x100>;
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "adc", "sclk"; clock-names = "adc", "sclk";
clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
...@@ -593,7 +593,7 @@ i2c_4: i2c@138a0000 { ...@@ -593,7 +593,7 @@ i2c_4: i2c@138a0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138A0000 0x100>; reg = <0x138a0000 0x100>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_I2C4>; clocks = <&cmu CLK_I2C4>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -606,7 +606,7 @@ i2c_5: i2c@138b0000 { ...@@ -606,7 +606,7 @@ i2c_5: i2c@138b0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138B0000 0x100>; reg = <0x138b0000 0x100>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_I2C5>; clocks = <&cmu CLK_I2C5>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -619,7 +619,7 @@ i2c_6: i2c@138c0000 { ...@@ -619,7 +619,7 @@ i2c_6: i2c@138c0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138C0000 0x100>; reg = <0x138c0000 0x100>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_I2C6>; clocks = <&cmu CLK_I2C6>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -632,7 +632,7 @@ i2c_7: i2c@138d0000 { ...@@ -632,7 +632,7 @@ i2c_7: i2c@138d0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138D0000 0x100>; reg = <0x138d0000 0x100>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_I2C7>; clocks = <&cmu CLK_I2C7>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -688,7 +688,7 @@ i2s2: i2s@13970000 { ...@@ -688,7 +688,7 @@ i2s2: i2s@13970000 {
pwm: pwm@139d0000 { pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm"; compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>; reg = <0x139d0000 0x1000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
......
arch/arm/boot/dts/exynos4.dtsi
View file @ 9ca5a7ce
...@@ -65,7 +65,7 @@ soc: soc { ...@@ -65,7 +65,7 @@ soc: soc {
clock_audss: clock-controller@3810000 { clock_audss: clock-controller@3810000 {
compatible = "samsung,exynos4210-audss-clock"; compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>; reg = <0x03810000 0x0c>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_SCLK_AUDIO0>,
...@@ -113,28 +113,28 @@ mipi_phy: video-phy { ...@@ -113,28 +113,28 @@ mipi_phy: video-phy {
pd_mfc: power-domain@10023c40 { pd_mfc: power-domain@10023c40 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>; reg = <0x10023c40 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "MFC"; label = "MFC";
}; };
pd_g3d: power-domain@10023c60 { pd_g3d: power-domain@10023c60 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>; reg = <0x10023c60 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "G3D"; label = "G3D";
}; };
pd_lcd0: power-domain@10023c80 { pd_lcd0: power-domain@10023c80 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>; reg = <0x10023c80 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "LCD0"; label = "LCD0";
}; };
pd_tv: power-domain@10023c20 { pd_tv: power-domain@10023c20 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>; reg = <0x10023c20 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
power-domains = <&pd_lcd0>; power-domains = <&pd_lcd0>;
label = "TV"; label = "TV";
...@@ -142,21 +142,21 @@ pd_tv: power-domain@10023c20 { ...@@ -142,21 +142,21 @@ pd_tv: power-domain@10023c20 {
pd_cam: power-domain@10023c00 { pd_cam: power-domain@10023c00 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>; reg = <0x10023c00 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "CAM"; label = "CAM";
}; };
pd_gps: power-domain@10023ce0 { pd_gps: power-domain@10023ce0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023CE0 0x20>; reg = <0x10023ce0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "GPS"; label = "GPS";
}; };
pd_gps_alive: power-domain@10023d00 { pd_gps_alive: power-domain@10023d00 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023D00 0x20>; reg = <0x10023d00 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "GPS alive"; label = "GPS alive";
}; };
...@@ -190,7 +190,7 @@ pmu_system_controller: system-controller@10020000 { ...@@ -190,7 +190,7 @@ pmu_system_controller: system-controller@10020000 {
dsi_0: dsi@11c80000 { dsi_0: dsi@11c80000 {
compatible = "samsung,exynos4210-mipi-dsi"; compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x11C80000 0x10000>; reg = <0x11c80000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_lcd0>; power-domains = <&pd_lcd0>;
phys = <&mipi_phy 1>; phys = <&mipi_phy 1>;
...@@ -309,7 +309,7 @@ rtc: rtc@10070000 { ...@@ -309,7 +309,7 @@ rtc: rtc@10070000 {
keypad: keypad@100a0000 { keypad: keypad@100a0000 {
compatible = "samsung,s5pv210-keypad"; compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>; reg = <0x100a0000 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_KEYIF>; clocks = <&clock CLK_KEYIF>;
clock-names = "keypad"; clock-names = "keypad";
...@@ -354,7 +354,7 @@ sdhci_3: mmc@12540000 { ...@@ -354,7 +354,7 @@ sdhci_3: mmc@12540000 {
exynos_usbphy: usb-phy@125b0000 { exynos_usbphy: usb-phy@125b0000 {
compatible = "samsung,exynos4210-usb2-phy"; compatible = "samsung,exynos4210-usb2-phy";
reg = <0x125B0000 0x100>; reg = <0x125b0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>; samsung,pmureg-phandle = <&pmu_system_controller>;
clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>; clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
clock-names = "phy", "ref"; clock-names = "phy", "ref";
...@@ -546,7 +546,7 @@ i2c_4: i2c@138a0000 { ...@@ -546,7 +546,7 @@ i2c_4: i2c@138a0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138A0000 0x100>; reg = <0x138a0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C4>; clocks = <&clock CLK_I2C4>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -559,7 +559,7 @@ i2c_5: i2c@138b0000 { ...@@ -559,7 +559,7 @@ i2c_5: i2c@138b0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138B0000 0x100>; reg = <0x138b0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C5>; clocks = <&clock CLK_I2C5>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -572,7 +572,7 @@ i2c_6: i2c@138c0000 { ...@@ -572,7 +572,7 @@ i2c_6: i2c@138c0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138C0000 0x100>; reg = <0x138c0000 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C6>; clocks = <&clock CLK_I2C6>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -585,7 +585,7 @@ i2c_7: i2c@138d0000 { ...@@ -585,7 +585,7 @@ i2c_7: i2c@138d0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x138D0000 0x100>; reg = <0x138d0000 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C7>; clocks = <&clock CLK_I2C7>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -598,7 +598,7 @@ i2c_8: i2c@138e0000 { ...@@ -598,7 +598,7 @@ i2c_8: i2c@138e0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "samsung,s3c2440-hdmiphy-i2c"; compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x138E0000 0x100>; reg = <0x138e0000 0x100>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C_HDMI>; clocks = <&clock CLK_I2C_HDMI>;
clock-names = "i2c"; clock-names = "i2c";
...@@ -657,7 +657,7 @@ spi_2: spi@13940000 { ...@@ -657,7 +657,7 @@ spi_2: spi@13940000 {
pwm: pwm@139d0000 { pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm"; compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>; reg = <0x139d0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
...@@ -712,7 +712,7 @@ fimd: fimd@11c00000 { ...@@ -712,7 +712,7 @@ fimd: fimd@11c00000 {
tmu: tmu@100c0000 { tmu: tmu@100c0000 {
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
reg = <0x100C0000 0x100>; reg = <0x100c0000 0x100>;
interrupts = <2 4>; interrupts = <2 4>;
status = "disabled"; status = "disabled";
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
...@@ -739,7 +739,7 @@ rotator: rotator@12810000 { ...@@ -739,7 +739,7 @@ rotator: rotator@12810000 {
hdmi: hdmi@12d00000 { hdmi: hdmi@12d00000 {
compatible = "samsung,exynos4210-hdmi"; compatible = "samsung,exynos4210-hdmi";
reg = <0x12D00000 0x70000>; reg = <0x12d00000 0x70000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
"sclk_hdmiphy", "mout_hdmi"; "sclk_hdmiphy", "mout_hdmi";
...@@ -756,7 +756,7 @@ hdmi: hdmi@12d00000 { ...@@ -756,7 +756,7 @@ hdmi: hdmi@12d00000 {
hdmicec: cec@100b0000 { hdmicec: cec@100b0000 {
compatible = "samsung,s5p-cec"; compatible = "samsung,s5p-cec";
reg = <0x100B0000 0x200>; reg = <0x100b0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>; clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec"; clock-names = "hdmicec";
...@@ -770,7 +770,7 @@ hdmicec: cec@100b0000 { ...@@ -770,7 +770,7 @@ hdmicec: cec@100b0000 {
mixer: mixer@12c10000 { mixer: mixer@12c10000 {
compatible = "samsung,exynos4210-mixer"; compatible = "samsung,exynos4210-mixer";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>; reg = <0x12c10000 0x2100>, <0x12c00000 0x300>;
power-domains = <&pd_tv>; power-domains = <&pd_tv>;
iommus = <&sysmmu_tv>; iommus = <&sysmmu_tv>;
status = "disabled"; status = "disabled";
...@@ -902,7 +902,7 @@ sysmmu_mfc_r: sysmmu@13630000 { ...@@ -902,7 +902,7 @@ sysmmu_mfc_r: sysmmu@13630000 {
sysmmu_tv: sysmmu@12e20000 { sysmmu_tv: sysmmu@12e20000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x12E20000 0x1000>; reg = <0x12e20000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <5 4>; interrupts = <5 4>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -913,7 +913,7 @@ sysmmu_tv: sysmmu@12e20000 { ...@@ -913,7 +913,7 @@ sysmmu_tv: sysmmu@12e20000 {
sysmmu_fimc0: sysmmu@11a20000 { sysmmu_fimc0: sysmmu@11a20000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11A20000 0x1000>; reg = <0x11a20000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 2>; interrupts = <4 2>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -924,7 +924,7 @@ sysmmu_fimc0: sysmmu@11a20000 { ...@@ -924,7 +924,7 @@ sysmmu_fimc0: sysmmu@11a20000 {
sysmmu_fimc1: sysmmu@11a30000 { sysmmu_fimc1: sysmmu@11a30000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11A30000 0x1000>; reg = <0x11a30000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 3>; interrupts = <4 3>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -935,7 +935,7 @@ sysmmu_fimc1: sysmmu@11a30000 { ...@@ -935,7 +935,7 @@ sysmmu_fimc1: sysmmu@11a30000 {
sysmmu_fimc2: sysmmu@11a40000 { sysmmu_fimc2: sysmmu@11a40000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11A40000 0x1000>; reg = <0x11a40000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 4>; interrupts = <4 4>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -946,7 +946,7 @@ sysmmu_fimc2: sysmmu@11a40000 { ...@@ -946,7 +946,7 @@ sysmmu_fimc2: sysmmu@11a40000 {
sysmmu_fimc3: sysmmu@11a50000 { sysmmu_fimc3: sysmmu@11a50000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11A50000 0x1000>; reg = <0x11a50000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 5>; interrupts = <4 5>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -957,7 +957,7 @@ sysmmu_fimc3: sysmmu@11a50000 { ...@@ -957,7 +957,7 @@ sysmmu_fimc3: sysmmu@11a50000 {
sysmmu_jpeg: sysmmu@11a60000 { sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11A60000 0x1000>; reg = <0x11a60000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 6>; interrupts = <4 6>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -968,7 +968,7 @@ sysmmu_jpeg: sysmmu@11a60000 { ...@@ -968,7 +968,7 @@ sysmmu_jpeg: sysmmu@11a60000 {
sysmmu_rotator: sysmmu@12a30000 { sysmmu_rotator: sysmmu@12a30000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x12A30000 0x1000>; reg = <0x12a30000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <5 0>; interrupts = <5 0>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -979,7 +979,7 @@ sysmmu_rotator: sysmmu@12a30000 { ...@@ -979,7 +979,7 @@ sysmmu_rotator: sysmmu@12a30000 {
sysmmu_fimd0: sysmmu@11e20000 { sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11E20000 0x1000>; reg = <0x11e20000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <5 2>; interrupts = <5 2>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
......
arch/arm/boot/dts/exynos4210.dtsi
View file @ 9ca5a7ce
...@@ -103,7 +103,7 @@ smp-sram@1f000 { ...@@ -103,7 +103,7 @@ smp-sram@1f000 {
pd_lcd1: power-domain@10023ca0 { pd_lcd1: power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>; reg = <0x10023ca0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "LCD1"; label = "LCD1";
}; };
...@@ -195,7 +195,7 @@ ppmu_lcd1: ppmu@12240000 { ...@@ -195,7 +195,7 @@ ppmu_lcd1: ppmu@12240000 {
sysmmu_g2d: sysmmu@12a20000 { sysmmu_g2d: sysmmu@12a20000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x12A20000 0x1000>; reg = <0x12a20000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 7>; interrupts = <4 7>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
......
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
View file @ 9ca5a7ce
...@@ -25,7 +25,7 @@ memory@40000000 { ...@@ -25,7 +25,7 @@ memory@40000000 {
firmware@203f000 { firmware@203f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>; reg = <0x0203f000 0x1000>;
}; };
fixed-rate-clocks { fixed-rate-clocks {
......
arch/arm/boot/dts/exynos4412-midas.dtsi
View file @ 9ca5a7ce
...@@ -33,7 +33,7 @@ chosen { ...@@ -33,7 +33,7 @@ chosen {
firmware@204f000 { firmware@204f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>; reg = <0x0204f000 0x1000>;
}; };
fixed-rate-clocks { fixed-rate-clocks {
......
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View file @ 9ca5a7ce
...@@ -19,7 +19,7 @@ chosen { ...@@ -19,7 +19,7 @@ chosen {
firmware@204f000 { firmware@204f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>; reg = <0x0204f000 0x1000>;
}; };
gpio_keys: gpio-keys { gpio_keys: gpio-keys {
......
arch/arm/boot/dts/exynos4412-odroidu3.dts
View file @ 9ca5a7ce
...@@ -23,7 +23,7 @@ aliases { ...@@ -23,7 +23,7 @@ aliases {
memory@40000000 { memory@40000000 {
device_type = "memory"; device_type = "memory";
reg = <0x40000000 0x7FF00000>; reg = <0x40000000 0x7ff00000>;
}; };
vbus_otg_reg: regulator-1 { vbus_otg_reg: regulator-1 {
......
arch/arm/boot/dts/exynos4412-odroidx.dts
View file @ 9ca5a7ce
...@@ -22,7 +22,7 @@ aliases { ...@@ -22,7 +22,7 @@ aliases {
memory@40000000 { memory@40000000 {
device_type = "memory"; device_type = "memory";
reg = <0x40000000 0x3FF00000>; reg = <0x40000000 0x3ff00000>;
}; };
leds { leds {
......
arch/arm/boot/dts/exynos4412-odroidx2.dts
View file @ 9ca5a7ce
...@@ -17,6 +17,6 @@ / { ...@@ -17,6 +17,6 @@ / {
memory@40000000 { memory@40000000 {
device_type = "memory"; device_type = "memory";
reg = <0x40000000 0x7FF00000>; reg = <0x40000000 0x7ff00000>;
}; };
}; };
arch/arm/boot/dts/exynos4412-origen.dts
View file @ 9ca5a7ce
...@@ -31,7 +31,7 @@ chosen { ...@@ -31,7 +31,7 @@ chosen {
firmware@203f000 { firmware@203f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>; reg = <0x0203f000 0x1000>;
}; };
mmc_reg: regulator-0 { mmc_reg: regulator-0 {
......
arch/arm/boot/dts/exynos4412-p4note.dtsi
View file @ 9ca5a7ce
...@@ -32,7 +32,7 @@ chosen { ...@@ -32,7 +32,7 @@ chosen {
firmware@204f000 { firmware@204f000 {
compatible = "samsung,secure-firmware"; compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>; reg = <0x0204f000 0x1000>;
}; };
fixed-rate-clocks { fixed-rate-clocks {
...@@ -198,7 +198,7 @@ adc@41 { ...@@ -198,7 +198,7 @@ adc@41 {
stmpe_adc { stmpe_adc {
compatible = "st,stmpe-adc"; compatible = "st,stmpe-adc";
#io-channel-cells = <1>; #io-channel-cells = <1>;
st,norequest-mask = <0x2F>; st,norequest-mask = <0x2f>;
}; };
}; };
}; };
......
arch/arm/boot/dts/exynos4412.dtsi
View file @ 9ca5a7ce
...@@ -55,7 +55,7 @@ core3 { ...@@ -55,7 +55,7 @@ core3 {
cpu0: cpu@a00 { cpu0: cpu@a00 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <0xA00>; reg = <0xa00>;
clocks = <&clock CLK_ARM_CLK>; clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu"; clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
...@@ -65,7 +65,7 @@ cpu0: cpu@a00 { ...@@ -65,7 +65,7 @@ cpu0: cpu@a00 {
cpu1: cpu@a01 { cpu1: cpu@a01 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <0xA01>; reg = <0xa01>;
clocks = <&clock CLK_ARM_CLK>; clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu"; clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
...@@ -75,7 +75,7 @@ cpu1: cpu@a01 { ...@@ -75,7 +75,7 @@ cpu1: cpu@a01 {
cpu2: cpu@a02 { cpu2: cpu@a02 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <0xA02>; reg = <0xa02>;
clocks = <&clock CLK_ARM_CLK>; clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu"; clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
...@@ -85,7 +85,7 @@ cpu2: cpu@a02 { ...@@ -85,7 +85,7 @@ cpu2: cpu@a02 {
cpu3: cpu@a03 { cpu3: cpu@a03 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <0xA03>; reg = <0xa03>;
clocks = <&clock CLK_ARM_CLK>; clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu"; clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
...@@ -201,7 +201,7 @@ pinctrl_2: pinctrl@3860000 { ...@@ -201,7 +201,7 @@ pinctrl_2: pinctrl@3860000 {
pinctrl_3: pinctrl@106e0000 { pinctrl_3: pinctrl@106e0000 {
compatible = "samsung,exynos4x12-pinctrl"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>; reg = <0x106e0000 0x1000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
}; };
...@@ -225,7 +225,7 @@ smp-sram@2f000 { ...@@ -225,7 +225,7 @@ smp-sram@2f000 {
pd_isp: power-domain@10023ca0 { pd_isp: power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>; reg = <0x10023ca0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "ISP"; label = "ISP";
}; };
...@@ -285,7 +285,7 @@ watchdog: watchdog@10060000 { ...@@ -285,7 +285,7 @@ watchdog: watchdog@10060000 {
adc: adc@126c0000 { adc: adc@126c0000 {
compatible = "samsung,exynos4212-adc"; compatible = "samsung,exynos4212-adc";
reg = <0x126C0000 0x100>; reg = <0x126c0000 0x100>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <10 3>; interrupts = <10 3>;
clocks = <&clock CLK_TSADC>; clocks = <&clock CLK_TSADC>;
...@@ -318,7 +318,7 @@ mshc_0: mmc@12550000 { ...@@ -318,7 +318,7 @@ mshc_0: mmc@12550000 {
sysmmu_g2d: sysmmu@10a40000 { sysmmu_g2d: sysmmu@10a40000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x10A40000 0x1000>; reg = <0x10a40000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 7>; interrupts = <4 7>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -350,7 +350,7 @@ sysmmu_fimc_drc: sysmmu@12270000 { ...@@ -350,7 +350,7 @@ sysmmu_fimc_drc: sysmmu@12270000 {
sysmmu_fimc_fd: sysmmu@122a0000 { sysmmu_fimc_fd: sysmmu@122a0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x122A0000 0x1000>; reg = <0x122a0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <16 4>; interrupts = <16 4>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
...@@ -361,7 +361,7 @@ sysmmu_fimc_fd: sysmmu@122a0000 { ...@@ -361,7 +361,7 @@ sysmmu_fimc_fd: sysmmu@122a0000 {
sysmmu_fimc_mcuctl: sysmmu@122b0000 { sysmmu_fimc_mcuctl: sysmmu@122b0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x122B0000 0x1000>; reg = <0x122b0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <16 5>; interrupts = <16 5>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
...@@ -372,7 +372,7 @@ sysmmu_fimc_mcuctl: sysmmu@122b0000 { ...@@ -372,7 +372,7 @@ sysmmu_fimc_mcuctl: sysmmu@122b0000 {
sysmmu_fimc_lite0: sysmmu@123b0000 { sysmmu_fimc_lite0: sysmmu@123b0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x123B0000 0x1000>; reg = <0x123b0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <16 0>; interrupts = <16 0>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
...@@ -384,7 +384,7 @@ sysmmu_fimc_lite0: sysmmu@123b0000 { ...@@ -384,7 +384,7 @@ sysmmu_fimc_lite0: sysmmu@123b0000 {
sysmmu_fimc_lite1: sysmmu@123c0000 { sysmmu_fimc_lite1: sysmmu@123c0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x123C0000 0x1000>; reg = <0x123c0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <16 1>; interrupts = <16 1>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
...@@ -615,7 +615,7 @@ fimc_lite_0: fimc-lite@12390000 { ...@@ -615,7 +615,7 @@ fimc_lite_0: fimc-lite@12390000 {
fimc_lite_1: fimc-lite@123a0000 { fimc_lite_1: fimc-lite@123a0000 {
compatible = "samsung,exynos4212-fimc-lite"; compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>; reg = <0x123a0000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE1>; clocks = <&isp_clock CLK_ISP_FIMC_LITE1>;
...@@ -812,7 +812,7 @@ &tmu { ...@@ -812,7 +812,7 @@ &tmu {
compatible = "samsung,exynos4412-tmu"; compatible = "samsung,exynos4412-tmu";
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 4>; interrupts = <2 4>;
reg = <0x100C0000 0x100>; reg = <0x100c0000 0x100>;
clocks = <&clock CLK_TMU_APBIF>; clocks = <&clock CLK_TMU_APBIF>;
clock-names = "tmu_apbif"; clock-names = "tmu_apbif";
status = "disabled"; status = "disabled";
......
arch/arm/boot/dts/exynos5.dtsi
View file @ 9ca5a7ce
...@@ -104,31 +104,31 @@ sysreg_system_controller: syscon@10050000 { ...@@ -104,31 +104,31 @@ sysreg_system_controller: syscon@10050000 {
serial_0: serial@12c00000 { serial_0: serial@12c00000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>; reg = <0x12c00000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
}; };
serial_1: serial@12c10000 { serial_1: serial@12c10000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>; reg = <0x12c10000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
}; };
serial_2: serial@12c20000 { serial_2: serial@12c20000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>; reg = <0x12c20000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
}; };
serial_3: serial@12c30000 { serial_3: serial@12c30000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>; reg = <0x12c30000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
}; };
i2c_0: i2c@12c60000 { i2c_0: i2c@12c60000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>; reg = <0x12c60000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -138,7 +138,7 @@ i2c_0: i2c@12c60000 { ...@@ -138,7 +138,7 @@ i2c_0: i2c@12c60000 {
i2c_1: i2c@12c70000 { i2c_1: i2c@12c70000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>; reg = <0x12c70000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -148,7 +148,7 @@ i2c_1: i2c@12c70000 { ...@@ -148,7 +148,7 @@ i2c_1: i2c@12c70000 {
i2c_2: i2c@12c80000 { i2c_2: i2c@12c80000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>; reg = <0x12c80000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -158,7 +158,7 @@ i2c_2: i2c@12c80000 { ...@@ -158,7 +158,7 @@ i2c_2: i2c@12c80000 {
i2c_3: i2c@12c90000 { i2c_3: i2c@12c90000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>; reg = <0x12c90000 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -168,7 +168,7 @@ i2c_3: i2c@12c90000 { ...@@ -168,7 +168,7 @@ i2c_3: i2c@12c90000 {
pwm: pwm@12dd0000 { pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm"; compatible = "samsung,exynos4210-pwm";
reg = <0x12DD0000 0x100>; reg = <0x12dd0000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
...@@ -180,7 +180,7 @@ pwm: pwm@12dd0000 { ...@@ -180,7 +180,7 @@ pwm: pwm@12dd0000 {
rtc: rtc@101e0000 { rtc: rtc@101e0000 {
compatible = "samsung,s3c6410-rtc"; compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>; reg = <0x101e0000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
...@@ -198,7 +198,7 @@ fimd: fimd@14400000 { ...@@ -198,7 +198,7 @@ fimd: fimd@14400000 {
dp: dp-controller@145b0000 { dp: dp-controller@145b0000 {
compatible = "samsung,exynos5-dp"; compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>; reg = <0x145b0000 0x1000>;
interrupts = <10 3>; interrupts = <10 3>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
status = "disabled"; status = "disabled";
......
arch/arm/boot/dts/exynos5250.dtsi
View file @ 9ca5a7ce
...@@ -216,14 +216,14 @@ pd_g3d: power-domain@10044060 { ...@@ -216,14 +216,14 @@ pd_g3d: power-domain@10044060 {
pd_disp1: power-domain@100440a0 { pd_disp1: power-domain@100440a0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x100440A0 0x20>; reg = <0x100440a0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "DISP1"; label = "DISP1";
}; };
pd_mau: power-domain@100440c0 { pd_mau: power-domain@100440c0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x100440C0 0x20>; reg = <0x100440c0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "MAU"; label = "MAU";
}; };
...@@ -236,7 +236,7 @@ clock: clock-controller@10010000 { ...@@ -236,7 +236,7 @@ clock: clock-controller@10010000 {
clock_audss: audss-clock-controller@3810000 { clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5250-audss-clock"; compatible = "samsung,exynos5250-audss-clock";
reg = <0x03810000 0x0C>; reg = <0x03810000 0x0c>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>; <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
...@@ -247,7 +247,7 @@ clock_audss: audss-clock-controller@3810000 { ...@@ -247,7 +247,7 @@ clock_audss: audss-clock-controller@3810000 {
timer@101c0000 { timer@101c0000 {
compatible = "samsung,exynos5250-mct", compatible = "samsung,exynos5250-mct",
"samsung,exynos4210-mct"; "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>; reg = <0x101c0000 0x800>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct"; clock-names = "fin_pll", "mct";
interrupts-extended = <&combiner 23 3>, interrupts-extended = <&combiner 23 3>,
...@@ -302,7 +302,7 @@ pmu_system_controller: system-controller@10040000 { ...@@ -302,7 +302,7 @@ pmu_system_controller: system-controller@10040000 {
watchdog@101d0000 { watchdog@101d0000 {
compatible = "samsung,exynos5250-wdt"; compatible = "samsung,exynos5250-wdt";
reg = <0x101D0000 0x100>; reg = <0x101d0000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_WDT>; clocks = <&clock CLK_WDT>;
clock-names = "watchdog"; clock-names = "watchdog";
...@@ -322,7 +322,7 @@ mfc: codec@11000000 { ...@@ -322,7 +322,7 @@ mfc: codec@11000000 {
rotator: rotator@11c00000 { rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator"; compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>; reg = <0x11c00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ROTATOR>; clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator"; clock-names = "rotator";
...@@ -387,7 +387,7 @@ tmu: tmu@10060000 { ...@@ -387,7 +387,7 @@ tmu: tmu@10060000 {
sata: sata@122f0000 { sata: sata@122f0000 {
compatible = "snps,dwc-ahci"; compatible = "snps,dwc-ahci";
reg = <0x122F0000 0x1ff>; reg = <0x122f0000 0x1ff>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
clock-names = "sata", "pclk"; clock-names = "sata", "pclk";
...@@ -410,7 +410,7 @@ sata_phy: sata-phy@12170000 { ...@@ -410,7 +410,7 @@ sata_phy: sata-phy@12170000 {
/* i2c_0-3 are defined in exynos5.dtsi */ /* i2c_0-3 are defined in exynos5.dtsi */
i2c_4: i2c@12ca0000 { i2c_4: i2c@12ca0000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12CA0000 0x100>; reg = <0x12ca0000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -423,7 +423,7 @@ i2c_4: i2c@12ca0000 { ...@@ -423,7 +423,7 @@ i2c_4: i2c@12ca0000 {
i2c_5: i2c@12cb0000 { i2c_5: i2c@12cb0000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12CB0000 0x100>; reg = <0x12cb0000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -436,7 +436,7 @@ i2c_5: i2c@12cb0000 { ...@@ -436,7 +436,7 @@ i2c_5: i2c@12cb0000 {
i2c_6: i2c@12cc0000 { i2c_6: i2c@12cc0000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12CC0000 0x100>; reg = <0x12cc0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -449,7 +449,7 @@ i2c_6: i2c@12cc0000 { ...@@ -449,7 +449,7 @@ i2c_6: i2c@12cc0000 {
i2c_7: i2c@12cd0000 { i2c_7: i2c@12cd0000 {
compatible = "samsung,s3c2440-i2c"; compatible = "samsung,s3c2440-i2c";
reg = <0x12CD0000 0x100>; reg = <0x12cd0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -462,7 +462,7 @@ i2c_7: i2c@12cd0000 { ...@@ -462,7 +462,7 @@ i2c_7: i2c@12cd0000 {
i2c_8: i2c@12ce0000 { i2c_8: i2c@12ce0000 {
compatible = "samsung,s3c2440-hdmiphy-i2c"; compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x12CE0000 0x1000>; reg = <0x12ce0000 0x1000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -478,7 +478,7 @@ hdmiphy: hdmi-phy@38 { ...@@ -478,7 +478,7 @@ hdmiphy: hdmi-phy@38 {
i2c_9: i2c@121d0000 { i2c_9: i2c@121d0000 {
compatible = "samsung,exynos5-sata-phy-i2c"; compatible = "samsung,exynos5-sata-phy-i2c";
reg = <0x121D0000 0x100>; reg = <0x121d0000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock CLK_SATA_PHYI2C>; clocks = <&clock CLK_SATA_PHYI2C>;
...@@ -608,7 +608,7 @@ i2s0: i2s@3830000 { ...@@ -608,7 +608,7 @@ i2s0: i2s@3830000 {
i2s1: i2s@12d60000 { i2s1: i2s@12d60000 {
compatible = "samsung,s3c6410-i2s"; compatible = "samsung,s3c6410-i2s";
status = "disabled"; status = "disabled";
reg = <0x12D60000 0x100>; reg = <0x12d60000 0x100>;
dmas = <&pdma1 12>, dmas = <&pdma1 12>,
<&pdma1 11>; <&pdma1 11>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -623,7 +623,7 @@ i2s1: i2s@12d60000 { ...@@ -623,7 +623,7 @@ i2s1: i2s@12d60000 {
i2s2: i2s@12d70000 { i2s2: i2s@12d70000 {
compatible = "samsung,s3c6410-i2s"; compatible = "samsung,s3c6410-i2s";
status = "disabled"; status = "disabled";
reg = <0x12D70000 0x100>; reg = <0x12d70000 0x100>;
dmas = <&pdma0 12>, dmas = <&pdma0 12>,
<&pdma0 11>; <&pdma0 11>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -695,7 +695,7 @@ usb2_phy_gen: phy@12130000 { ...@@ -695,7 +695,7 @@ usb2_phy_gen: phy@12130000 {
pdma0: dma-controller@121a0000 { pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>; reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>; clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
...@@ -704,7 +704,7 @@ pdma0: dma-controller@121a0000 { ...@@ -704,7 +704,7 @@ pdma0: dma-controller@121a0000 {
pdma1: dma-controller@121b0000 { pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>; reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>; clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
...@@ -722,7 +722,7 @@ mdma0: dma-controller@10800000 { ...@@ -722,7 +722,7 @@ mdma0: dma-controller@10800000 {
mdma1: dma-controller@11c10000 { mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>; reg = <0x11c10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>; clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
...@@ -787,7 +787,7 @@ hdmi: hdmi@14530000 { ...@@ -787,7 +787,7 @@ hdmi: hdmi@14530000 {
hdmicec: cec@101b0000 { hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec"; compatible = "samsung,s5p-cec";
reg = <0x101B0000 0x200>; reg = <0x101b0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>; clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec"; clock-names = "hdmicec";
...@@ -838,7 +838,7 @@ dsi_0: dsi@14500000 { ...@@ -838,7 +838,7 @@ dsi_0: dsi@14500000 {
adc: adc@12d10000 { adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v1"; compatible = "samsung,exynos-adc-v1";
reg = <0x12D10000 0x100>; reg = <0x12d10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ADC>; clocks = <&clock CLK_ADC>;
clock-names = "adc"; clock-names = "adc";
...@@ -849,7 +849,7 @@ adc: adc@12d10000 { ...@@ -849,7 +849,7 @@ adc: adc@12d10000 {
sysmmu_g2d: sysmmu@10a60000 { sysmmu_g2d: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x10A60000 0x1000>; reg = <0x10a60000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <24 5>; interrupts = <24 5>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -881,7 +881,7 @@ sysmmu_mfc_l: sysmmu@11210000 { ...@@ -881,7 +881,7 @@ sysmmu_mfc_l: sysmmu@11210000 {
sysmmu_rotator: sysmmu@11d40000 { sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11D40000 0x1000>; reg = <0x11d40000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 0>; interrupts = <4 0>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -891,7 +891,7 @@ sysmmu_rotator: sysmmu@11d40000 { ...@@ -891,7 +891,7 @@ sysmmu_rotator: sysmmu@11d40000 {
sysmmu_jpeg: sysmmu@11f20000 { sysmmu_jpeg: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11F20000 0x1000>; reg = <0x11f20000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 2>; interrupts = <4 2>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
...@@ -922,7 +922,7 @@ sysmmu_fimc_drc: sysmmu@13270000 { ...@@ -922,7 +922,7 @@ sysmmu_fimc_drc: sysmmu@13270000 {
sysmmu_fimc_fd: sysmmu@132a0000 { sysmmu_fimc_fd: sysmmu@132a0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x132A0000 0x1000>; reg = <0x132a0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <5 0>; interrupts = <5 0>;
clock-names = "sysmmu"; clock-names = "sysmmu";
...@@ -952,7 +952,7 @@ sysmmu_fimc_scp: sysmmu@13290000 { ...@@ -952,7 +952,7 @@ sysmmu_fimc_scp: sysmmu@13290000 {
sysmmu_fimc_mcuctl: sysmmu@132b0000 { sysmmu_fimc_mcuctl: sysmmu@132b0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x132B0000 0x1000>; reg = <0x132b0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <5 4>; interrupts = <5 4>;
clock-names = "sysmmu"; clock-names = "sysmmu";
...@@ -962,7 +962,7 @@ sysmmu_fimc_mcuctl: sysmmu@132b0000 { ...@@ -962,7 +962,7 @@ sysmmu_fimc_mcuctl: sysmmu@132b0000 {
sysmmu_fimc_odc: sysmmu@132c0000 { sysmmu_fimc_odc: sysmmu@132c0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x132C0000 0x1000>; reg = <0x132c0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <11 0>; interrupts = <11 0>;
clock-names = "sysmmu"; clock-names = "sysmmu";
...@@ -972,7 +972,7 @@ sysmmu_fimc_odc: sysmmu@132c0000 { ...@@ -972,7 +972,7 @@ sysmmu_fimc_odc: sysmmu@132c0000 {
sysmmu_fimc_dis0: sysmmu@132d0000 { sysmmu_fimc_dis0: sysmmu@132d0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x132D0000 0x1000>; reg = <0x132d0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <10 4>; interrupts = <10 4>;
clock-names = "sysmmu"; clock-names = "sysmmu";
...@@ -982,7 +982,7 @@ sysmmu_fimc_dis0: sysmmu@132d0000 { ...@@ -982,7 +982,7 @@ sysmmu_fimc_dis0: sysmmu@132d0000 {
sysmmu_fimc_dis1: sysmmu@132e0000 { sysmmu_fimc_dis1: sysmmu@132e0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x132E0000 0x1000>; reg = <0x132e0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <9 4>; interrupts = <9 4>;
clock-names = "sysmmu"; clock-names = "sysmmu";
...@@ -992,7 +992,7 @@ sysmmu_fimc_dis1: sysmmu@132e0000 { ...@@ -992,7 +992,7 @@ sysmmu_fimc_dis1: sysmmu@132e0000 {
sysmmu_fimc_3dnr: sysmmu@132f0000 { sysmmu_fimc_3dnr: sysmmu@132f0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x132F0000 0x1000>; reg = <0x132f0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <5 6>; interrupts = <5 6>;
clock-names = "sysmmu"; clock-names = "sysmmu";
...@@ -1002,7 +1002,7 @@ sysmmu_fimc_3dnr: sysmmu@132f0000 { ...@@ -1002,7 +1002,7 @@ sysmmu_fimc_3dnr: sysmmu@132f0000 {
sysmmu_fimc_lite0: sysmmu@13c40000 { sysmmu_fimc_lite0: sysmmu@13c40000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13C40000 0x1000>; reg = <0x13c40000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <3 4>; interrupts = <3 4>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
...@@ -1013,7 +1013,7 @@ sysmmu_fimc_lite0: sysmmu@13c40000 { ...@@ -1013,7 +1013,7 @@ sysmmu_fimc_lite0: sysmmu@13c40000 {
sysmmu_fimc_lite1: sysmmu@13c50000 { sysmmu_fimc_lite1: sysmmu@13c50000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13C50000 0x1000>; reg = <0x13c50000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <24 1>; interrupts = <24 1>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
...@@ -1024,7 +1024,7 @@ sysmmu_fimc_lite1: sysmmu@13c50000 { ...@@ -1024,7 +1024,7 @@ sysmmu_fimc_lite1: sysmmu@13c50000 {
sysmmu_gsc0: sysmmu@13e80000 { sysmmu_gsc0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13E80000 0x1000>; reg = <0x13e80000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 0>; interrupts = <2 0>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
...@@ -1035,7 +1035,7 @@ sysmmu_gsc0: sysmmu@13e80000 { ...@@ -1035,7 +1035,7 @@ sysmmu_gsc0: sysmmu@13e80000 {
sysmmu_gsc1: sysmmu@13e90000 { sysmmu_gsc1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13E90000 0x1000>; reg = <0x13e90000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 2>; interrupts = <2 2>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
...@@ -1046,7 +1046,7 @@ sysmmu_gsc1: sysmmu@13e90000 { ...@@ -1046,7 +1046,7 @@ sysmmu_gsc1: sysmmu@13e90000 {
sysmmu_gsc2: sysmmu@13ea0000 { sysmmu_gsc2: sysmmu@13ea0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13EA0000 0x1000>; reg = <0x13ea0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 4>; interrupts = <2 4>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
...@@ -1057,7 +1057,7 @@ sysmmu_gsc2: sysmmu@13ea0000 { ...@@ -1057,7 +1057,7 @@ sysmmu_gsc2: sysmmu@13ea0000 {
sysmmu_gsc3: sysmmu@13eb0000 { sysmmu_gsc3: sysmmu@13eb0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13EB0000 0x1000>; reg = <0x13eb0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 6>; interrupts = <2 6>;
power-domains = <&pd_gsc>; power-domains = <&pd_gsc>;
......
arch/arm/boot/dts/exynos5260.dtsi
View file @ 9ca5a7ce
...@@ -177,7 +177,7 @@ clock_kfc: clock-controller@10700000 { ...@@ -177,7 +177,7 @@ clock_kfc: clock-controller@10700000 {
clock_g2d: clock-controller@10a00000 { clock_g2d: clock-controller@10a00000 {
compatible = "samsung,exynos5260-clock-g2d"; compatible = "samsung,exynos5260-clock-g2d";
reg = <0x10A00000 0x10000>; reg = <0x10a00000 0x10000>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>, clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_G2D_333>; <&clock_top TOP_DOUT_ACLK_G2D_333>;
...@@ -187,7 +187,7 @@ clock_g2d: clock-controller@10a00000 { ...@@ -187,7 +187,7 @@ clock_g2d: clock-controller@10a00000 {
clock_mif: clock-controller@10ce0000 { clock_mif: clock-controller@10ce0000 {
compatible = "samsung,exynos5260-clock-mif"; compatible = "samsung,exynos5260-clock-mif";
reg = <0x10CE0000 0x10000>; reg = <0x10ce0000 0x10000>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>; clocks = <&fin_pll>;
clock-names = "fin_pll"; clock-names = "fin_pll";
...@@ -213,7 +213,7 @@ clock_g3d: clock-controller@11830000 { ...@@ -213,7 +213,7 @@ clock_g3d: clock-controller@11830000 {
clock_fsys: clock-controller@122e0000 { clock_fsys: clock-controller@122e0000 {
compatible = "samsung,exynos5260-clock-fsys"; compatible = "samsung,exynos5260-clock-fsys";
reg = <0x122E0000 0x10000>; reg = <0x122e0000 0x10000>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>, clocks = <&fin_pll>,
<&fin_pll>, <&fin_pll>,
...@@ -233,7 +233,7 @@ clock_fsys: clock-controller@122e0000 { ...@@ -233,7 +233,7 @@ clock_fsys: clock-controller@122e0000 {
clock_aud: clock-controller@128c0000 { clock_aud: clock-controller@128c0000 {
compatible = "samsung,exynos5260-clock-aud"; compatible = "samsung,exynos5260-clock-aud";
reg = <0x128C0000 0x10000>; reg = <0x128c0000 0x10000>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>, clocks = <&fin_pll>,
<&clock_top TOP_FOUT_AUD_PLL>, <&clock_top TOP_FOUT_AUD_PLL>,
...@@ -247,7 +247,7 @@ clock_aud: clock-controller@128c0000 { ...@@ -247,7 +247,7 @@ clock_aud: clock-controller@128c0000 {
clock_isp: clock-controller@133c0000 { clock_isp: clock-controller@133c0000 {
compatible = "samsung,exynos5260-clock-isp"; compatible = "samsung,exynos5260-clock-isp";
reg = <0x133C0000 0x10000>; reg = <0x133c0000 0x10000>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>, clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_ISP1_266>, <&clock_top TOP_DOUT_ACLK_ISP1_266>,
...@@ -261,7 +261,7 @@ clock_isp: clock-controller@133c0000 { ...@@ -261,7 +261,7 @@ clock_isp: clock-controller@133c0000 {
clock_gscl: clock-controller@13f00000 { clock_gscl: clock-controller@13f00000 {
compatible = "samsung,exynos5260-clock-gscl"; compatible = "samsung,exynos5260-clock-gscl";
reg = <0x13F00000 0x10000>; reg = <0x13f00000 0x10000>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>, clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_GSCL_400>, <&clock_top TOP_DOUT_ACLK_GSCL_400>,
...@@ -335,7 +335,7 @@ chipid: chipid@10000000 { ...@@ -335,7 +335,7 @@ chipid: chipid@10000000 {
mct: timer@100b0000 { mct: timer@100b0000 {
compatible = "samsung,exynos5260-mct", compatible = "samsung,exynos5260-mct",
"samsung,exynos4210-mct"; "samsung,exynos4210-mct";
reg = <0x100B0000 0x1000>; reg = <0x100b0000 0x1000>;
clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>; clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
clock-names = "fin_pll", "mct"; clock-names = "fin_pll", "mct";
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
...@@ -356,8 +356,8 @@ cci: cci@10f00000 { ...@@ -356,8 +356,8 @@ cci: cci@10f00000 {
compatible = "arm,cci-400"; compatible = "arm,cci-400";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x10F00000 0x1000>; reg = <0x10f00000 0x1000>;
ranges = <0x0 0x10F00000 0x6000>; ranges = <0x0 0x10f00000 0x6000>;
cci_control0: slave-if@4000 { cci_control0: slave-if@4000 {
compatible = "arm,cci-400-ctrl-if"; compatible = "arm,cci-400-ctrl-if";
...@@ -392,18 +392,18 @@ pinctrl_1: pinctrl@12290000 { ...@@ -392,18 +392,18 @@ pinctrl_1: pinctrl@12290000 {
pinctrl_2: pinctrl@128b0000 { pinctrl_2: pinctrl@128b0000 {
compatible = "samsung,exynos5260-pinctrl"; compatible = "samsung,exynos5260-pinctrl";
reg = <0x128B0000 0x1000>; reg = <0x128b0000 0x1000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
}; };
pmu_system_controller: system-controller@10d50000 { pmu_system_controller: system-controller@10d50000 {
compatible = "samsung,exynos5260-pmu", "syscon"; compatible = "samsung,exynos5260-pmu", "syscon";
reg = <0x10D50000 0x10000>; reg = <0x10d50000 0x10000>;
}; };
uart0: serial@12c00000 { uart0: serial@12c00000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>; reg = <0x12c00000 0x100>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>; clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0"; clock-names = "uart", "clk_uart_baud0";
...@@ -412,7 +412,7 @@ uart0: serial@12c00000 { ...@@ -412,7 +412,7 @@ uart0: serial@12c00000 {
uart1: serial@12c10000 { uart1: serial@12c10000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>; reg = <0x12c10000 0x100>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>; clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0"; clock-names = "uart", "clk_uart_baud0";
...@@ -421,7 +421,7 @@ uart1: serial@12c10000 { ...@@ -421,7 +421,7 @@ uart1: serial@12c10000 {
uart2: serial@12c20000 { uart2: serial@12c20000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>; reg = <0x12c20000 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>; clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0"; clock-names = "uart", "clk_uart_baud0";
...@@ -499,7 +499,7 @@ mmc_2: mmc@12160000 { ...@@ -499,7 +499,7 @@ mmc_2: mmc@12160000 {
hsi2c_0: i2c@12da0000 { hsi2c_0: i2c@12da0000 {
compatible = "samsung,exynos5260-hsi2c"; compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DA0000 0x1000>; reg = <0x12da0000 0x1000>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -512,7 +512,7 @@ hsi2c_0: i2c@12da0000 { ...@@ -512,7 +512,7 @@ hsi2c_0: i2c@12da0000 {
hsi2c_1: i2c@12db0000 { hsi2c_1: i2c@12db0000 {
compatible = "samsung,exynos5260-hsi2c"; compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DB0000 0x1000>; reg = <0x12db0000 0x1000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -525,7 +525,7 @@ hsi2c_1: i2c@12db0000 { ...@@ -525,7 +525,7 @@ hsi2c_1: i2c@12db0000 {
hsi2c_2: i2c@12dc0000 { hsi2c_2: i2c@12dc0000 {
compatible = "samsung,exynos5260-hsi2c"; compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DC0000 0x1000>; reg = <0x12dc0000 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -538,7 +538,7 @@ hsi2c_2: i2c@12dc0000 { ...@@ -538,7 +538,7 @@ hsi2c_2: i2c@12dc0000 {
hsi2c_3: i2c@12dd0000 { hsi2c_3: i2c@12dd0000 {
compatible = "samsung,exynos5260-hsi2c"; compatible = "samsung,exynos5260-hsi2c";
reg = <0x12DD0000 0x1000>; reg = <0x12dd0000 0x1000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
arch/arm/boot/dts/exynos5410.dtsi
View file @ 9ca5a7ce
...@@ -81,7 +81,7 @@ clock: clock-controller@10010000 { ...@@ -81,7 +81,7 @@ clock: clock-controller@10010000 {
clock_audss: audss-clock-controller@3810000 { clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5410-audss-clock"; compatible = "samsung,exynos5410-audss-clock";
reg = <0x03810000 0x0C>; reg = <0x03810000 0x0c>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&fin_pll>, <&clock CLK_FOUT_EPLL>; clocks = <&fin_pll>, <&clock CLK_FOUT_EPLL>;
clock-names = "pll_ref", "pll_in"; clock-names = "pll_ref", "pll_in";
......
arch/arm/boot/dts/exynos5420.dtsi
View file @ 9ca5a7ce
...@@ -182,7 +182,7 @@ clock: clock-controller@10010000 { ...@@ -182,7 +182,7 @@ clock: clock-controller@10010000 {
clock_audss: audss-clock-controller@3810000 { clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5420-audss-clock"; compatible = "samsung,exynos5420-audss-clock";
reg = <0x03810000 0x0C>; reg = <0x03810000 0x0c>;
#clock-cells = <1>; #clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>, clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
<&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
...@@ -262,37 +262,37 @@ dmc: memory-controller@10c20000 { ...@@ -262,37 +262,37 @@ dmc: memory-controller@10c20000 {
nocp_mem0_0: nocp@10ca1000 { nocp_mem0_0: nocp@10ca1000 {
compatible = "samsung,exynos5420-nocp"; compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1000 0x200>; reg = <0x10ca1000 0x200>;
status = "disabled"; status = "disabled";
}; };
nocp_mem0_1: nocp@10ca1400 { nocp_mem0_1: nocp@10ca1400 {
compatible = "samsung,exynos5420-nocp"; compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1400 0x200>; reg = <0x10ca1400 0x200>;
status = "disabled"; status = "disabled";
}; };
nocp_mem1_0: nocp@10ca1800 { nocp_mem1_0: nocp@10ca1800 {
compatible = "samsung,exynos5420-nocp"; compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1800 0x200>; reg = <0x10ca1800 0x200>;
status = "disabled"; status = "disabled";
}; };
nocp_mem1_1: nocp@10ca1c00 { nocp_mem1_1: nocp@10ca1c00 {
compatible = "samsung,exynos5420-nocp"; compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1C00 0x200>; reg = <0x10ca1c00 0x200>;
status = "disabled"; status = "disabled";
}; };
nocp_g3d_0: nocp@11a51000 { nocp_g3d_0: nocp@11a51000 {
compatible = "samsung,exynos5420-nocp"; compatible = "samsung,exynos5420-nocp";
reg = <0x11A51000 0x200>; reg = <0x11a51000 0x200>;
status = "disabled"; status = "disabled";
}; };
nocp_g3d_1: nocp@11a51400 { nocp_g3d_1: nocp@11a51400 {
compatible = "samsung,exynos5420-nocp"; compatible = "samsung,exynos5420-nocp";
reg = <0x11A51400 0x200>; reg = <0x11a51400 0x200>;
status = "disabled"; status = "disabled";
}; };
...@@ -374,14 +374,14 @@ g3d_pd: power-domain@10044080 { ...@@ -374,14 +374,14 @@ g3d_pd: power-domain@10044080 {
disp_pd: power-domain@100440c0 { disp_pd: power-domain@100440c0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x100440C0 0x20>; reg = <0x100440c0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "DISP"; label = "DISP";
}; };
mau_pd: power-domain@100440e0 { mau_pd: power-domain@100440e0 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x100440E0 0x20>; reg = <0x100440e0 0x20>;
#power-domain-cells = <0>; #power-domain-cells = <0>;
label = "MAU"; label = "MAU";
}; };
...@@ -442,7 +442,7 @@ adma: dma-controller@3880000 { ...@@ -442,7 +442,7 @@ adma: dma-controller@3880000 {
pdma0: dma-controller@121a0000 { pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>; reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>; clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
...@@ -451,7 +451,7 @@ pdma0: dma-controller@121a0000 { ...@@ -451,7 +451,7 @@ pdma0: dma-controller@121a0000 {
pdma1: dma-controller@121b0000 { pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>; reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>; clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
...@@ -469,7 +469,7 @@ mdma0: dma-controller@10800000 { ...@@ -469,7 +469,7 @@ mdma0: dma-controller@10800000 {
mdma1: dma-controller@11c10000 { mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>; reg = <0x11c10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>; clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
...@@ -507,7 +507,7 @@ i2s0: i2s@3830000 { ...@@ -507,7 +507,7 @@ i2s0: i2s@3830000 {
i2s1: i2s@12d60000 { i2s1: i2s@12d60000 {
compatible = "samsung,exynos5420-i2s"; compatible = "samsung,exynos5420-i2s";
reg = <0x12D60000 0x100>; reg = <0x12d60000 0x100>;
dmas = <&pdma1 12>, dmas = <&pdma1 12>,
<&pdma1 11>; <&pdma1 11>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -523,7 +523,7 @@ i2s1: i2s@12d60000 { ...@@ -523,7 +523,7 @@ i2s1: i2s@12d60000 {
i2s2: i2s@12d70000 { i2s2: i2s@12d70000 {
compatible = "samsung,exynos5420-i2s"; compatible = "samsung,exynos5420-i2s";
reg = <0x12D70000 0x100>; reg = <0x12d70000 0x100>;
dmas = <&pdma0 12>, dmas = <&pdma0 12>,
<&pdma0 11>; <&pdma0 11>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -612,7 +612,7 @@ dsi: dsi@14500000 { ...@@ -612,7 +612,7 @@ dsi: dsi@14500000 {
hsi2c_8: i2c@12e00000 { hsi2c_8: i2c@12e00000 {
compatible = "samsung,exynos5250-hsi2c"; compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E00000 0x1000>; reg = <0x12e00000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -625,7 +625,7 @@ hsi2c_8: i2c@12e00000 { ...@@ -625,7 +625,7 @@ hsi2c_8: i2c@12e00000 {
hsi2c_9: i2c@12e10000 { hsi2c_9: i2c@12e10000 {
compatible = "samsung,exynos5250-hsi2c"; compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E10000 0x1000>; reg = <0x12e10000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -638,7 +638,7 @@ hsi2c_9: i2c@12e10000 { ...@@ -638,7 +638,7 @@ hsi2c_9: i2c@12e10000 {
hsi2c_10: i2c@12e20000 { hsi2c_10: i2c@12e20000 {
compatible = "samsung,exynos5250-hsi2c"; compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E20000 0x1000>; reg = <0x12e20000 0x1000>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -666,12 +666,12 @@ hdmi: hdmi@14530000 { ...@@ -666,12 +666,12 @@ hdmi: hdmi@14530000 {
}; };
hdmiphy: hdmi-phy@145d0000 { hdmiphy: hdmi-phy@145d0000 {
reg = <0x145D0000 0x20>; reg = <0x145d0000 0x20>;
}; };
hdmicec: cec@101b0000 { hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec"; compatible = "samsung,s5p-cec";
reg = <0x101B0000 0x200>; reg = <0x101b0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>; clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec"; clock-names = "hdmicec";
...@@ -696,7 +696,7 @@ mixer: mixer@14450000 { ...@@ -696,7 +696,7 @@ mixer: mixer@14450000 {
rotator: rotator@11c00000 { rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator"; compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>; reg = <0x11c00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ROTATOR>; clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator"; clock-names = "rotator";
...@@ -805,7 +805,7 @@ scaler_2: scaler@12820000 { ...@@ -805,7 +805,7 @@ scaler_2: scaler@12820000 {
jpeg_0: jpeg@11f50000 { jpeg_0: jpeg@11f50000 {
compatible = "samsung,exynos5420-jpeg"; compatible = "samsung,exynos5420-jpeg";
reg = <0x11F50000 0x1000>; reg = <0x11f50000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "jpeg"; clock-names = "jpeg";
clocks = <&clock CLK_JPEG>; clocks = <&clock CLK_JPEG>;
...@@ -814,7 +814,7 @@ jpeg_0: jpeg@11f50000 { ...@@ -814,7 +814,7 @@ jpeg_0: jpeg@11f50000 {
jpeg_1: jpeg@11f60000 { jpeg_1: jpeg@11f60000 {
compatible = "samsung,exynos5420-jpeg"; compatible = "samsung,exynos5420-jpeg";
reg = <0x11F60000 0x1000>; reg = <0x11f60000 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "jpeg"; clock-names = "jpeg";
clocks = <&clock CLK_JPEG2>; clocks = <&clock CLK_JPEG2>;
...@@ -879,7 +879,7 @@ tmu_gpu: tmu@100a0000 { ...@@ -879,7 +879,7 @@ tmu_gpu: tmu@100a0000 {
sysmmu_g2dr: sysmmu@10a60000 { sysmmu_g2dr: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x10A60000 0x1000>; reg = <0x10a60000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <24 5>; interrupts = <24 5>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -889,7 +889,7 @@ sysmmu_g2dr: sysmmu@10a60000 { ...@@ -889,7 +889,7 @@ sysmmu_g2dr: sysmmu@10a60000 {
sysmmu_g2dw: sysmmu@10a70000 { sysmmu_g2dw: sysmmu@10a70000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x10A70000 0x1000>; reg = <0x10a70000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <22 2>; interrupts = <22 2>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -910,7 +910,7 @@ sysmmu_tv: sysmmu@14650000 { ...@@ -910,7 +910,7 @@ sysmmu_tv: sysmmu@14650000 {
sysmmu_gscl0: sysmmu@13e80000 { sysmmu_gscl0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13E80000 0x1000>; reg = <0x13e80000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 0>; interrupts = <2 0>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -921,7 +921,7 @@ sysmmu_gscl0: sysmmu@13e80000 { ...@@ -921,7 +921,7 @@ sysmmu_gscl0: sysmmu@13e80000 {
sysmmu_gscl1: sysmmu@13e90000 { sysmmu_gscl1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13E90000 0x1000>; reg = <0x13e90000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <2 2>; interrupts = <2 2>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -953,7 +953,7 @@ sysmmu_scaler1r: sysmmu@12890000 { ...@@ -953,7 +953,7 @@ sysmmu_scaler1r: sysmmu@12890000 {
sysmmu_scaler2r: sysmmu@128a0000 { sysmmu_scaler2r: sysmmu@128a0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x128A0000 0x1000>; reg = <0x128a0000 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
...@@ -963,7 +963,7 @@ sysmmu_scaler2r: sysmmu@128a0000 { ...@@ -963,7 +963,7 @@ sysmmu_scaler2r: sysmmu@128a0000 {
sysmmu_scaler0w: sysmmu@128c0000 { sysmmu_scaler0w: sysmmu@128c0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x128C0000 0x1000>; reg = <0x128c0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <27 2>; interrupts = <27 2>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -974,7 +974,7 @@ sysmmu_scaler0w: sysmmu@128c0000 { ...@@ -974,7 +974,7 @@ sysmmu_scaler0w: sysmmu@128c0000 {
sysmmu_scaler1w: sysmmu@128d0000 { sysmmu_scaler1w: sysmmu@128d0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x128D0000 0x1000>; reg = <0x128d0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <22 6>; interrupts = <22 6>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -985,7 +985,7 @@ sysmmu_scaler1w: sysmmu@128d0000 { ...@@ -985,7 +985,7 @@ sysmmu_scaler1w: sysmmu@128d0000 {
sysmmu_scaler2w: sysmmu@128e0000 { sysmmu_scaler2w: sysmmu@128e0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x128E0000 0x1000>; reg = <0x128e0000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <19 6>; interrupts = <19 6>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -996,7 +996,7 @@ sysmmu_scaler2w: sysmmu@128e0000 { ...@@ -996,7 +996,7 @@ sysmmu_scaler2w: sysmmu@128e0000 {
sysmmu_rotator: sysmmu@11d40000 { sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11D40000 0x1000>; reg = <0x11d40000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 0>; interrupts = <4 0>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -1006,7 +1006,7 @@ sysmmu_rotator: sysmmu@11d40000 { ...@@ -1006,7 +1006,7 @@ sysmmu_rotator: sysmmu@11d40000 {
sysmmu_jpeg0: sysmmu@11f10000 { sysmmu_jpeg0: sysmmu@11f10000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11F10000 0x1000>; reg = <0x11f10000 0x1000>;
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <4 2>; interrupts = <4 2>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
...@@ -1016,7 +1016,7 @@ sysmmu_jpeg0: sysmmu@11f10000 { ...@@ -1016,7 +1016,7 @@ sysmmu_jpeg0: sysmmu@11f10000 {
sysmmu_jpeg1: sysmmu@11f20000 { sysmmu_jpeg1: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x11F20000 0x1000>; reg = <0x11f20000 0x1000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>; clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
......
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
View file @ 9ca5a7ce
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
/ { / {
memory@40000000 { memory@40000000 {
device_type = "memory"; device_type = "memory";
reg = <0x40000000 0x7EA00000>; reg = <0x40000000 0x7ea00000>;
}; };
chosen { chosen {
......
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