Commit 9cf8ff96 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ralf Baechle

[MIPS] Fix CPU type bitmasks for MIPS III, IV and V.

Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 387a154d
...@@ -204,9 +204,9 @@ ...@@ -204,9 +204,9 @@
*/ */
#define MIPS_CPU_ISA_I 0x00000001 #define MIPS_CPU_ISA_I 0x00000001
#define MIPS_CPU_ISA_II 0x00000002 #define MIPS_CPU_ISA_II 0x00000002
#define MIPS_CPU_ISA_III 0x00000003 #define MIPS_CPU_ISA_III 0x00000004
#define MIPS_CPU_ISA_IV 0x00000004 #define MIPS_CPU_ISA_IV 0x00000008
#define MIPS_CPU_ISA_V 0x00000005 #define MIPS_CPU_ISA_V 0x00000010
#define MIPS_CPU_ISA_M32R1 0x00000020 #define MIPS_CPU_ISA_M32R1 0x00000020
#define MIPS_CPU_ISA_M32R2 0x00000040 #define MIPS_CPU_ISA_M32R2 0x00000040
#define MIPS_CPU_ISA_M64R1 0x00000080 #define MIPS_CPU_ISA_M64R1 0x00000080
......
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