Commit 9d4ebb36 authored by Marek Vasut's avatar Marek Vasut Committed by Shawn Guo

ARM: dts: imx6qdl-sabresd: Add PCIe support

Add support for the PCI express bus available on MX6 SabreSDP.
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent fed687c5
...@@ -389,6 +389,13 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ...@@ -389,6 +389,13 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>; >;
}; };
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
>;
};
pinctrl_pwm1: pwm1grp { pinctrl_pwm1: pwm1grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
...@@ -473,6 +480,14 @@ timing0: hsd100pxn1 { ...@@ -473,6 +480,14 @@ timing0: hsd100pxn1 {
}; };
}; };
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
power-on-gpio = <&gpio3 19 0>;
reset-gpio = <&gpio7 12 0>;
status = "okay";
};
&pwm1 { &pwm1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>; pinctrl-0 = <&pinctrl_pwm1>;
......
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