Commit 9dee279b authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branches 'spi/topic/bus-num', 'spi/topic/cleanup',...

Merge remote-tracking branches 'spi/topic/bus-num', 'spi/topic/cleanup', 'spi/topic/clps711x', 'spi/topic/coldfire', 'spi/topic/completion' and 'spi/topic/davinci' into spi-next
...@@ -150,7 +150,7 @@ config SPI_BUTTERFLY ...@@ -150,7 +150,7 @@ config SPI_BUTTERFLY
config SPI_CLPS711X config SPI_CLPS711X
tristate "CLPS711X host SPI controller" tristate "CLPS711X host SPI controller"
depends on ARCH_CLPS711X depends on ARCH_CLPS711X || COMPILE_TEST
help help
This enables dedicated general purpose SPI/Microwire1-compatible This enables dedicated general purpose SPI/Microwire1-compatible
master mode interface (SSI1) for CLPS711X-based CPUs. master mode interface (SSI1) for CLPS711X-based CPUs.
......
...@@ -994,13 +994,6 @@ static int atmel_spi_setup(struct spi_device *spi) ...@@ -994,13 +994,6 @@ static int atmel_spi_setup(struct spi_device *spi)
as = spi_master_get_devdata(spi->master); as = spi_master_get_devdata(spi->master);
if (spi->chip_select > spi->master->num_chipselect) {
dev_dbg(&spi->dev,
"setup: invalid chipselect %u (%u defined)\n",
spi->chip_select, spi->master->num_chipselect);
return -EINVAL;
}
/* see notes above re chipselect */ /* see notes above re chipselect */
if (!atmel_spi_is_v2(as) if (!atmel_spi_is_v2(as)
&& spi->chip_select == 0 && spi->chip_select == 0
......
...@@ -315,7 +315,6 @@ static int bcm2835_spi_probe(struct platform_device *pdev) ...@@ -315,7 +315,6 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
master->mode_bits = BCM2835_SPI_MODE_BITS; master->mode_bits = BCM2835_SPI_MODE_BITS;
master->bits_per_word_mask = SPI_BPW_MASK(8); master->bits_per_word_mask = SPI_BPW_MASK(8);
master->bus_num = -1;
master->num_chipselect = 3; master->num_chipselect = 3;
master->transfer_one_message = bcm2835_spi_transfer_one; master->transfer_one_message = bcm2835_spi_transfer_one;
master->dev.of_node = pdev->dev.of_node; master->dev.of_node = pdev->dev.of_node;
......
...@@ -180,7 +180,7 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t) ...@@ -180,7 +180,7 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)
while (pending > 0) { while (pending > 0) {
int curr_step = min_t(int, step_size, pending); int curr_step = min_t(int, step_size, pending);
init_completion(&bs->done); reinit_completion(&bs->done);
if (tx) { if (tx) {
memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step); memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);
tx += curr_step; tx += curr_step;
...@@ -369,6 +369,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) ...@@ -369,6 +369,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev)
bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));
mutex_init(&bs->bus_mutex); mutex_init(&bs->bus_mutex);
init_completion(&bs->done);
master->bus_num = HSSPI_BUS_NUM; master->bus_num = HSSPI_BUS_NUM;
master->num_chipselect = 8; master->num_chipselect = 8;
......
...@@ -167,7 +167,7 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, ...@@ -167,7 +167,7 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
transfer_list); transfer_list);
} }
init_completion(&bs->done); reinit_completion(&bs->done);
/* Fill in the Message control register */ /* Fill in the Message control register */
msg_ctl = (len << SPI_BYTE_CNT_SHIFT); msg_ctl = (len << SPI_BYTE_CNT_SHIFT);
...@@ -351,6 +351,7 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) ...@@ -351,6 +351,7 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
} }
bs = spi_master_get_devdata(master); bs = spi_master_get_devdata(master);
init_completion(&bs->done);
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
bs->pdev = pdev; bs->pdev = pdev;
......
...@@ -17,152 +17,120 @@ ...@@ -17,152 +17,120 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/clps711x.h>
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#include <linux/platform_data/spi-clps711x.h> #include <linux/platform_data/spi-clps711x.h>
#include <mach/hardware.h>
#define DRIVER_NAME "spi-clps711x" #define DRIVER_NAME "spi-clps711x"
struct spi_clps711x_data { #define SYNCIO_FRMLEN(x) ((x) << 8)
struct completion done; #define SYNCIO_TXFRMEN (1 << 14)
struct spi_clps711x_data {
void __iomem *syncio;
struct regmap *syscon;
struct regmap *syscon1;
struct clk *spi_clk; struct clk *spi_clk;
u32 max_speed_hz;
u8 *tx_buf; u8 *tx_buf;
u8 *rx_buf; u8 *rx_buf;
int count; unsigned int bpw;
int len; int len;
int chipselect[0];
}; };
static int spi_clps711x_setup(struct spi_device *spi) static int spi_clps711x_setup(struct spi_device *spi)
{ {
struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
/* We are expect that SPI-device is not selected */ /* We are expect that SPI-device is not selected */
gpio_direction_output(hw->chipselect[spi->chip_select], gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
!(spi->mode & SPI_CS_HIGH));
return 0; return 0;
} }
static void spi_clps711x_setup_mode(struct spi_device *spi) static void spi_clps711x_setup_xfer(struct spi_device *spi,
{
/* Setup edge for transfer */
if (spi->mode & SPI_CPHA)
clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3);
else
clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3);
}
static int spi_clps711x_setup_xfer(struct spi_device *spi,
struct spi_transfer *xfer) struct spi_transfer *xfer)
{ {
u32 speed = xfer->speed_hz ? : spi->max_speed_hz; struct spi_master *master = spi->master;
u8 bpw = xfer->bits_per_word; struct spi_clps711x_data *hw = spi_master_get_devdata(master);
struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
if (bpw != 8) {
dev_err(&spi->dev, "Unsupported master bus width %i\n", bpw);
return -EINVAL;
}
/* Setup SPI frequency divider */ /* Setup SPI frequency divider */
if (!speed || (speed >= hw->max_speed_hz)) if (xfer->speed_hz >= master->max_speed_hz)
clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
SYSCON1_ADCKSEL(3), SYSCON1); SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3));
else if (speed >= (hw->max_speed_hz / 2)) else if (xfer->speed_hz >= (master->max_speed_hz / 2))
clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
SYSCON1_ADCKSEL(2), SYSCON1); SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2));
else if (speed >= (hw->max_speed_hz / 8)) else if (xfer->speed_hz >= (master->max_speed_hz / 8))
clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
SYSCON1_ADCKSEL(1), SYSCON1); SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1));
else else
clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
SYSCON1_ADCKSEL(0), SYSCON1); SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0));
return 0;
} }
static int spi_clps711x_transfer_one_message(struct spi_master *master, static int spi_clps711x_prepare_message(struct spi_master *master,
struct spi_message *msg) struct spi_message *msg)
{ {
struct spi_clps711x_data *hw = spi_master_get_devdata(master); struct spi_clps711x_data *hw = spi_master_get_devdata(master);
struct spi_transfer *xfer; struct spi_device *spi = msg->spi;
int status = 0, cs = hw->chipselect[msg->spi->chip_select];
u32 data;
spi_clps711x_setup_mode(msg->spi);
list_for_each_entry(xfer, &msg->transfers, transfer_list) { /* Setup mode for transfer */
if (spi_clps711x_setup_xfer(msg->spi, xfer)) { return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
status = -EINVAL; (spi->mode & SPI_CPHA) ?
goto out_xfr; SYSCON3_ADCCKNSEN : 0);
} }
gpio_set_value(cs, !!(msg->spi->mode & SPI_CS_HIGH)); static int spi_clps711x_transfer_one(struct spi_master *master,
struct spi_device *spi,
struct spi_transfer *xfer)
{
struct spi_clps711x_data *hw = spi_master_get_devdata(master);
u8 data;
reinit_completion(&hw->done); spi_clps711x_setup_xfer(spi, xfer);
hw->count = 0;
hw->len = xfer->len; hw->len = xfer->len;
hw->bpw = xfer->bits_per_word;
hw->tx_buf = (u8 *)xfer->tx_buf; hw->tx_buf = (u8 *)xfer->tx_buf;
hw->rx_buf = (u8 *)xfer->rx_buf; hw->rx_buf = (u8 *)xfer->rx_buf;
/* Initiate transfer */ /* Initiate transfer */
data = hw->tx_buf ? hw->tx_buf[hw->count] : 0; data = hw->tx_buf ? *hw->tx_buf++ : 0;
clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO); writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
wait_for_completion(&hw->done);
if (xfer->delay_usecs) return 1;
udelay(xfer->delay_usecs);
if (xfer->cs_change ||
list_is_last(&xfer->transfer_list, &msg->transfers))
gpio_set_value(cs, !(msg->spi->mode & SPI_CS_HIGH));
msg->actual_length += xfer->len;
}
out_xfr:
msg->status = status;
spi_finalize_current_message(master);
return 0;
} }
static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
{ {
struct spi_clps711x_data *hw = (struct spi_clps711x_data *)dev_id; struct spi_master *master = dev_id;
u32 data; struct spi_clps711x_data *hw = spi_master_get_devdata(master);
u8 data;
/* Handle RX */ /* Handle RX */
data = clps_readb(SYNCIO); data = readb(hw->syncio);
if (hw->rx_buf) if (hw->rx_buf)
hw->rx_buf[hw->count] = (u8)data; *hw->rx_buf++ = data;
hw->count++;
/* Handle TX */ /* Handle TX */
if (hw->count < hw->len) { if (--hw->len > 0) {
data = hw->tx_buf ? hw->tx_buf[hw->count] : 0; data = hw->tx_buf ? *hw->tx_buf++ : 0;
clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO); writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
hw->syncio);
} else } else
complete(&hw->done); spi_finalize_current_transfer(master);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static int spi_clps711x_probe(struct platform_device *pdev) static int spi_clps711x_probe(struct platform_device *pdev)
{ {
int i, ret;
struct spi_master *master;
struct spi_clps711x_data *hw; struct spi_clps711x_data *hw;
struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
struct spi_master *master;
struct resource *res;
int i, irq, ret;
if (!pdata) { if (!pdata) {
dev_err(&pdev->dev, "No platform data supplied\n"); dev_err(&pdev->dev, "No platform data supplied\n");
...@@ -174,33 +142,37 @@ static int spi_clps711x_probe(struct platform_device *pdev) ...@@ -174,33 +142,37 @@ static int spi_clps711x_probe(struct platform_device *pdev)
return -EINVAL; return -EINVAL;
} }
master = spi_alloc_master(&pdev->dev, irq = platform_get_irq(pdev, 0);
sizeof(struct spi_clps711x_data) + if (irq < 0)
sizeof(int) * pdata->num_chipselect); return irq;
if (!master) {
dev_err(&pdev->dev, "SPI allocating memory error\n"); master = spi_alloc_master(&pdev->dev, sizeof(*hw));
if (!master)
return -ENOMEM; return -ENOMEM;
master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
pdata->num_chipselect, GFP_KERNEL);
if (!master->cs_gpios) {
ret = -ENOMEM;
goto err_out;
} }
master->bus_num = pdev->id; master->bus_num = pdev->id;
master->mode_bits = SPI_CPHA | SPI_CS_HIGH; master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
master->bits_per_word_mask = SPI_BPW_MASK(8); master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8);
master->num_chipselect = pdata->num_chipselect; master->num_chipselect = pdata->num_chipselect;
master->setup = spi_clps711x_setup; master->setup = spi_clps711x_setup;
master->transfer_one_message = spi_clps711x_transfer_one_message; master->prepare_message = spi_clps711x_prepare_message;
master->transfer_one = spi_clps711x_transfer_one;
hw = spi_master_get_devdata(master); hw = spi_master_get_devdata(master);
for (i = 0; i < master->num_chipselect; i++) { for (i = 0; i < master->num_chipselect; i++) {
hw->chipselect[i] = pdata->chipselect[i]; master->cs_gpios[i] = pdata->chipselect[i];
if (!gpio_is_valid(hw->chipselect[i])) { ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
dev_err(&pdev->dev, "Invalid CS GPIO %i\n", i); DRIVER_NAME);
ret = -EINVAL; if (ret) {
goto err_out;
}
if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) {
dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
ret = -EINVAL;
goto err_out; goto err_out;
} }
} }
...@@ -211,29 +183,45 @@ static int spi_clps711x_probe(struct platform_device *pdev) ...@@ -211,29 +183,45 @@ static int spi_clps711x_probe(struct platform_device *pdev)
ret = PTR_ERR(hw->spi_clk); ret = PTR_ERR(hw->spi_clk);
goto err_out; goto err_out;
} }
hw->max_speed_hz = clk_get_rate(hw->spi_clk); master->max_speed_hz = clk_get_rate(hw->spi_clk);
init_completion(&hw->done);
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3");
if (IS_ERR(hw->syscon)) {
ret = PTR_ERR(hw->syscon);
goto err_out;
}
hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1");
if (IS_ERR(hw->syscon1)) {
ret = PTR_ERR(hw->syscon1);
goto err_out;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
hw->syncio = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(hw->syncio)) {
ret = PTR_ERR(hw->syncio);
goto err_out;
}
/* Disable extended mode due hardware problems */ /* Disable extended mode due hardware problems */
clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3); regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
/* Clear possible pending interrupt */ /* Clear possible pending interrupt */
clps_readl(SYNCIO); readl(hw->syncio);
ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0, ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
dev_name(&pdev->dev), hw); dev_name(&pdev->dev), master);
if (ret) { if (ret)
dev_err(&pdev->dev, "Can't request IRQ\n");
goto err_out; goto err_out;
}
ret = devm_spi_register_master(&pdev->dev, master); ret = devm_spi_register_master(&pdev->dev, master);
if (!ret) { if (!ret) {
dev_info(&pdev->dev, dev_info(&pdev->dev,
"SPI bus driver initialized. Master clock %u Hz\n", "SPI bus driver initialized. Master clock %u Hz\n",
hw->max_speed_hz); master->max_speed_hz);
return 0; return 0;
} }
......
...@@ -77,8 +77,6 @@ struct mcfqspi { ...@@ -77,8 +77,6 @@ struct mcfqspi {
struct mcfqspi_cs_control *cs_control; struct mcfqspi_cs_control *cs_control;
wait_queue_head_t waitq; wait_queue_head_t waitq;
struct device *dev;
}; };
static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val) static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val)
...@@ -135,13 +133,13 @@ static void mcfqspi_cs_deselect(struct mcfqspi *mcfqspi, u8 chip_select, ...@@ -135,13 +133,13 @@ static void mcfqspi_cs_deselect(struct mcfqspi *mcfqspi, u8 chip_select,
static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi) static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi)
{ {
return (mcfqspi->cs_control && mcfqspi->cs_control->setup) ? return (mcfqspi->cs_control->setup) ?
mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0; mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0;
} }
static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi) static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi)
{ {
if (mcfqspi->cs_control && mcfqspi->cs_control->teardown) if (mcfqspi->cs_control->teardown)
mcfqspi->cs_control->teardown(mcfqspi->cs_control); mcfqspi->cs_control->teardown(mcfqspi->cs_control);
} }
...@@ -300,16 +298,22 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count, ...@@ -300,16 +298,22 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count,
} }
} }
static int mcfqspi_transfer_one_message(struct spi_master *master, static void mcfqspi_set_cs(struct spi_device *spi, bool enable)
struct spi_message *msg)
{ {
struct mcfqspi *mcfqspi = spi_master_get_devdata(master); struct mcfqspi *mcfqspi = spi_master_get_devdata(spi->master);
struct spi_device *spi = msg->spi;
struct spi_transfer *t;
int status = 0;
list_for_each_entry(t, &msg->transfers, transfer_list) {
bool cs_high = spi->mode & SPI_CS_HIGH; bool cs_high = spi->mode & SPI_CS_HIGH;
if (enable)
mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high);
else
mcfqspi_cs_deselect(mcfqspi, spi->chip_select, cs_high);
}
static int mcfqspi_transfer_one(struct spi_master *master,
struct spi_device *spi,
struct spi_transfer *t)
{
struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
u16 qmr = MCFQSPI_QMR_MSTR; u16 qmr = MCFQSPI_QMR_MSTR;
qmr |= t->bits_per_word << 10; qmr |= t->bits_per_word << 10;
...@@ -317,51 +321,22 @@ static int mcfqspi_transfer_one_message(struct spi_master *master, ...@@ -317,51 +321,22 @@ static int mcfqspi_transfer_one_message(struct spi_master *master,
qmr |= MCFQSPI_QMR_CPHA; qmr |= MCFQSPI_QMR_CPHA;
if (spi->mode & SPI_CPOL) if (spi->mode & SPI_CPOL)
qmr |= MCFQSPI_QMR_CPOL; qmr |= MCFQSPI_QMR_CPOL;
if (t->speed_hz)
qmr |= mcfqspi_qmr_baud(t->speed_hz); qmr |= mcfqspi_qmr_baud(t->speed_hz);
else
qmr |= mcfqspi_qmr_baud(spi->max_speed_hz);
mcfqspi_wr_qmr(mcfqspi, qmr); mcfqspi_wr_qmr(mcfqspi, qmr);
mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high);
mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE);
if (t->bits_per_word == 8) if (t->bits_per_word == 8)
mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, t->rx_buf);
t->rx_buf);
else else
mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf,
t->rx_buf); t->rx_buf);
mcfqspi_wr_qir(mcfqspi, 0); mcfqspi_wr_qir(mcfqspi, 0);
if (t->delay_usecs) return 0;
udelay(t->delay_usecs);
if (t->cs_change) {
if (!list_is_last(&t->transfer_list, &msg->transfers))
mcfqspi_cs_deselect(mcfqspi, spi->chip_select,
cs_high);
} else {
if (list_is_last(&t->transfer_list, &msg->transfers))
mcfqspi_cs_deselect(mcfqspi, spi->chip_select,
cs_high);
}
msg->actual_length += t->len;
}
msg->status = status;
spi_finalize_current_message(master);
return status;
} }
static int mcfqspi_setup(struct spi_device *spi) static int mcfqspi_setup(struct spi_device *spi)
{ {
if (spi->chip_select >= spi->master->num_chipselect) {
dev_dbg(&spi->dev, "%d chip select is out of range\n",
spi->chip_select);
return -EINVAL;
}
mcfqspi_cs_deselect(spi_master_get_devdata(spi->master), mcfqspi_cs_deselect(spi_master_get_devdata(spi->master),
spi->chip_select, spi->mode & SPI_CS_HIGH); spi->chip_select, spi->mode & SPI_CS_HIGH);
...@@ -388,6 +363,11 @@ static int mcfqspi_probe(struct platform_device *pdev) ...@@ -388,6 +363,11 @@ static int mcfqspi_probe(struct platform_device *pdev)
return -ENOENT; return -ENOENT;
} }
if (!pdata->cs_control) {
dev_dbg(&pdev->dev, "pdata->cs_control is NULL\n");
return -EINVAL;
}
master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi));
if (master == NULL) { if (master == NULL) {
dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); dev_dbg(&pdev->dev, "spi_alloc_master failed\n");
...@@ -436,12 +416,12 @@ static int mcfqspi_probe(struct platform_device *pdev) ...@@ -436,12 +416,12 @@ static int mcfqspi_probe(struct platform_device *pdev)
} }
init_waitqueue_head(&mcfqspi->waitq); init_waitqueue_head(&mcfqspi->waitq);
mcfqspi->dev = &pdev->dev;
master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
master->setup = mcfqspi_setup; master->setup = mcfqspi_setup;
master->transfer_one_message = mcfqspi_transfer_one_message; master->set_cs = mcfqspi_set_cs;
master->transfer_one = mcfqspi_transfer_one;
master->auto_runtime_pm = true; master->auto_runtime_pm = true;
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
...@@ -451,7 +431,7 @@ static int mcfqspi_probe(struct platform_device *pdev) ...@@ -451,7 +431,7 @@ static int mcfqspi_probe(struct platform_device *pdev)
dev_dbg(&pdev->dev, "spi_register_master failed\n"); dev_dbg(&pdev->dev, "spi_register_master failed\n");
goto fail2; goto fail2;
} }
pm_runtime_enable(mcfqspi->dev); pm_runtime_enable(&pdev->dev);
dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); dev_info(&pdev->dev, "Coldfire QSPI bus driver\n");
...@@ -473,9 +453,8 @@ static int mcfqspi_remove(struct platform_device *pdev) ...@@ -473,9 +453,8 @@ static int mcfqspi_remove(struct platform_device *pdev)
{ {
struct spi_master *master = platform_get_drvdata(pdev); struct spi_master *master = platform_get_drvdata(pdev);
struct mcfqspi *mcfqspi = spi_master_get_devdata(master); struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pm_runtime_disable(mcfqspi->dev); pm_runtime_disable(&pdev->dev);
/* disable the hardware (set the baud rate to 0) */ /* disable the hardware (set the baud rate to 0) */
mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR);
...@@ -490,8 +469,11 @@ static int mcfqspi_suspend(struct device *dev) ...@@ -490,8 +469,11 @@ static int mcfqspi_suspend(struct device *dev)
{ {
struct spi_master *master = dev_get_drvdata(dev); struct spi_master *master = dev_get_drvdata(dev);
struct mcfqspi *mcfqspi = spi_master_get_devdata(master); struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
int ret;
spi_master_suspend(master); ret = spi_master_suspend(master);
if (ret)
return ret;
clk_disable(mcfqspi->clk); clk_disable(mcfqspi->clk);
...@@ -503,11 +485,9 @@ static int mcfqspi_resume(struct device *dev) ...@@ -503,11 +485,9 @@ static int mcfqspi_resume(struct device *dev)
struct spi_master *master = dev_get_drvdata(dev); struct spi_master *master = dev_get_drvdata(dev);
struct mcfqspi *mcfqspi = spi_master_get_devdata(master); struct mcfqspi *mcfqspi = spi_master_get_devdata(master);
spi_master_resume(master);
clk_enable(mcfqspi->clk); clk_enable(mcfqspi->clk);
return 0; return spi_master_resume(master);
} }
#endif #endif
......
...@@ -802,8 +802,7 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, ...@@ -802,8 +802,7 @@ static int spi_davinci_get_pdata(struct platform_device *pdev,
pdata = &dspi->pdata; pdata = &dspi->pdata;
pdata->version = SPI_VERSION_1; pdata->version = SPI_VERSION_1;
match = of_match_device(of_match_ptr(davinci_spi_of_match), match = of_match_device(davinci_spi_of_match, &pdev->dev);
&pdev->dev);
if (!match) if (!match)
return -ENODEV; return -ENODEV;
...@@ -824,7 +823,6 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, ...@@ -824,7 +823,6 @@ static int spi_davinci_get_pdata(struct platform_device *pdev,
return 0; return 0;
} }
#else #else
#define davinci_spi_of_match NULL
static struct davinci_spi_platform_data static struct davinci_spi_platform_data
*spi_davinci_get_pdata(struct platform_device *pdev, *spi_davinci_get_pdata(struct platform_device *pdev,
struct davinci_spi *dspi) struct davinci_spi *dspi)
...@@ -864,10 +862,6 @@ static int davinci_spi_probe(struct platform_device *pdev) ...@@ -864,10 +862,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
dspi = spi_master_get_devdata(master); dspi = spi_master_get_devdata(master);
if (dspi == NULL) {
ret = -ENOENT;
goto free_master;
}
if (dev_get_platdata(&pdev->dev)) { if (dev_get_platdata(&pdev->dev)) {
pdata = dev_get_platdata(&pdev->dev); pdata = dev_get_platdata(&pdev->dev);
...@@ -908,10 +902,6 @@ static int davinci_spi_probe(struct platform_device *pdev) ...@@ -908,10 +902,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
goto free_master; goto free_master;
dspi->bitbang.master = master; dspi->bitbang.master = master;
if (dspi->bitbang.master == NULL) {
ret = -ENODEV;
goto free_master;
}
dspi->clk = devm_clk_get(&pdev->dev, NULL); dspi->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(dspi->clk)) { if (IS_ERR(dspi->clk)) {
...@@ -1040,7 +1030,7 @@ static struct platform_driver davinci_spi_driver = { ...@@ -1040,7 +1030,7 @@ static struct platform_driver davinci_spi_driver = {
.driver = { .driver = {
.name = "spi_davinci", .name = "spi_davinci",
.owner = THIS_MODULE, .owner = THIS_MODULE,
.of_match_table = davinci_spi_of_match, .of_match_table = of_match_ptr(davinci_spi_of_match),
}, },
.probe = davinci_spi_probe, .probe = davinci_spi_probe,
.remove = davinci_spi_remove, .remove = davinci_spi_remove,
......
...@@ -198,7 +198,7 @@ static int efm32_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) ...@@ -198,7 +198,7 @@ static int efm32_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
efm32_spi_filltx(ddata); efm32_spi_filltx(ddata);
init_completion(&ddata->done); reinit_completion(&ddata->done);
efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN);
...@@ -308,10 +308,6 @@ static int efm32_spi_probe_dt(struct platform_device *pdev, ...@@ -308,10 +308,6 @@ static int efm32_spi_probe_dt(struct platform_device *pdev,
} }
ddata->pdata.location = location; ddata->pdata.location = location;
/* spi core takes care about the bus number using an alias */
master->bus_num = -1;
return 0; return 0;
} }
...@@ -349,6 +345,7 @@ static int efm32_spi_probe(struct platform_device *pdev) ...@@ -349,6 +345,7 @@ static int efm32_spi_probe(struct platform_device *pdev)
ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs;
spin_lock_init(&ddata->lock); spin_lock_init(&ddata->lock);
init_completion(&ddata->done);
ddata->clk = devm_clk_get(&pdev->dev, NULL); ddata->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(ddata->clk)) { if (IS_ERR(ddata->clk)) {
......
...@@ -312,9 +312,6 @@ static int falcon_sflash_setup(struct spi_device *spi) ...@@ -312,9 +312,6 @@ static int falcon_sflash_setup(struct spi_device *spi)
unsigned int i; unsigned int i;
unsigned long flags; unsigned long flags;
if (spi->chip_select > 0)
return -ENODEV;
spin_lock_irqsave(&ebu_lock, flags); spin_lock_irqsave(&ebu_lock, flags);
if (spi->max_speed_hz >= CLOCK_100M) { if (spi->max_speed_hz >= CLOCK_100M) {
...@@ -422,9 +419,7 @@ static int falcon_sflash_probe(struct platform_device *pdev) ...@@ -422,9 +419,7 @@ static int falcon_sflash_probe(struct platform_device *pdev)
priv->master = master; priv->master = master;
master->mode_bits = SPI_MODE_3; master->mode_bits = SPI_MODE_3;
master->num_chipselect = 1;
master->flags = SPI_MASTER_HALF_DUPLEX; master->flags = SPI_MASTER_HALF_DUPLEX;
master->bus_num = -1;
master->setup = falcon_sflash_setup; master->setup = falcon_sflash_setup;
master->prepare_transfer_hardware = falcon_sflash_prepare_xfer; master->prepare_transfer_hardware = falcon_sflash_prepare_xfer;
master->transfer_one_message = falcon_sflash_xfer_one; master->transfer_one_message = falcon_sflash_xfer_one;
......
...@@ -741,7 +741,7 @@ static int spi_imx_transfer(struct spi_device *spi, ...@@ -741,7 +741,7 @@ static int spi_imx_transfer(struct spi_device *spi,
spi_imx->count = transfer->len; spi_imx->count = transfer->len;
spi_imx->txfifo = 0; spi_imx->txfifo = 0;
init_completion(&spi_imx->xfer_done); reinit_completion(&spi_imx->xfer_done);
spi_imx_push(spi_imx); spi_imx_push(spi_imx);
......
...@@ -365,9 +365,6 @@ static int mpc52xx_spi_setup(struct spi_device *spi) ...@@ -365,9 +365,6 @@ static int mpc52xx_spi_setup(struct spi_device *spi)
if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
return -EINVAL; return -EINVAL;
if (spi->chip_select >= spi->master->num_chipselect)
return -EINVAL;
return 0; return 0;
} }
......
...@@ -257,8 +257,6 @@ static int octeon_spi_probe(struct platform_device *pdev) ...@@ -257,8 +257,6 @@ static int octeon_spi_probe(struct platform_device *pdev)
p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start,
resource_size(res_mem)); resource_size(res_mem));
/* Dynamic bus numbering */
master->bus_num = -1;
master->num_chipselect = 4; master->num_chipselect = 4;
master->mode_bits = SPI_CPHA | master->mode_bits = SPI_CPHA |
SPI_CPOL | SPI_CPOL |
......
...@@ -332,12 +332,6 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t) ...@@ -332,12 +332,6 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
uwire = spi_master_get_devdata(spi->master); uwire = spi_master_get_devdata(spi->master);
if (spi->chip_select > 3) {
pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select);
status = -ENODEV;
goto done;
}
bits = spi->bits_per_word; bits = spi->bits_per_word;
if (t != NULL && t->bits_per_word) if (t != NULL && t->bits_per_word)
bits = t->bits_per_word; bits = t->bits_per_word;
......
...@@ -298,7 +298,6 @@ static int hspi_probe(struct platform_device *pdev) ...@@ -298,7 +298,6 @@ static int hspi_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
master->num_chipselect = 1;
master->bus_num = pdev->id; master->bus_num = pdev->id;
master->setup = hspi_setup; master->setup = hspi_setup;
master->cleanup = hspi_cleanup; master->cleanup = hspi_cleanup;
......
...@@ -172,7 +172,6 @@ struct tegra_spi_data { ...@@ -172,7 +172,6 @@ struct tegra_spi_data {
void __iomem *base; void __iomem *base;
phys_addr_t phys; phys_addr_t phys;
unsigned irq; unsigned irq;
u32 spi_max_frequency;
u32 cur_speed; u32 cur_speed;
struct spi_device *cur_spi; struct spi_device *cur_spi;
...@@ -761,11 +760,6 @@ static int tegra_spi_setup(struct spi_device *spi) ...@@ -761,11 +760,6 @@ static int tegra_spi_setup(struct spi_device *spi)
spi->mode & SPI_CPHA ? "" : "~", spi->mode & SPI_CPHA ? "" : "~",
spi->max_speed_hz); spi->max_speed_hz);
BUG_ON(spi->chip_select >= MAX_CHIP_SELECT);
/* Set speed to the spi max fequency if spi device has not set */
spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
ret = pm_runtime_get_sync(tspi->dev); ret = pm_runtime_get_sync(tspi->dev);
if (ret < 0) { if (ret < 0) {
dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret);
...@@ -1019,16 +1013,6 @@ static irqreturn_t tegra_spi_isr(int irq, void *context_data) ...@@ -1019,16 +1013,6 @@ static irqreturn_t tegra_spi_isr(int irq, void *context_data)
return IRQ_WAKE_THREAD; return IRQ_WAKE_THREAD;
} }
static void tegra_spi_parse_dt(struct platform_device *pdev,
struct tegra_spi_data *tspi)
{
struct device_node *np = pdev->dev.of_node;
if (of_property_read_u32(np, "spi-max-frequency",
&tspi->spi_max_frequency))
tspi->spi_max_frequency = 25000000; /* 25MHz */
}
static struct of_device_id tegra_spi_of_match[] = { static struct of_device_id tegra_spi_of_match[] = {
{ .compatible = "nvidia,tegra114-spi", }, { .compatible = "nvidia,tegra114-spi", },
{} {}
...@@ -1050,15 +1034,15 @@ static int tegra_spi_probe(struct platform_device *pdev) ...@@ -1050,15 +1034,15 @@ static int tegra_spi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
tspi = spi_master_get_devdata(master); tspi = spi_master_get_devdata(master);
/* Parse DT */ if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency",
tegra_spi_parse_dt(pdev, tspi); &master->max_speed_hz))
master->max_speed_hz = 25000000; /* 25MHz */
/* the spi->mode bits understood by this driver: */ /* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
master->setup = tegra_spi_setup; master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message; master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT; master->num_chipselect = MAX_CHIP_SELECT;
master->bus_num = -1;
master->auto_runtime_pm = true; master->auto_runtime_pm = true;
tspi->master = master; tspi->master = master;
......
...@@ -121,7 +121,6 @@ struct tegra_sflash_data { ...@@ -121,7 +121,6 @@ struct tegra_sflash_data {
struct reset_control *rst; struct reset_control *rst;
void __iomem *base; void __iomem *base;
unsigned irq; unsigned irq;
u32 spi_max_frequency;
u32 cur_speed; u32 cur_speed;
struct spi_device *cur_spi; struct spi_device *cur_spi;
...@@ -315,15 +314,6 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi, ...@@ -315,15 +314,6 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi,
return tegra_sflash_start_cpu_based_transfer(tsd, t); return tegra_sflash_start_cpu_based_transfer(tsd, t);
} }
static int tegra_sflash_setup(struct spi_device *spi)
{
struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master);
/* Set speed to the spi max fequency if spi device has not set */
spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency;
return 0;
}
static int tegra_sflash_transfer_one_message(struct spi_master *master, static int tegra_sflash_transfer_one_message(struct spi_master *master,
struct spi_message *msg) struct spi_message *msg)
{ {
...@@ -430,15 +420,6 @@ static irqreturn_t tegra_sflash_isr(int irq, void *context_data) ...@@ -430,15 +420,6 @@ static irqreturn_t tegra_sflash_isr(int irq, void *context_data)
return handle_cpu_based_xfer(tsd); return handle_cpu_based_xfer(tsd);
} }
static void tegra_sflash_parse_dt(struct tegra_sflash_data *tsd)
{
struct device_node *np = tsd->dev->of_node;
if (of_property_read_u32(np, "spi-max-frequency",
&tsd->spi_max_frequency))
tsd->spi_max_frequency = 25000000; /* 25MHz */
}
static struct of_device_id tegra_sflash_of_match[] = { static struct of_device_id tegra_sflash_of_match[] = {
{ .compatible = "nvidia,tegra20-sflash", }, { .compatible = "nvidia,tegra20-sflash", },
{} {}
...@@ -467,11 +448,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) ...@@ -467,11 +448,9 @@ static int tegra_sflash_probe(struct platform_device *pdev)
/* the spi->mode bits understood by this driver: */ /* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA; master->mode_bits = SPI_CPOL | SPI_CPHA;
master->setup = tegra_sflash_setup;
master->transfer_one_message = tegra_sflash_transfer_one_message; master->transfer_one_message = tegra_sflash_transfer_one_message;
master->auto_runtime_pm = true; master->auto_runtime_pm = true;
master->num_chipselect = MAX_CHIP_SELECT; master->num_chipselect = MAX_CHIP_SELECT;
master->bus_num = -1;
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
tsd = spi_master_get_devdata(master); tsd = spi_master_get_devdata(master);
...@@ -479,7 +458,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) ...@@ -479,7 +458,9 @@ static int tegra_sflash_probe(struct platform_device *pdev)
tsd->dev = &pdev->dev; tsd->dev = &pdev->dev;
spin_lock_init(&tsd->lock); spin_lock_init(&tsd->lock);
tegra_sflash_parse_dt(tsd); if (of_property_read_u32(tsd->dev->of_node, "spi-max-frequency",
&master->max_speed_hz))
master->max_speed_hz = 25000000; /* 25MHz */
r = platform_get_resource(pdev, IORESOURCE_MEM, 0); r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
tsd->base = devm_ioremap_resource(&pdev->dev, r); tsd->base = devm_ioremap_resource(&pdev->dev, r);
......
...@@ -171,7 +171,6 @@ struct tegra_slink_data { ...@@ -171,7 +171,6 @@ struct tegra_slink_data {
void __iomem *base; void __iomem *base;
phys_addr_t phys; phys_addr_t phys;
unsigned irq; unsigned irq;
u32 spi_max_frequency;
u32 cur_speed; u32 cur_speed;
struct spi_device *cur_spi; struct spi_device *cur_spi;
...@@ -761,10 +760,6 @@ static int tegra_slink_setup(struct spi_device *spi) ...@@ -761,10 +760,6 @@ static int tegra_slink_setup(struct spi_device *spi)
spi->mode & SPI_CPHA ? "" : "~", spi->mode & SPI_CPHA ? "" : "~",
spi->max_speed_hz); spi->max_speed_hz);
BUG_ON(spi->chip_select >= MAX_CHIP_SELECT);
/* Set speed to the spi max fequency if spi device has not set */
spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
ret = pm_runtime_get_sync(tspi->dev); ret = pm_runtime_get_sync(tspi->dev);
if (ret < 0) { if (ret < 0) {
dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret);
...@@ -999,15 +994,6 @@ static irqreturn_t tegra_slink_isr(int irq, void *context_data) ...@@ -999,15 +994,6 @@ static irqreturn_t tegra_slink_isr(int irq, void *context_data)
return IRQ_WAKE_THREAD; return IRQ_WAKE_THREAD;
} }
static void tegra_slink_parse_dt(struct tegra_slink_data *tspi)
{
struct device_node *np = tspi->dev->of_node;
if (of_property_read_u32(np, "spi-max-frequency",
&tspi->spi_max_frequency))
tspi->spi_max_frequency = 25000000; /* 25MHz */
}
static const struct tegra_slink_chip_data tegra30_spi_cdata = { static const struct tegra_slink_chip_data tegra30_spi_cdata = {
.cs_hold_time = true, .cs_hold_time = true,
}; };
...@@ -1053,7 +1039,6 @@ static int tegra_slink_probe(struct platform_device *pdev) ...@@ -1053,7 +1039,6 @@ static int tegra_slink_probe(struct platform_device *pdev)
master->unprepare_message = tegra_slink_unprepare_message; master->unprepare_message = tegra_slink_unprepare_message;
master->auto_runtime_pm = true; master->auto_runtime_pm = true;
master->num_chipselect = MAX_CHIP_SELECT; master->num_chipselect = MAX_CHIP_SELECT;
master->bus_num = -1;
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
tspi = spi_master_get_devdata(master); tspi = spi_master_get_devdata(master);
...@@ -1062,7 +1047,9 @@ static int tegra_slink_probe(struct platform_device *pdev) ...@@ -1062,7 +1047,9 @@ static int tegra_slink_probe(struct platform_device *pdev)
tspi->chip_data = cdata; tspi->chip_data = cdata;
spin_lock_init(&tspi->lock); spin_lock_init(&tspi->lock);
tegra_slink_parse_dt(tspi); if (of_property_read_u32(tspi->dev->of_node, "spi-max-frequency",
&master->max_speed_hz))
master->max_speed_hz = 25000000; /* 25MHz */
r = platform_get_resource(pdev, IORESOURCE_MEM, 0); r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r) { if (!r) {
......
...@@ -429,7 +429,6 @@ static int ti_qspi_probe(struct platform_device *pdev) ...@@ -429,7 +429,6 @@ static int ti_qspi_probe(struct platform_device *pdev)
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD;
master->bus_num = -1;
master->flags = SPI_MASTER_HALF_DUPLEX; master->flags = SPI_MASTER_HALF_DUPLEX;
master->setup = ti_qspi_setup; master->setup = ti_qspi_setup;
master->auto_runtime_pm = true; master->auto_runtime_pm = true;
......
...@@ -1775,6 +1775,9 @@ int spi_setup(struct spi_device *spi) ...@@ -1775,6 +1775,9 @@ int spi_setup(struct spi_device *spi)
if (!spi->bits_per_word) if (!spi->bits_per_word)
spi->bits_per_word = 8; spi->bits_per_word = 8;
if (!spi->max_speed_hz)
spi->max_speed_hz = spi->master->max_speed_hz;
if (spi->master->setup) if (spi->master->setup)
status = spi->master->setup(spi); status = spi->master->setup(spi);
......
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