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Commit 9dff6733 authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller
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arm: dt: vf610-zii-devel-b: Make use of new DSA binding 

Hang the three switches of the three MDIO busses using the new DSA
binding. Also, make use of the mdio-bus and explicitly list the phys
on one device. This is not required, but good for testing.
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 83c0afae
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Showing with 170 additions and 158 deletions
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
View file @ 9dff6733
...@@ -85,187 +85,199 @@ mdio_mux_1: mdio@1 { ...@@ -85,187 +85,199 @@ mdio_mux_1: mdio@1 {
reg = <1>; reg = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
switch0: switch0@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan0";
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
switch0port5: port@5 {
reg = <5>;
label = "dsa";
phy-mode = "rgmii-txid";
link = <&switch1port6
&switch2port9>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&fec1>;
fixed-link {
speed = <100>;
full-duplex;
};
};
};
};
}; };
mdio_mux_2: mdio@2 { mdio_mux_2: mdio@2 {
reg = <2>; reg = <2>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
};
mdio_mux_4: mdio@4 {
reg = <4>;
#address-cells = <1>;
#size-cells = <0>;
};
mdio_mux_8: mdio@8 {
reg = <8>;
#address-cells = <1>;
#size-cells = <0>;
};
};
dsa {
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&fec1>;
dsa,mii-bus = <&mdio_mux_1>;
/* 6352 - Primary - 7 ports */
switch0: switch@0-0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x00 0>;
eeprom-length = <512>;
port@0 { switch1: switch1@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; reg = <0>;
label = "lan0"; dsa,member = <0 1>;
};
ports {
port@1 { #address-cells = <1>;
reg = <1>; #size-cells = <0>;
label = "lan1"; port@0 {
}; reg = <0>;
label = "lan3";
port@2 { phy-handle = <&switch1phy0>;
reg = <2>; };
label = "lan2";
}; port@1 {
reg = <1>;
switch0port5: port@5 { label = "lan4";
reg = <5>; phy-handle = <&switch1phy1>;
label = "dsa"; };
phy-mode = "rgmii-txid";
link = <&switch1port6 port@2 {
&switch2port9>; reg = <2>;
label = "lan5";
fixed-link { phy-handle = <&switch1phy2>;
speed = <1000>; };
full-duplex;
switch1port5: port@5 {
reg = <5>;
label = "dsa";
link = <&switch2port9>;
phy-mode = "rgmii-txid";
fixed-link {
speed = <1000>;
full-duplex;
};
};
switch1port6: port@6 {
reg = <6>;
label = "dsa";
phy-mode = "rgmii-txid";
link = <&switch0port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
}; };
}; mdio {
#address-cells = <1>;
port@6 { #size-cells = <0>;
reg = <6>; switch1phy0: switch1phy0@0 {
label = "cpu"; reg = <0>;
};
fixed-link { switch1phy1: switch1phy0@1 {
speed = <100>; reg = <1>;
full-duplex; };
switch1phy2: switch1phy0@2 {
reg = <2>;
};
}; };
}; };
}; };
/* 6352 - Secondary - 7 ports */ mdio_mux_4: mdio@4 {
switch1: switch@0-1 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x00 1>; reg = <4>;
eeprom-length = <512>;
mii-bus = <&mdio_mux_2>;
port@0 { switch2: switch2@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; reg = <0>;
label = "lan3"; dsa,member = <0 2>;
};
ports {
port@1 { #address-cells = <1>;
reg = <1>; #size-cells = <0>;
label = "lan4"; port@0 {
}; reg = <0>;
label = "lan6";
port@2 { };
reg = <2>;
label = "lan5"; port@1 {
}; reg = <1>;
label = "lan7";
switch1port5: port@5 { };
reg = <5>;
label = "dsa"; port@2 {
link = <&switch2port9>; reg = <2>;
phy-mode = "rgmii-txid"; label = "lan8";
};
fixed-link {
speed = <1000>; port@3 {
full-duplex; reg = <3>;
}; label = "optical3";
}; fixed-link {
speed = <1000>;
switch1port6: port@6 { full-duplex;
reg = <6>; link-gpios = <&gpio6 2
label = "dsa"; GPIO_ACTIVE_HIGH>;
phy-mode = "rgmii-txid"; };
link = <&switch0port5>; };
fixed-link { port@4 {
speed = <1000>; reg = <4>;
full-duplex; label = "optical4";
fixed-link {
speed = <1000>;
full-duplex;
link-gpios = <&gpio6 3
GPIO_ACTIVE_HIGH>;
};
};
switch2port9: port@9 {
reg = <9>;
label = "dsa";
phy-mode = "rgmii-txid";
link = <&switch1port5
&switch0port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
}; };
}; };
}; };
/* 6185 - 10 ports */ mdio_mux_8: mdio@8 {
switch2: switch@0-2 { reg = <8>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x00 2>;
mii-bus = <&mdio_mux_4>;
port@0 {
reg = <0>;
label = "lan6";
};
port@1 {
reg = <1>;
label = "lan7";
};
port@2 {
reg = <2>;
label = "lan8";
};
port@3 {
reg = <3>;
label = "optical3";
fixed-link {
speed = <1000>;
full-duplex;
link-gpios = <&gpio6 2
GPIO_ACTIVE_HIGH>;
};
};
port@4 {
reg = <4>;
label = "optical4";
fixed-link {
speed = <1000>;
full-duplex;
link-gpios = <&gpio6 3
GPIO_ACTIVE_HIGH>;
};
};
switch2port9: port@9 {
reg = <9>;
label = "dsa";
phy-mode = "rgmii-txid";
link = <&switch1port5
&switch0port5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
}; };
}; };
......
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