Commit 9e100eba authored by Poddar, Sourav's avatar Poddar, Sourav Committed by Tero Kristo

ARM: dts: am33xx-clock: Fix ehrpwm tbclk data

tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.
Signed-off-by: default avatarSourav Poddar <sourav.poddar@ti.com>
Acked-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent 2febd999
...@@ -96,47 +96,29 @@ rng_fck: rng_fck { ...@@ -96,47 +96,29 @@ rng_fck: rng_fck {
clock-div = <1>; clock-div = <1>;
}; };
ehrpwm0_gate_tbclk: ehrpwm0_gate_tbclk { ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&dpll_per_m2_ck>;
ti,bit-shift = <0>; ti,bit-shift = <0>;
reg = <0x0664>; reg = <0x0664>;
}; };
ehrpwm0_tbclk: ehrpwm0_tbclk { ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ehrpwm0_gate_tbclk>;
};
ehrpwm1_gate_tbclk: ehrpwm1_gate_tbclk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&dpll_per_m2_ck>;
ti,bit-shift = <1>; ti,bit-shift = <1>;
reg = <0x0664>; reg = <0x0664>;
}; };
ehrpwm1_tbclk: ehrpwm1_tbclk { ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ehrpwm1_gate_tbclk>;
};
ehrpwm2_gate_tbclk: ehrpwm2_gate_tbclk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&dpll_per_m2_ck>;
ti,bit-shift = <2>; ti,bit-shift = <2>;
reg = <0x0664>; reg = <0x0664>;
}; };
ehrpwm2_tbclk: ehrpwm2_tbclk {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ehrpwm2_gate_tbclk>;
};
}; };
&prcm_clocks { &prcm_clocks {
clk_32768_ck: clk_32768_ck { clk_32768_ck: clk_32768_ck {
......
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