[PATCH] radeonfb: small cleanup of common register init

This removes the unused common_regs_m6 and add one more register to be
cleared, according to latest XFree code from ATI.
parent 893eb19a
...@@ -222,16 +222,7 @@ static reg_val common_regs[] = { ...@@ -222,16 +222,7 @@ static reg_val common_regs[] = {
{ I2C_CNTL_1, 0 }, { I2C_CNTL_1, 0 },
{ GEN_INT_CNTL, 0 }, { GEN_INT_CNTL, 0 },
{ CAP0_TRIG_CNTL, 0 }, { CAP0_TRIG_CNTL, 0 },
}; { CAP1_TRIG_CNTL, 0 },
static reg_val common_regs_m6[] = {
{ OVR_CLR, 0 },
{ OVR_WID_LEFT_RIGHT, 0 },
{ OVR_WID_TOP_BOTTOM, 0 },
{ OV0_SCALE_CNTL, 0 },
{ SUBPIC_CNTL, 0 },
{ GEN_INT_CNTL, 0 },
{ CAP0_TRIG_CNTL, 0 }
}; };
/* /*
...@@ -1230,7 +1221,7 @@ static void radeon_write_mode (struct radeonfb_info *rinfo, ...@@ -1230,7 +1221,7 @@ static void radeon_write_mode (struct radeonfb_info *rinfo,
radeon_screen_blank(rinfo, VESA_POWERDOWN); radeon_screen_blank(rinfo, VESA_POWERDOWN);
for (i=0; i<9; i++) for (i=0; i<10; i++)
OUTREG(common_regs[i].reg, common_regs[i].val); OUTREG(common_regs[i].reg, common_regs[i].val);
/* Apply surface registers */ /* Apply surface registers */
......
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#define AGP_CNTL 0x0174 #define AGP_CNTL 0x0174
#define BM_STATUS 0x0160 #define BM_STATUS 0x0160
#define CAP0_TRIG_CNTL 0x0950 #define CAP0_TRIG_CNTL 0x0950
#define CAP1_TRIG_CNTL 0x09c0
#define VIPH_CONTROL 0x0C40 #define VIPH_CONTROL 0x0C40
#define VENDOR_ID 0x0F00 #define VENDOR_ID 0x0F00
#define DEVICE_ID 0x0F02 #define DEVICE_ID 0x0F02
......
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