Merge bk://kernel.bkbits.net/davem/sparc-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux

arch/sparc64/kernel/auxio.c

@@ -17,7 +17,7 @@
 #include <asm/auxio.h>
 
 /* This cannot be static, as it is referenced in entry.S */
-unsigned long auxio_register = 0UL;
+void __iomem *auxio_register = 0UL;
 
 enum auxio_type {
 	AUXIO_TYPE_NODEV,
@@ -30,7 +30,7 @@ static spinlock_t auxio_lock = SPIN_LOCK_UNLOCKED;
 
 static void __auxio_sbus_set(u8 bits_on, u8 bits_off)
 {
-	if(auxio_register) {
+	if (auxio_register) {
 		unsigned char regval;
 		unsigned long flags;
 		unsigned char newval;
@@ -49,7 +49,7 @@ static void __auxio_sbus_set(u8 bits_on, u8 bits_off)
 
 static void __auxio_ebus_set(u8 bits_on, u8 bits_off)
 {
-	if(auxio_register) {
+	if (auxio_register) {
 		unsigned char regval;
 		unsigned long flags;
 		unsigned char newval;
@@ -126,7 +126,8 @@ void __init auxio_probe(void)
 	if (sdev) {
 		auxio_devtype  = AUXIO_TYPE_SBUS;
 		auxio_register = sbus_ioremap(&sdev->resource[0], 0,
-		  		sdev->reg_addrs[0].reg_size, "auxiliaryIO");
+					      sdev->reg_addrs[0].reg_size,
+					      "auxiliaryIO");
 	}
 #ifdef CONFIG_PCI
 	else {
@@ -142,7 +143,7 @@ void __init auxio_probe(void)
 	ebus_done:
 		if (edev) {
 			auxio_devtype  = AUXIO_TYPE_EBUS;
-			auxio_register = (unsigned long)
+			auxio_register =
 				ioremap(edev->resource[0].start, sizeof(u32));
 		}
 	}

arch/sparc64/kernel/pci_schizo.c

@@ -1171,7 +1171,7 @@ static void __init tomatillo_register_error_handlers(struct pci_controller_info
 		prom_halt();
 	}
 	bucket = __bucket(irq);
-	tmp = readl(bucket->imap);
+	tmp = upa_readl(bucket->imap);
 	upa_writel(tmp, (pbm->pbm_regs +
 			 schizo_imap_offset(SCHIZO_UE_INO) + 4));
 
@@ -1309,7 +1309,7 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
 		prom_halt();
 	}
 	bucket = __bucket(irq);
-	tmp = readl(bucket->imap);
+	tmp = upa_readl(bucket->imap);
 	upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
 
 	pbm = pbm_for_ino(p, SCHIZO_CE_INO);

arch/sparc64/kernel/power.c

@@ -27,7 +27,7 @@
 int scons_pwroff = 1; 
 
 #ifdef CONFIG_PCI
-static unsigned long power_reg = 0UL;
+static void __iomem *power_reg;
 
 static DECLARE_WAIT_QUEUE_HEAD(powerd_wait);
 static int button_pressed;
@@ -52,7 +52,7 @@ void machine_power_off(void)
 {
 	if (!serial_console || scons_pwroff) {
 #ifdef CONFIG_PCI
-		if (power_reg != 0UL) {
+		if (power_reg) {
 			/* Both register bits seem to have the
 			 * same effect, so until I figure out
 			 * what the difference is...
@@ -130,8 +130,8 @@ void __init power_init(void)
 	return;
 
 found:
-	power_reg = (unsigned long)ioremap(edev->resource[0].start, 0x4);
-	printk("power: Control reg at %016lx ... ", power_reg);
+	power_reg = ioremap(edev->resource[0].start, 0x4);
+	printk("power: Control reg at %p ... ", power_reg);
 	poweroff_method = machine_halt;  /* able to use the standard halt */
 	if (has_button_interrupt(edev)) {
 		if (kernel_thread(powerd, NULL, CLONE_FS) < 0) {

arch/sparc64/lib/Makefile

@@ -12,7 +12,7 @@ lib-y := PeeCeeI.o copy_page.o clear_page.o strlen.o strncmp.o \
 	 U1memcpy.o U1copy_from_user.o U1copy_to_user.o \
 	 U3memcpy.o U3copy_from_user.o U3copy_to_user.o U3patch.o \
 	 copy_in_user.o user_fixup.o memmove.o \
-	 mcount.o ipcsum.o rwsem.o xor.o find_bit.o delay.o
+	 mcount.o ipcsum.o rwsem.o xor.o find_bit.o delay.o iomap.o
 
 lib-$(CONFIG_DEBUG_SPINLOCK) += debuglocks.o
 lib-$(CONFIG_HAVE_DEC_LOCK) += dec_and_lock.o

arch/sparc64/lib/iomap.c

+/*
+ * Implement the sparc64 iomap interfaces
+ */
+#include <linux/pci.h>
+#include <linux/module.h>
+#include <asm/io.h>
+
+/* Create a virtual mapping cookie for an IO port range */
+void __iomem *ioport_map(unsigned long port, unsigned int nr)
+{
+	return (void __iomem *) (unsigned long) port;
+}
+
+void ioport_unmap(void __iomem *addr)
+{
+	/* Nothing to do */
+}
+EXPORT_SYMBOL(ioport_map);
+EXPORT_SYMBOL(ioport_unmap);
+
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
+{
+	unsigned long start = pci_resource_start(dev, bar);
+	unsigned long len = pci_resource_len(dev, bar);
+	unsigned long flags = pci_resource_flags(dev, bar);
+
+	if (!len || !start)
+		return NULL;
+	if (maxlen && len > maxlen)
+		len = maxlen;
+	if (flags & IORESOURCE_IO)
+		return ioport_map(start, len);
+	if (flags & IORESOURCE_MEM) {
+		if (flags & IORESOURCE_CACHEABLE)
+			return ioremap(start, len);
+		return ioremap_nocache(start, len);
+	}
+	/* What? */
+	return NULL;
+}
+
+void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
+{
+	/* nothing to do */
+}
+EXPORT_SYMBOL(pci_iomap);
+EXPORT_SYMBOL(pci_iounmap);

include/asm-generic/iomap.h

@@ -33,7 +33,7 @@ extern void fastcall iowrite16(u16, void __iomem *);
 extern void fastcall iowrite32(u32, void __iomem *);
 
 /* Create a virtual mapping cookie for an IO port range */
-extern void __iomem *ioport_map(unsigned int port, unsigned int nr);
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
 extern void ioport_unmap(void __iomem *);
 
 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */

include/asm-sparc64/ebus.h

@@ -53,7 +53,7 @@ struct linux_ebus {
 
 struct ebus_dma_info {
 	spinlock_t	lock;
-	unsigned long	regs;
+	void __iomem	*regs;
 
 	unsigned int	flags;
 #define EBUS_DMA_FLAG_USE_EBDMA_HANDLER		0x00000001

include/asm-sparc64/io.h

@@ -3,6 +3,7 @@
 #define __SPARC64_IO_H
 
 #include <linux/kernel.h>
+#include <linux/compiler.h>
 #include <linux/types.h>
 
 #include <asm/page.h>      /* IO address mapping routines need this */
@@ -107,20 +108,17 @@ extern void insw(unsigned long addr, void *dst, unsigned long count);
 extern void insl(unsigned long addr, void *dst, unsigned long count);
 
 /* Memory functions, same as I/O accesses on Ultra. */
-static __inline__ u8 _readb(unsigned long addr)
-{
-	u8 ret;
+static inline u8 _readb(void __iomem *addr)
+{	u8 ret;
 
 	__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
 			     : "=r" (ret)
 			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
-
 	return ret;
 }
 
-static __inline__ u16 _readw(unsigned long addr)
-{
-	u16 ret;
+static inline u16 _readw(void __iomem *addr)
+{	u16 ret;
 
 	__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
 			     : "=r" (ret)
@@ -129,9 +127,8 @@ static __inline__ u16 _readw(unsigned long addr)
 	return ret;
 }
 
-static __inline__ u32 _readl(unsigned long addr)
-{
-	u32 ret;
+static inline u32 _readl(void __iomem *addr)
+{	u32 ret;
 
 	__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
 			     : "=r" (ret)
@@ -140,9 +137,8 @@ static __inline__ u32 _readl(unsigned long addr)
 	return ret;
 }
 
-static __inline__ u64 _readq(unsigned long addr)
-{
-	u64 ret;
+static inline u64 _readq(void __iomem *addr)
+{	u64 ret;
 
 	__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
 			     : "=r" (ret)
@@ -151,46 +147,46 @@ static __inline__ u64 _readq(unsigned long addr)
 	return ret;
 }
 
-static __inline__ void _writeb(u8 b, unsigned long addr)
+static inline void _writeb(u8 b, void __iomem *addr)
 {
 	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
 			     : /* no outputs */
 			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-static __inline__ void _writew(u16 w, unsigned long addr)
+static inline void _writew(u16 w, void __iomem *addr)
 {
 	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
 			     : /* no outputs */
 			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-static __inline__ void _writel(u32 l, unsigned long addr)
+static inline void _writel(u32 l, void __iomem *addr)
 {
 	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
 			     : /* no outputs */
 			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-static __inline__ void _writeq(u64 q, unsigned long addr)
+static inline void _writeq(u64 q, void __iomem *addr)
 {
 	__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
 			     : /* no outputs */
 			     : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
 }
 
-#define readb(__addr)		(_readb((unsigned long)(__addr)))
-#define readw(__addr)		(_readw((unsigned long)(__addr)))
-#define readl(__addr)		(_readl((unsigned long)(__addr)))
-#define readq(__addr)		(_readq((unsigned long)(__addr)))
-#define readb_relaxed(a)	readb(a)
-#define readw_relaxed(a)	readw(a)
-#define readl_relaxed(a)	readl(a)
-#define readq_relaxed(a)	readq(a)
-#define writeb(__b, __addr)	(_writeb((u8)(__b), (unsigned long)(__addr)))
-#define writew(__w, __addr)	(_writew((u16)(__w), (unsigned long)(__addr)))
-#define writel(__l, __addr)	(_writel((u32)(__l), (unsigned long)(__addr)))
-#define writeq(__q, __addr)	(_writeq((u64)(__q), (unsigned long)(__addr)))
+#define readb(__addr)		_readb(__addr)
+#define readw(__addr)		_readw(__addr)
+#define readl(__addr)		_readl(__addr)
+#define readq(__addr)		_readq(__addr)
+#define readb_relaxed(__addr)	_readb(__addr)
+#define readw_relaxed(__addr)	_readw(__addr)
+#define readl_relaxed(__addr)	_readl(__addr)
+#define readq_relaxed(__addr)	_readq(__addr)
+#define writeb(__b, __addr)	_writeb(__b, __addr)
+#define writew(__w, __addr)	_writew(__w, __addr)
+#define writel(__l, __addr)	_writel(__l, __addr)
+#define writeq(__q, __addr)	_writeq(__q, __addr)
 
 /* Now versions without byte-swapping. */
 static __inline__ u8 _raw_readb(unsigned long addr)
@@ -282,7 +278,7 @@ static __inline__ void _raw_writeq(u64 q, unsigned long addr)
 /* Now, SBUS variants, only difference from PCI is that we do
  * not use little-endian ASIs.
  */
-static __inline__ u8 _sbus_readb(unsigned long addr)
+static inline u8 _sbus_readb(void __iomem *addr)
 {
 	u8 ret;
 
@@ -293,7 +289,7 @@ static __inline__ u8 _sbus_readb(unsigned long addr)
 	return ret;
 }
 
-static __inline__ u16 _sbus_readw(unsigned long addr)
+static inline u16 _sbus_readw(void __iomem *addr)
 {
 	u16 ret;
 
@@ -304,7 +300,7 @@ static __inline__ u16 _sbus_readw(unsigned long addr)
 	return ret;
 }
 
-static __inline__ u32 _sbus_readl(unsigned long addr)
+static inline u32 _sbus_readl(void __iomem *addr)
 {
 	u32 ret;
 
@@ -315,7 +311,7 @@ static __inline__ u32 _sbus_readl(unsigned long addr)
 	return ret;
 }
 
-static __inline__ u64 _sbus_readq(unsigned long addr)
+static inline u64 _sbus_readq(void __iomem *addr)
 {
 	u64 ret;
 
@@ -326,44 +322,45 @@ static __inline__ u64 _sbus_readq(unsigned long addr)
 	return ret;
 }
 
-static __inline__ void _sbus_writeb(u8 b, unsigned long addr)
+static inline void _sbus_writeb(u8 b, void __iomem *addr)
 {
 	__asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
 			     : /* no outputs */
 			     : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-static __inline__ void _sbus_writew(u16 w, unsigned long addr)
+static inline void _sbus_writew(u16 w, void __iomem *addr)
 {
 	__asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
 			     : /* no outputs */
 			     : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-static __inline__ void _sbus_writel(u32 l, unsigned long addr)
+static inline void _sbus_writel(u32 l, void __iomem *addr)
 {
 	__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
 			     : /* no outputs */
 			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-static __inline__ void _sbus_writeq(u64 l, unsigned long addr)
+static inline void _sbus_writeq(u64 l, void __iomem *addr)
 {
 	__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
 			     : /* no outputs */
 			     : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
 }
 
-#define sbus_readb(__addr)		(_sbus_readb((unsigned long)(__addr)))
-#define sbus_readw(__addr)		(_sbus_readw((unsigned long)(__addr)))
-#define sbus_readl(__addr)		(_sbus_readl((unsigned long)(__addr)))
-#define sbus_readq(__addr)		(_sbus_readq((unsigned long)(__addr)))
-#define sbus_writeb(__b, __addr)	(_sbus_writeb((__b), (unsigned long)(__addr)))
-#define sbus_writew(__w, __addr)	(_sbus_writew((__w), (unsigned long)(__addr)))
-#define sbus_writel(__l, __addr)	(_sbus_writel((__l), (unsigned long)(__addr)))
-#define sbus_writeq(__l, __addr)	(_sbus_writeq((__l), (unsigned long)(__addr)))
+#define sbus_readb(__addr)		_sbus_readb(__addr)
+#define sbus_readw(__addr)		_sbus_readw(__addr)
+#define sbus_readl(__addr)		_sbus_readl(__addr)
+#define sbus_readq(__addr)		_sbus_readq(__addr)
+#define sbus_writeb(__b, __addr)	_sbus_writeb(__b, __addr)
+#define sbus_writew(__w, __addr)	_sbus_writew(__w, __addr)
+#define sbus_writel(__l, __addr)	_sbus_writel(__l, __addr)
+#define sbus_writeq(__l, __addr)	_sbus_writeq(__l, __addr)
 
-static inline void *_sbus_memset_io(unsigned long dst, int c, __kernel_size_t n)
+static inline void __iomem*_sbus_memset_io(void __iomem *dst, int c,
+					   __kernel_size_t n)
 {
 	while(n--) {
 		sbus_writeb(c, dst);
@@ -372,13 +369,12 @@ static inline void *_sbus_memset_io(unsigned long dst, int c, __kernel_size_t n)
 	return (void *) dst;
 }
 
-#define sbus_memset_io(d,c,sz)	\
-	_sbus_memset_io((unsigned long)d,(int)c,(__kernel_size_t)sz)
+#define sbus_memset_io(d,c,sz)	_sbus_memset_io(d,c,sz)
 
-static inline void *
-_memset_io(void *dst, int c, __kernel_size_t n)
+static inline void __iomem *
+_memset_io(void __iomem *dst, int c, __kernel_size_t n)
 {
-	char *d = dst;
+	void __iomem *d = dst;
 
 	while (n--) {
 		writeb(c, d);
@@ -388,11 +384,10 @@ _memset_io(void *dst, int c, __kernel_size_t n)
 	return dst;
 }
 
-#define memset_io(d,c,sz)	\
-	_memset_io((void *)d,(int)c,(__kernel_size_t)sz)
+#define memset_io(d,c,sz)	_memset_io(d,c,sz)
 
-static inline void *
-_memcpy_fromio(void *dst, unsigned long src, __kernel_size_t n)
+static inline void __iomem *
+_memcpy_fromio(void *dst, void __iomem *src, __kernel_size_t n)
 {
 	char *d = dst;
 
@@ -405,25 +400,23 @@ _memcpy_fromio(void *dst, unsigned long src, __kernel_size_t n)
 	return dst;
 }
 
-#define memcpy_fromio(d,s,sz)	\
-	_memcpy_fromio((void *)d,(unsigned long)s,(__kernel_size_t)sz)
+#define memcpy_fromio(d,s,sz)	_memcpy_fromio(d,s,sz)
 
-static inline void *
-_memcpy_toio(unsigned long dst, const void *src, __kernel_size_t n)
+static inline void __iomem *
+_memcpy_toio(void __iomem *dst, const void *src, __kernel_size_t n)
 {
 	const char *s = src;
-	unsigned long d = dst;
+	void __iomem *d = dst;
 
 	while (n--) {
 		char tmp = *s++;
 		writeb(tmp, d);
 		d++;
 	}
-	return (void *)dst;
+	return dst;
 }
 
-#define memcpy_toio(d,s,sz)	\
-	_memcpy_toio((unsigned long)d,(const void *)s,(__kernel_size_t)sz)
+#define memcpy_toio(d,s,sz)	_memcpy_toio(d,s,sz)
 
 static inline int check_signature(unsigned long io_addr,
 				  const unsigned char *signature,
@@ -431,8 +424,9 @@ static inline int check_signature(unsigned long io_addr,
 {
 	int retval = 0;
 	do {
-		if (readb(io_addr++) != *signature++)
+		if (readb((void __iomem *)io_addr) != *signature++)
 			goto out;
+		io_addr++;
 	} while (--length);
 	retval = 1;
 out:
@@ -444,10 +438,26 @@ static inline int check_signature(unsigned long io_addr,
 /* On sparc64 we have the whole physical IO address space accessible
  * using physically addressed loads and stores, so this does nothing.
  */
-#define ioremap(__offset, __size)	((void *)(__offset))
+#define ioremap(__offset, __size)	((void __iomem *)(__offset))
 #define ioremap_nocache(X,Y)		ioremap((X),(Y))
 #define iounmap(__addr)			do { (void)(__addr); } while(0)
 
+#define ioread8(X)			readb(X)
+#define ioread16(X)			readw(X)
+#define ioread32(X)			readl(X)
+#define iowrite8(val,X)			writeb(val,X)
+#define iowrite16(val,X)		writew(val,X)
+#define iowrite32(val,X)		writel(val,X)
+
+/* Create a virtual mapping cookie for an IO port range */
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+extern void ioport_unmap(void __iomem *);
+
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+struct pci_dev;
+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
+extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
+
 /* Similarly for SBUS. */
 #define sbus_ioremap(__res, __offset, __size, __name) \
 ({	unsigned long __ret; \
@@ -455,11 +465,11 @@ static inline int check_signature(unsigned long io_addr,
 	__ret += (unsigned long) (__offset); \
 	if (! request_region((__ret), (__size), (__name))) \
 		__ret = 0UL; \
-	__ret; \
+	(void __iomem *) __ret; \
 })
 
 #define sbus_iounmap(__addr, __size)	\
-	release_region((__addr), (__size))
+	release_region((unsigned long)(__addr), (__size))
 
 /* Nothing to do */
 

lib/iomap.c

@@ -24,9 +24,9 @@
  * we can do some sanity checks on the low bits, and don't
  * need to just take things for granted.
  */
-#define PIO_OFFSET	0x10000
-#define PIO_MASK	0x0ffff
-#define PIO_RESERVED	0x40000
+#define PIO_OFFSET	0x10000UL
+#define PIO_MASK	0x0ffffUL
+#define PIO_RESERVED	0x40000UL
 
 /*
  * Ugly macros are a way of life.
@@ -77,7 +77,7 @@ EXPORT_SYMBOL(iowrite16);
 EXPORT_SYMBOL(iowrite32);
 
 /* Create a virtual mapping cookie for an IO port range */
-void __iomem *ioport_map(unsigned int port, unsigned int nr)
+void __iomem *ioport_map(unsigned long port, unsigned int nr)
 {
 	if (port > PIO_MASK)
 		return NULL;