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Commit a16b2ff6 authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds
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[PATCH] TX49xx update 

This adds support for Toshiba's TX49xx SOCs and an evaluation board with
the nice nae RBTX4927.
parent 5d3adbe2
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arch/mips/tx4927/common/Makefile 0 → 100644
View file @ a16b2ff6
#
# Makefile for common code for Toshiba TX4927 based systems
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := tx4927_prom.o
obj-y += tx4927_setup.o
obj-y += tx4927_irq.o
obj-y += tx4927_irq_handler.o
obj-$(CONFIG_KGDB) += tx4927_dbgio.o
arch/mips/tx4927/common/tx4927_dbgio.c 0 → 100644
View file @ a16b2ff6
/*
* linux/arch/mips/tx4927/common/tx4927_dbgio.c
*
* kgdb interface for gdb
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/tx4927/tx4927_mips.h>
u8 getDebugChar(void)
{
extern u8 txx9_sio_kdbg_rd(void);
return (txx9_sio_kdbg_rd());
}
int putDebugChar(u8 byte)
{
extern int txx9_sio_kdbg_wr( u8 ch );
return (txx9_sio_kdbg_wr(byte));
}
arch/mips/tx4927/common/tx4927_irq.c 0 → 100644
View file @ a16b2ff6
This diff is collapsed.
arch/mips/tx4927/common/tx4927_irq_handler.S 0 → 100644
View file @ a16b2ff6
/*
* linux/arch/mips/tx4927/common/tx4927_irq_handler.S
*
* Primary interrupt handler for tx4927 based systems
*
* Author: MontaVista Software, Inc.
* Author: jsun@mvista.com or jsun@junsun.net
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/tx4927/tx4927.h>
.align 5
NESTED(tx4927_irq_handler, PT_SIZE, sp)
SAVE_ALL
CLI
.set at
mfc0 t0, CP0_CAUSE
mfc0 t1, CP0_STATUS
and t0, t1
andi t1, t0, STATUSF_IP7 /* cpu timer */
bnez t1, ll_ip7
/* IP6..IP3 multiplexed -- do not use */
andi t1, t0, STATUSF_IP2 /* tx4927 pic */
bnez t1, ll_ip2
andi t1, t0, STATUSF_IP0 /* user line 0 */
bnez t1, ll_ip0
andi t1, t0, STATUSF_IP1 /* user line 1 */
bnez t1, ll_ip1
.set reorder
/* wrong alarm or masked ... */
j spurious_interrupt
nop
END(tx4927_irq_handler)
.align 5
ll_ip7:
li a0, TX4927_IRQ_CPU_TIMER
move a1, sp
jal do_IRQ
j ret_from_irq
ll_ip2:
jal tx4927_irq_nested
nop
beqz v0, goto_spurious_interrupt
nop
move a0, v0
move a1, sp
jal do_IRQ
j ret_from_irq
goto_spurious_interrupt:
j spurious_interrupt
nop
ll_ip1:
li a0, TX4927_IRQ_USER1
move a1, sp
jal do_IRQ
j ret_from_irq
ll_ip0:
li a0, TX4927_IRQ_USER0
move a1, sp
jal do_IRQ
j ret_from_irq
arch/mips/tx4927/common/tx4927_prom.c 0 → 100644
View file @ a16b2ff6
/*
* linux/arch/mips/tx4927/common/tx4927_prom.c
*
* common tx4927 memory interface
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/tx4927/tx4927.h>
static unsigned int __init tx4927_process_sdccr(u64 * addr)
{
u64 val;
unsigned int sdccr_ce;
unsigned int sdccr_bs;
unsigned int sdccr_rs;
unsigned int sdccr_cs;
unsigned int sdccr_mw;
unsigned int bs = 0;
unsigned int rs = 0;
unsigned int cs = 0;
unsigned int mw = 0;
unsigned int msize = 0;
val = (*((vu64 *) (addr)));
/* MVMCP -- need #defs for these bits masks */
sdccr_ce = ((val & (1 << 10)) >> 10);
sdccr_bs = ((val & (1 << 8)) >> 8);
sdccr_rs = ((val & (3 << 5)) >> 5);
sdccr_cs = ((val & (3 << 2)) >> 2);
sdccr_mw = ((val & (1 << 0)) >> 0);
if (sdccr_ce) {
switch (sdccr_bs) {
case 0:{
bs = 2;
break;
}
case 1:{
bs = 4;
break;
}
}
switch (sdccr_rs) {
case 0:{
rs = 2048;
break;
}
case 1:{
rs = 4096;
break;
}
case 2:{
rs = 8192;
break;
}
case 3:{
rs = 0;
break;
}
}
switch (sdccr_cs) {
case 0:{
cs = 256;
break;
}
case 1:{
cs = 512;
break;
}
case 2:{
cs = 1024;
break;
}
case 3:{
cs = 2048;
break;
}
}
switch (sdccr_mw) {
case 0:{
mw = 8;
break;
} /* 8 bytes = 64 bits */
case 1:{
mw = 4;
break;
} /* 4 bytes = 32 bits */
}
}
/* bytes per chip MB per chip num chips */
msize = (((rs * cs * mw) / (1024 * 1024)) * bs);
return (msize);
}
unsigned int __init tx4927_get_mem_size(void)
{
unsigned int c0;
unsigned int c1;
unsigned int c2;
unsigned int c3;
unsigned int total;
/* MVMCP -- need #defs for these registers */
c0 = tx4927_process_sdccr((u64 *) 0xff1f8000);
c1 = tx4927_process_sdccr((u64 *) 0xff1f8008);
c2 = tx4927_process_sdccr((u64 *) 0xff1f8010);
c3 = tx4927_process_sdccr((u64 *) 0xff1f8018);
total = c0 + c1 + c2 + c3;
return (total);
}
arch/mips/tx4927/common/tx4927_setup.c 0 → 100644
View file @ a16b2ff6
/*
* linux/arch/mips/tx4927/common/tx4927_setup.c
*
* common tx4927 setup stuff
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/irq.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/time.h>
#include <asm/time.h>
#include <asm/tx4927/tx4927.h>
#undef DEBUG
void __init tx4927_setup(void);
void __init tx4927_time_init(void);
void __init tx4927_timer_setup(struct irqaction *irq);
void dump_cp0(char *key);
void (*__wbflush) (void);
static void tx4927_write_buffer_flush(void)
{
__asm__ __volatile__
("sync\n\t" "nop\n\t" "loop: bc0f loop\n\t" "nop\n\t");
}
void __init tx4927_setup(void)
{
board_time_init = tx4927_time_init;
board_timer_setup = tx4927_timer_setup;
__wbflush = tx4927_write_buffer_flush;
#ifdef CONFIG_TOSHIBA_RBTX4927
{
extern void toshiba_rbtx4927_setup(void);
toshiba_rbtx4927_setup();
}
#endif
return;
}
void __init tx4927_time_init(void)
{
#ifdef CONFIG_TOSHIBA_RBTX4927
{
extern void toshiba_rbtx4927_time_init(void);
toshiba_rbtx4927_time_init();
}
#endif
#ifdef CONFIG_KGDB
{
printk("Calling breakpoint() -- start remote kgdb\n");
set_debug_traps();
breakpoint();
printk("Calling breakpoint() -- done\n");
}
#endif
return;
}
void __init tx4927_timer_setup(struct irqaction *irq)
{
u32 count;
u32 c1;
u32 c2;
setup_irq(TX4927_IRQ_CPU_TIMER, irq);
/* to generate the first timer interrupt */
c1 = read_c0_count();
count = c1 + (mips_counter_frequency / HZ);
write_c0_compare(count);
c2 = read_c0_count();
#ifdef CONFIG_TOSHIBA_RBTX4927
{
extern void toshiba_rbtx4927_timer_setup(struct irqaction
*irq);
toshiba_rbtx4927_timer_setup(irq);
}
#endif
return;
}
#ifdef DEBUG
void print_cp0(char *key, int num, char *name, u32 val)
{
printk("%s cp0:%02d:%s=0x%08x\n", key, num, name, val);
return;
}
indent: Standard input:25: Error:Unexpected end of file
void
dump_cp0(char *key)
{
if (key == NULL)
key = "";
print_cp0(key, 0, "INDEX ", read_c0_index());
print_cp0(key, 2, "ENTRYLO1", read_c0_entrylo0());
print_cp0(key, 3, "ENTRYLO2", read_c0_entrylo1());
print_cp0(key, 4, "CONTEXT ", read_c0_context());
print_cp0(key, 5, "PAGEMASK", read_c0_pagemask());
print_cp0(key, 6, "WIRED ", read_c0_wired());
//print_cp0(key, 8, "BADVADDR", read_c0_badvaddr());
print_cp0(key, 9, "COUNT ", read_c0_count());
print_cp0(key, 10, "ENTRYHI ", read_c0_entryhi());
print_cp0(key, 11, "COMPARE ", read_c0_compare());
print_cp0(key, 12, "STATUS ", read_c0_status());
print_cp0(key, 13, "CAUSE ", read_c0_cause() & 0xffff87ff);
print_cp0(key, 16, "CONFIG ", read_c0_config());
return;
}
void print_pic(char *key, u32 reg, char *name)
{
printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name,
TX4927_RD(reg));
return;
}
void dump_pic(char *key)
{
if (key == NULL)
key = "";
print_pic(key, 0xff1ff600, "IRDEN ");
print_pic(key, 0xff1ff604, "IRDM0 ");
print_pic(key, 0xff1ff608, "IRDM1 ");
print_pic(key, 0xff1ff610, "IRLVL0 ");
print_pic(key, 0xff1ff614, "IRLVL1 ");
print_pic(key, 0xff1ff618, "IRLVL2 ");
print_pic(key, 0xff1ff61c, "IRLVL3 ");
print_pic(key, 0xff1ff620, "IRLVL4 ");
print_pic(key, 0xff1ff624, "IRLVL5 ");
print_pic(key, 0xff1ff628, "IRLVL6 ");
print_pic(key, 0xff1ff62c, "IRLVL7 ");
print_pic(key, 0xff1ff640, "IRMSK ");
print_pic(key, 0xff1ff660, "IREDC ");
print_pic(key, 0xff1ff680, "IRPND ");
print_pic(key, 0xff1ff6a0, "IRCS ");
print_pic(key, 0xff1ff514, "IRFLAG1 "); /* don't read IRLAG0 -- it hangs system */
print_pic(key, 0xff1ff518, "IRPOL ");
print_pic(key, 0xff1ff51c, "IRRCNT ");
print_pic(key, 0xff1ff520, "IRMASKINT");
print_pic(key, 0xff1ff524, "IRMASKEXT");
return;
}
void print_addr(char *hdr, char *key, u32 addr)
{
printk("%s %s:0x%08x=0x%08x\n", hdr, key, addr, TX4927_RD(addr));
return;
}
void dump_180(char *key)
{
u32 i;
for (i = 0x80000180; i < 0x80000180 + 0x80; i += 4) {
print_addr("180", key, i);
}
return;
}
void dump_eh0(char *key)
{
int i;
extern unsigned long exception_handlers[];
for (i = (int) exception_handlers;
i < (int) (exception_handlers + 20); i += 4) {
print_addr("eh0", key, i);
}
return;
}
void pk0(void)
{
volatile u32 val;
__asm__ __volatile__("ori %0, $26, 0":"=r"(val)
);
printk("k0=[0x%08x]\n", val);
}
#endif
arch/mips/tx4927/toshiba_rbtx4927/Makefile 0 → 100644
View file @ a16b2ff6
obj-y += toshiba_rbtx4927_prom.o
obj-y += toshiba_rbtx4927_setup.o
obj-y += toshiba_rbtx4927_irq.o
obj-$(CONFIG_PCI) += toshiba_rbtx4927_pci_fixup.o
obj-$(CONFIG_PCI) += toshiba_rbtx4927_pci_ops.o
EXTRA_AFLAGS := $(CFLAGS)
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c 0 → 100644
View file @ a16b2ff6
This diff is collapsed.
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_fixup.c 0 → 100644
View file @ a16b2ff6
/*
*
* BRIEF MODULE DESCRIPTION
* Board specific pci fixups for the Toshiba rbtx4927
*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
* Copyright (C) 2000-2001 Toshiba Corporation
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/tx4927/tx4927.h>
#include <asm/tx4927/tx4927_pci.h>
#undef DEBUG
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif
void __init pcibios_fixup_resources(struct pci_dev *dev)
{
/* will need to fixup IO resources */
}
void __init pcibios_fixup(void)
{
/* nothing to do here */
}
/* look up table for backplane pci irq for slots 17-20 by pin # */
static unsigned char backplane_pci_irq[4][4] = {
/* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
/* PJ6 SLOT: 17, PIN: 2 */
TX4927_IRQ_IOC_PCIB,
/* PJ6 SLOT: 17, PIN: 3 */
TX4927_IRQ_IOC_PCIC,
/* PJ6 SLOT: 17, PIN: 4 */
TX4927_IRQ_IOC_PCID},
/* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
/* SB SLOT: 18, PIN: 2 */
TX4927_IRQ_IOC_PCIC,
/* SB SLOT: 18, PIN: 3 */
TX4927_IRQ_IOC_PCID,
/* SB SLOT: 18, PIN: 4 */
TX4927_IRQ_IOC_PCIA},
/* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
/* PJ5 SLOT: 19, PIN: 2 */
TX4927_IRQ_IOC_PCID,
/* PJ5 SLOT: 19, PIN: 3 */
TX4927_IRQ_IOC_PCIA,
/* PJ5 SLOT: 19, PIN: 4 */
TX4927_IRQ_IOC_PCIB},
/* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
/* PJ4 SLOT: 20, PIN: 2 */
TX4927_IRQ_IOC_PCIA,
/* PJ4 SLOT: 20, PIN: 3 */
TX4927_IRQ_IOC_PCIB,
/* PJ4 SLOT: 20, PIN: 4 */
TX4927_IRQ_IOC_PCIC}
};
int pci_get_irq(struct pci_dev *dev, int pin)
{
unsigned char irq = pin;
DBG("pci_get_irq: pin is %d\n", pin);
/* IRQ rotation */
irq--; /* 0-3 */
if (dev->bus->parent == NULL &&
PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
PCI_SLOT(dev->devfn));
/* IDSEL=A23 is tx4927 onboard pci slot */
irq = (irq + PCI_SLOT(dev->devfn)) % 4;
irq++; /* 1-4 */
DBG("irq is now %d\n", irq);
switch (irq) {
case 1:
irq = TX4927_IRQ_IOC_PCIA;
break;
case 2:
irq = TX4927_IRQ_IOC_PCIB;
break;
case 3:
irq = TX4927_IRQ_IOC_PCIC;
break;
case 4:
irq = TX4927_IRQ_IOC_PCID;
break;
}
} else {
/* PCI Backplane */
DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
PCI_SLOT(dev->devfn));
irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
}
DBG("assigned irq %d\n", irq);
return irq;
}
#ifdef TX4927_SUPPORT_PCI_66
extern int tx4927_pci66;
extern void tx4927_pci66_setup(void);
#endif
extern void tx4927_pci_setup(void);
#ifdef TX4927_SUPPORT_PCI_66
int tx4927_pci66_check(void)
{
struct pci_dev *dev;
unsigned short stat;
int cap66 = 1;
if (tx4927_pci66 < 0)
return 0;
/* check 66MHz capability */
pci_for_each_dev(dev) {
if (cap66) {
pci_read_config_word(dev, PCI_STATUS, &stat);
if (!(stat & PCI_STATUS_66MHZ)) {
printk(KERN_INFO
"PCI: %02x:%02x not 66MHz capable.\n",
dev->bus->number, dev->devfn);
cap66 = 0;
}
}
}
return cap66;
}
#endif
#ifdef DEBUG
void do_it(u32 offset, u32 reg)
{
volatile u32 a1;
volatile u32 a2;
volatile u32 v1;
volatile u32 v2;
a1 = 0xff1f0000 + offset + reg;
a2 = a1 + 4;
v1 = *(volatile u32 *) a1;
v2 = *(volatile u32 *) a2;
if (v1)
printk("TX4927 0x%08x 0x%08x\n", a1, v1);
if (v2)
printk("TX4927 0x%08x 0x%08x\n", a2, v2);
}
void do_it1(u32 base, u32 r)
{
do_it(base, r);
}
void do_it2(u32 base, u32 start, u32 stop)
{
u32 r;
for (r = start; r <= stop; r += 8) {
do_it(base, r);
}
}
void dump_config(void)
{
unsigned long id;
unsigned long j;
struct pci_dev *dev;
printk("----------------------pci\n");
pci_for_each_dev(dev) {
for (j = 0; j < 64; j++) {
pci_read_config_dword(dev, j * 4, &id);
if (id == 0)
continue;
printk
("dev 0x%02x 0x%02x:0x%02x -- 0x%02x-0x%02x 0x%08x\n",
dev->devfn, PCI_SLOT(dev->devfn),
PCI_FUNC(dev->devfn), (j * 4) + 3, (j * 4),
id);
}
printk("dev 0x%02x \n", dev->devfn);
}
printk("----------------------sdram\n");
do_it2(0x8000, 0x00, 0x18);
do_it1(0x8000, 0x40);
do_it1(0x8000, 0x58);
printk("----------------------ebus\n");
do_it2(0x9000, 0x00, 0x38);
printk("----------------------ecc\n");
do_it2(0xa000, 0x00, 0x08);
printk("----------------------dmac\n");
do_it2(0xb000, 0x00, 0xf8);
/* b1xx */
printk("----------------------pci\n");
/* d */
printk("----------------------cfg\n");
do_it2(0xe000, 0x00, 0x20);
do_it1(0xe000, 0x30);
do_it1(0xe000, 0x48);
printk("----------------------timers\n");
do_it2(0xf000, 0x00, 0xf0);
do_it2(0xf100, 0x00, 0xf0);
do_it2(0xf200, 0x00, 0xf0);
printk("----------------------serial\n");
do_it2(0xf300, 0x00, 0x20);
do_it2(0xf400, 0x00, 0x20);
printk("----------------------parallel\n");
do_it2(0xf500, 0x00, 0x0c);
printk("----------------------pic\n");
do_it2(0xf500, 0x10, 0x24);
do_it2(0xf600, 0x00, 0x2c);
do_it1(0xf600, 0x40);
do_it1(0xf600, 0x60);
do_it1(0xf600, 0x80);
do_it1(0xf600, 0xa0);
printk("----------------------aclink\n");
do_it2(0xf700, 0x00, 0xfc);
printk("----------------------done\n");
}
#endif
void __init pcibios_fixup_irqs(void)
{
unsigned char pin;
unsigned char irq;
struct pci_dev *dev;
unsigned int id;
#ifdef TX4927_SUPPORT_PCI_66
{
if (tx4927_pci66_check()) {
tx4927_pci66_setup();
tx4927_pci_setup(); /* Reinitialize PCIC */
}
}
#endif
pci_for_each_dev(dev) {
DBG("FIXUP:\n");
DBG(" devfn=0x%02x (0x%02x:0x%02x)\n",
dev->devfn, PCI_SLOT(dev->devfn),
PCI_FUNC(dev->devfn));
pci_read_config_dword(dev, PCI_VENDOR_ID, &id);
DBG(" id=0x%08x\n", id);
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
DBG(" line=0x%02x/%d\n", irq, irq);
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
DBG(" pin=%d\n", pin);
#ifdef DEBUG
{
unsigned int tmp;
pci_read_config_dword(dev, 0x10, &tmp);
DBG(" bar0:0x10=0x%08x\n", tmp);
pci_read_config_dword(dev, 0x14, &tmp);
DBG(" bar1:0x14=0x%08x\n", tmp);
pci_read_config_dword(dev, 0x1c, &tmp);
DBG(" bar2:0x1c=0x%08x\n", tmp);
pci_read_config_dword(dev, 0x20, &tmp);
DBG(" bar3:0x20=0x%08x\n", tmp);
pci_read_config_dword(dev, 0x24, &tmp);
DBG(" bar4:0x24=0x%08x\n", tmp);
}
#endif
irq = 0;
if (id == 0x91301055) { /* ide */
irq = 14;
}
if (pin == 0) {
DBG(" auto irq (now=%d) -- skipping pin=0\n", irq);
} else if (irq) {
DBG(" auto irq (now=%d) -- skipping hardcoded irq\n", irq);
} else {
DBG(" auto irq (was=%d)\n", irq);
irq = pci_get_irq(dev, pin);
pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
irq);
dev->irq = irq;
DBG(" auto irq (now=%d)\n", irq);
}
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
printk(KERN_INFO
"PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
PCI_FUNC(dev->devfn), irq);
}
}
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_ops.c 0 → 100644
View file @ a16b2ff6
/*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ahennessy@mvista.com
*
* Copyright (C) 2000-2001 Toshiba Corporation
*
* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
*
* Define the pci_ops for the Toshiba rbtx4927
*
* Much of the code is derived from the original DDB5074 port by
* Geert Uytterhoeven <geert@sonycom.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/addrspace.h>
#include <asm/pci_channel.h>
#include <asm/tx4927/tx4927_pci.h>
#include <asm/debug.h>
/* initialize in setup */
struct resource pci_io_resource = {
"pci IO space",
(PCIBIOS_MIN_IO),
((PCIBIOS_MIN_IO) + (TX4927_PCIIO_SIZE)) - 1,
IORESOURCE_IO
};
/* initialize in setup */
struct resource pci_mem_resource = {
"pci memory space",
TX4927_PCIMEM,
TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
IORESOURCE_MEM
};
extern struct pci_ops tx4927_pci_ops;
struct pci_channel mips_pci_channels[] = {
/* h/w only supports devices 0x00 to 0x14 */
{&tx4927_pci_ops, &pci_io_resource, &pci_mem_resource,
PCI_DEVFN(0x00, 0), PCI_DEVFN(0x14, 7)},
{NULL, NULL, NULL, 0, 0}
};
unsigned int pcibios_assign_all_busses(void)
{
return 1;
}
static int
mkaddr(unsigned char bus, unsigned char dev_fn, unsigned char where,
int *flagsp)
{
if (bus > 0) {
/* Type 1 configuration */
tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
} else {
if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
return -1;
/* Type 0 configuration */
tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
((dev_fn & 0xff) << 0x08) | (where & 0xfc);
}
/* clear M_ABORT and Disable M_ABORT Int. */
tx4927_pcicptr->pcistatus =
(tx4927_pcicptr->pcistatus & 0x0000ffff) |
(PCI_STATUS_REC_MASTER_ABORT << 16);
tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
return 0;
}
static int check_abort(int flags)
{
int code = PCIBIOS_SUCCESSFUL;
if (tx4927_pcicptr->
pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
tx4927_pcicptr->pcistatus =
(tx4927_pcicptr->
pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
<< 16);
tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
code = PCIBIOS_DEVICE_NOT_FOUND;
// printk("returning PCIBIOS_DEVICE_NOT_FOUND\n");
}
return code;
}
/*
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
static int tx4927_pcibios_read_config_byte(struct pci_dev *dev,
int where, unsigned char *val)
{
int flags, retval;
unsigned char bus, func_num;
db_assert((where & 3) == 0);
db_assert(where < (1 << 8));
/* check if the bus is top-level */
if (dev->bus->parent != NULL) {
bus = dev->bus->number;
db_assert(bus != 0);
} else {
bus = 0;
}
func_num = PCI_FUNC(dev->devfn);
if (mkaddr(bus, dev->devfn, where, &flags))
return -1;
#ifdef __BIG_ENDIAN
*val =
*(volatile u8 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | ((where & 3) ^ 3));
#else
*val =
*(volatile u8 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | (where & 3));
#endif
retval = check_abort(flags);
if (retval == PCIBIOS_DEVICE_NOT_FOUND)
*val = 0xff;
//printk("CFG R1 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val );
return retval;
}
static int tx4927_pcibios_read_config_word(struct pci_dev *dev,
int where, unsigned short *val)
{
int flags, retval;
unsigned char bus, func_num;
if (where & 1)
return PCIBIOS_BAD_REGISTER_NUMBER;
db_assert((where & 3) == 0);
db_assert(where < (1 << 8));
/* check if the bus is top-level */
if (dev->bus->parent != NULL) {
bus = dev->bus->number;
db_assert(bus != 0);
} else {
bus = 0;
}
func_num = PCI_FUNC(dev->devfn);
if (mkaddr(bus, dev->devfn, where, &flags))
return -1;
#ifdef __BIG_ENDIAN
*val =
*(volatile u16 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | ((where & 3) ^ 2));
#else
*val =
*(volatile u16 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | (where & 3));
#endif
retval = check_abort(flags);
if (retval == PCIBIOS_DEVICE_NOT_FOUND)
*val = 0xffff;
//printk("CFG R2 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val );
return retval;
}
static int tx4927_pcibios_read_config_dword(struct pci_dev *dev,
int where, unsigned int *val)
{
int flags, retval;
unsigned char bus, func_num;
if (where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
db_assert((where & 3) == 0);
db_assert(where < (1 << 8));
/* check if the bus is top-level */
if (dev->bus->parent != NULL) {
bus = dev->bus->number;
db_assert(bus != 0);
} else {
bus = 0;
}
func_num = PCI_FUNC(dev->devfn);
if (mkaddr(bus, dev->devfn, where, &flags))
return -1;
*val = tx4927_pcicptr->g2pcfgdata;
retval = check_abort(flags);
if (retval == PCIBIOS_DEVICE_NOT_FOUND)
*val = 0xffffffff;
//printk("CFG R4 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val );
return retval;
}
static int tx4927_pcibios_write_config_byte(struct pci_dev *dev,
int where, unsigned char val)
{
int flags;
unsigned char bus, func_num;
/* check if the bus is top-level */
if (dev->bus->parent != NULL) {
bus = dev->bus->number;
db_assert(bus != 0);
} else {
bus = 0;
}
func_num = PCI_FUNC(dev->devfn);
if (mkaddr(bus, dev->devfn, where, &flags))
return -1;
#ifdef __BIG_ENDIAN
*(volatile u8 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | ((where & 3) ^ 3)) = val;
#else
*(volatile u8 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | (where & 3)) = val;
#endif
//printk("CFG W1 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val );
return check_abort(flags);
}
static int tx4927_pcibios_write_config_word(struct pci_dev *dev,
int where, unsigned short val)
{
int flags;
unsigned char bus, func_num;
if (where & 1)
return PCIBIOS_BAD_REGISTER_NUMBER;
/* check if the bus is top-level */
if (dev->bus->parent != NULL) {
bus = dev->bus->number;
db_assert(bus != 0);
} else {
bus = 0;
}
func_num = PCI_FUNC(dev->devfn);
if (mkaddr(bus, dev->devfn, where, &flags))
return -1;
#ifdef __BIG_ENDIAN
*(volatile u16 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | ((where & 3) ^ 2)) = val;
#else
*(volatile u16 *) ((ulong) & tx4927_pcicptr->
g2pcfgdata | (where & 3)) = val;
#endif
//printk("CFG W2 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val );
return check_abort(flags);
}
static int tx4927_pcibios_write_config_dword(struct pci_dev *dev,
int where, unsigned int val)
{
int flags;
unsigned char bus, func_num;
if (where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
/* check if the bus is top-level */
if (dev->bus->parent != NULL) {
bus = dev->bus->number;
db_assert(bus != 0);
} else {
bus = 0;
}
func_num = PCI_FUNC(dev->devfn);
if (mkaddr(bus, dev->devfn, where, &flags))
return -1;
tx4927_pcicptr->g2pcfgdata = val;
//printk("CFG W4 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val );
return check_abort(flags);
}
struct pci_ops tx4927_pci_ops = {
tx4927_pcibios_read_config_byte,
tx4927_pcibios_read_config_word,
tx4927_pcibios_read_config_dword,
tx4927_pcibios_write_config_byte,
tx4927_pcibios_write_config_word,
tx4927_pcibios_write_config_dword
};
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c 0 → 100644
View file @ a16b2ff6
/*
* rbtx4927 specific prom routines
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/tx4927/tx4927.h>
#ifndef COMMAND_LINE_SIZE
#define COMMAND_LINE_SIZE CL_SIZE
#endif
char arcs_cmdline[COMMAND_LINE_SIZE] = "console=ttyS0,38400 ip=any root=nfs rw";
void __init prom_init_cmdline(int argc, char **argv)
{
int i; /* Always ignore the "-c" at argv[0] */
/* ignore all built-in args if any f/w args given */
if (argc > 1) {
*arcs_cmdline = '\0';
}
for (i = 1; i < argc; i++) {
if (i != 1) {
strcat(arcs_cmdline, " ");
}
strcat(arcs_cmdline, argv[i]);
}
}
void __init prom_init(int argc, char **argv, char **envp, int *pvec)
{
extern int tx4927_get_mem_size(void);
int msize;
const char* toshiba_name_list[] = GROUP_TOSHIBA_NAMES;
extern char* toshiba_name;
prom_init_cmdline(argc, argv);
mips_machgroup = MACH_GROUP_TOSHIBA;
if ((read_c0_prid() & 0xff) == PRID_REV_TX4927)
mips_machtype = MACH_TOSHIBA_RBTX4927;
else
mips_machtype = MACH_TOSHIBA_RBTX4937;
toshiba_name = toshiba_name_list[mips_machtype];
msize = tx4927_get_mem_size();
add_memory_region(0, msize << 20, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
}
void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
{
}
const char *get_system_type(void)
{
return "Toshiba RBTX4927/RBTX4937";
}
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 0 → 100644
View file @ a16b2ff6
This diff is collapsed.
include/asm-mips/tx4927/toshiba_rbtx4927.h 0 → 100644
View file @ a16b2ff6
/*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
#define __ASM_TX4927_TOSHIBA_RBTX4927_H
#include <asm/tx4927/tx4927.h>
#include <asm/tx4927/tx4927_mips.h>
#ifdef CONFIG_PCI
#include <asm/tx4927/tx4927_pci.h>
#endif
#define TOSHIBA_RBTX4927_WR08(a,b) do { TX4927_WR08(a,b); wbflush(); } while ( 0 )
#ifdef CONFIG_PCI
#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
#else
#define TBTX4927_ISA_IO_OFFSET 0
#endif
#define RBTX4927_SW_RESET_DO 0xbc00f000
#define RBTX4927_SW_RESET_DO_SET 0x01
#define RBTX4927_SW_RESET_ENABLE 0xbc00f002
#define RBTX4927_SW_RESET_ENABLE_SET 0x01
#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
#define RBTX4927_RTL_8019_IRQ (29)
#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */
include/asm-mips/tx4927/tx4927.h 0 → 100644
View file @ a16b2ff6
This diff is collapsed.
include/asm-mips/tx4927/tx4927_mips.h 0 → 100644
View file @ a16b2ff6
This diff is collapsed.
include/asm-mips/tx4927/tx4927_pci.h 0 → 100644
View file @ a16b2ff6
This diff is collapsed.
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