Commit a1cf9c9f authored by Rahul Lakkireddy's avatar Rahul Lakkireddy Committed by David S. Miller

cxgb4: enable ZLIB_DEFLATE when building cxgb4

Fixes:
drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c:39:5: error:
redefinition of 'cudbg_compress_buff'
    int cudbg_compress_buff(struct cudbg_init *pdbg_init,
        ^~~~~~~~~~~~~~~~~~~
   In file included from
drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c:23:0:
   drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.h:45:19: note: previous
definition of 'cudbg_compress_buff' was here
    static inline int cudbg_compress_buff(struct cudbg_init *pdbg_init,
                      ^~~~~~~~~~~~~~~~~~~

Fixes: 91c1953d ("cxgb4: use zlib deflate to compress firmware dump")
Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9e1a27cd
...@@ -69,6 +69,7 @@ config CHELSIO_T4 ...@@ -69,6 +69,7 @@ config CHELSIO_T4
depends on PCI && (IPV6 || IPV6=n) depends on PCI && (IPV6 || IPV6=n)
select FW_LOADER select FW_LOADER
select MDIO select MDIO
select ZLIB_DEFLATE
---help--- ---help---
This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet
adapter and T5/T6 based 40Gb and T6 based 25Gb, 50Gb and 100Gb adapter and T5/T6 based 40Gb and T6 based 25Gb, 50Gb and 100Gb
......
...@@ -8,8 +8,7 @@ obj-$(CONFIG_CHELSIO_T4) += cxgb4.o ...@@ -8,8 +8,7 @@ obj-$(CONFIG_CHELSIO_T4) += cxgb4.o
cxgb4-objs := cxgb4_main.o l2t.o smt.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o \ cxgb4-objs := cxgb4_main.o l2t.o smt.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o \
cxgb4_uld.o sched.o cxgb4_filter.o cxgb4_tc_u32.o \ cxgb4_uld.o sched.o cxgb4_filter.o cxgb4_tc_u32.o \
cxgb4_ptp.o cxgb4_tc_flower.o cxgb4_cudbg.o \ cxgb4_ptp.o cxgb4_tc_flower.o cxgb4_cudbg.o \
cudbg_common.o cudbg_lib.o cudbg_common.o cudbg_lib.o cudbg_zlib.o
cxgb4-$(CONFIG_CHELSIO_T4_DCB) += cxgb4_dcb.o cxgb4-$(CONFIG_CHELSIO_T4_DCB) += cxgb4_dcb.o
cxgb4-$(CONFIG_CHELSIO_T4_FCOE) += cxgb4_fcoe.o cxgb4-$(CONFIG_CHELSIO_T4_FCOE) += cxgb4_fcoe.o
cxgb4-$(CONFIG_DEBUG_FS) += cxgb4_debugfs.o cxgb4-$(CONFIG_DEBUG_FS) += cxgb4_debugfs.o
cxgb4-$(CONFIG_ZLIB_DEFLATE) += cudbg_zlib.o
...@@ -33,24 +33,11 @@ struct cudbg_compress_hdr { ...@@ -33,24 +33,11 @@ struct cudbg_compress_hdr {
static inline int cudbg_get_workspace_size(void) static inline int cudbg_get_workspace_size(void)
{ {
#ifdef CONFIG_ZLIB_DEFLATE
return zlib_deflate_workspacesize(CUDBG_ZLIB_WIN_BITS, return zlib_deflate_workspacesize(CUDBG_ZLIB_WIN_BITS,
CUDBG_ZLIB_MEM_LVL); CUDBG_ZLIB_MEM_LVL);
#else
return 0;
#endif /* CONFIG_ZLIB_DEFLATE */
} }
#ifndef CONFIG_ZLIB_DEFLATE
static inline int cudbg_compress_buff(struct cudbg_init *pdbg_init,
struct cudbg_buffer *pin_buff,
struct cudbg_buffer *pout_buff)
{
return 0;
}
#else
int cudbg_compress_buff(struct cudbg_init *pdbg_init, int cudbg_compress_buff(struct cudbg_init *pdbg_init,
struct cudbg_buffer *pin_buff, struct cudbg_buffer *pin_buff,
struct cudbg_buffer *pout_buff); struct cudbg_buffer *pout_buff);
#endif /* CONFIG_ZLIB_DEFLATE */
#endif /* __CUDBG_ZLIB_H__ */ #endif /* __CUDBG_ZLIB_H__ */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment