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Kirill Smelkov
linux
Commits
a1e262f6
Commit
a1e262f6
authored
Feb 15, 2016
by
Rich Felker
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sh: do not perform IPI-based cache flush except on boards that need it
Signed-off-by:
Rich Felker
<
dalias@libc.org
>
parent
b4214e41
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arch/sh/mm/cache.c
arch/sh/mm/cache.c
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arch/sh/mm/cache.c
View file @
a1e262f6
...
@@ -42,6 +42,8 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
...
@@ -42,6 +42,8 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
{
{
preempt_disable
();
preempt_disable
();
/* Needing IPI for cross-core flush is SHX3-specific. */
#ifdef CONFIG_CPU_SHX3
/*
/*
* It's possible that this gets called early on when IRQs are
* It's possible that this gets called early on when IRQs are
* still disabled due to ioremapping by the boot CPU, so don't
* still disabled due to ioremapping by the boot CPU, so don't
...
@@ -49,6 +51,7 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
...
@@ -49,6 +51,7 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
*/
*/
if
(
num_online_cpus
()
>
1
)
if
(
num_online_cpus
()
>
1
)
smp_call_function
(
func
,
info
,
wait
);
smp_call_function
(
func
,
info
,
wait
);
#endif
func
(
info
);
func
(
info
);
...
...
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