Commit a1fc44b6 authored by Nikola Cornij's avatar Nikola Cornij Committed by Alex Deucher

drm/amd/display: Map DSC resources 1-to-1 if numbers of OPPs and DSCs are equal

[why]
On ASICs where number of DSCs is the same as OPPs there's no need
for DSC resource management. Mappping 1-to-1 fixes mode-set- or S3-
-related issues for such platforms.

[how]
Map DSC resources 1-to-1 to pipes only if number of OPPs is the same
as number of DSCs. This will still keep other ASICs working.
A follow-up patch to fix mode-set issues on those ASICs will be
required if testing shows issues with mode set.
Signed-off-by: default avatarNikola Cornij <nikola.cornij@amd.com>
Reviewed-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9d9de889
...@@ -1536,13 +1536,20 @@ enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state ...@@ -1536,13 +1536,20 @@ enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state
static void acquire_dsc(struct resource_context *res_ctx, static void acquire_dsc(struct resource_context *res_ctx,
const struct resource_pool *pool, const struct resource_pool *pool,
struct display_stream_compressor **dsc) struct display_stream_compressor **dsc,
int pipe_idx)
{ {
int i; int i;
ASSERT(*dsc == NULL); ASSERT(*dsc == NULL);
*dsc = NULL; *dsc = NULL;
if (pool->res_cap->num_dsc == pool->res_cap->num_opp) {
*dsc = pool->dscs[pipe_idx];
res_ctx->is_dsc_acquired[pipe_idx] = true;
return;
}
/* Find first free DSC */ /* Find first free DSC */
for (i = 0; i < pool->res_cap->num_dsc; i++) for (i = 0; i < pool->res_cap->num_dsc; i++)
if (!res_ctx->is_dsc_acquired[i]) { if (!res_ctx->is_dsc_acquired[i]) {
...@@ -1585,7 +1592,7 @@ static enum dc_status add_dsc_to_stream_resource(struct dc *dc, ...@@ -1585,7 +1592,7 @@ static enum dc_status add_dsc_to_stream_resource(struct dc *dc,
if (pipe_ctx->stream != dc_stream) if (pipe_ctx->stream != dc_stream)
continue; continue;
acquire_dsc(&dc_ctx->res_ctx, pool, &pipe_ctx->stream_res.dsc); acquire_dsc(&dc_ctx->res_ctx, pool, &pipe_ctx->stream_res.dsc, i);
/* The number of DSCs can be less than the number of pipes */ /* The number of DSCs can be less than the number of pipes */
if (!pipe_ctx->stream_res.dsc) { if (!pipe_ctx->stream_res.dsc) {
...@@ -1785,7 +1792,7 @@ bool dcn20_split_stream_for_odm( ...@@ -1785,7 +1792,7 @@ bool dcn20_split_stream_for_odm(
next_odm_pipe->stream_res.opp = pool->opps[next_odm_pipe->pipe_idx]; next_odm_pipe->stream_res.opp = pool->opps[next_odm_pipe->pipe_idx];
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
if (next_odm_pipe->stream->timing.flags.DSC == 1) { if (next_odm_pipe->stream->timing.flags.DSC == 1) {
acquire_dsc(res_ctx, pool, &next_odm_pipe->stream_res.dsc); acquire_dsc(res_ctx, pool, &next_odm_pipe->stream_res.dsc, next_odm_pipe->pipe_idx);
ASSERT(next_odm_pipe->stream_res.dsc); ASSERT(next_odm_pipe->stream_res.dsc);
if (next_odm_pipe->stream_res.dsc == NULL) if (next_odm_pipe->stream_res.dsc == NULL)
return false; return false;
......
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