Commit a22d7768 authored by Linus Walleij's avatar Linus Walleij

ARM: dts: nomadik: add DMA engine and some channels

This adds the DMA engine to the Nomadik and assigns the UART
DMA channels. Both slave DMA for UARTs and the memcpy engine
works fine, tested on the Nomadik NHK15.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent e249fc7d
...@@ -748,6 +748,9 @@ uart0: uart@101fd000 { ...@@ -748,6 +748,9 @@ uart0: uart@101fd000 {
clocks = <&uart0clk>, <&pclkuart0>; clocks = <&uart0clk>, <&pclkuart0>;
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
status = "disabled"; status = "disabled";
dmas = <&dmac0 14 1>,
<&dmac0 15 1>;
dma-names = "rx", "tx";
}; };
uart1: uart@101fb000 { uart1: uart@101fb000 {
...@@ -759,6 +762,9 @@ uart1: uart@101fb000 { ...@@ -759,6 +762,9 @@ uart1: uart@101fb000 {
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart1_default_mux>; pinctrl-0 = <&uart1_default_mux>;
dmas = <&dmac1 22 1>,
<&dmac1 23 1>;
dma-names = "rx", "tx";
}; };
uart2: uart@101f2000 { uart2: uart@101f2000 {
...@@ -769,6 +775,9 @@ uart2: uart@101f2000 { ...@@ -769,6 +775,9 @@ uart2: uart@101f2000 {
clocks = <&uart2clk>, <&pclkuart2>; clocks = <&uart2clk>, <&pclkuart2>;
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
status = "disabled"; status = "disabled";
dmas = <&dmac1 30 1>,
<&dmac1 31 1>;
dma-names = "rx", "tx";
}; };
rng: rng@101b0000 { rng: rng@101b0000 {
...@@ -813,5 +822,34 @@ mmcsd: sdi@101f6000 { ...@@ -813,5 +822,34 @@ mmcsd: sdi@101f6000 {
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
vmmc-supply = <&vmmc_regulator>; vmmc-supply = <&vmmc_regulator>;
}; };
dmac0: dma-controller@10130000 {
compatible = "arm,pl080", "arm,primecell";
reg = <0x10130000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <15>;
clocks = <&hclkdma0>;
clock-names = "apb_pclk";
lli-bus-interface-ahb1;
lli-bus-interface-ahb2;
mem-bus-interface-ahb2;
memcpy-burst-size = <256>;
memcpy-bus-width = <32>;
#dma-cells = <2>;
};
dmac1: dma-controller@10150000 {
compatible = "arm,pl080", "arm,primecell";
reg = <0x10150000 0x1000>;
interrupt-parent = <&vica>;
interrupts = <13>;
clocks = <&hclkdma1>;
clock-names = "apb_pclk";
lli-bus-interface-ahb1;
lli-bus-interface-ahb2;
mem-bus-interface-ahb2;
memcpy-burst-size = <256>;
memcpy-bus-width = <32>;
#dma-cells = <2>;
};
}; };
}; };
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