Commit a292f253 authored by Weili Qian's avatar Weili Qian Committed by Herbert Xu

crypto: hisilicon/qm - remove some unused defines

1. Remove some macros define since it is not used.
2. Remove enum QM_HW_UNKNOWN since it is not used.
3. Remove unused member 'is_frozen' in 'hisi_qm' structure.
Signed-off-by: default avatarWeili Qian <qianweili@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent c43cc882
...@@ -95,8 +95,6 @@ ...@@ -95,8 +95,6 @@
#define QM_VFT_CFG_RDY 0x10006c #define QM_VFT_CFG_RDY 0x10006c
#define QM_VFT_CFG_OP_WR 0x100058 #define QM_VFT_CFG_OP_WR 0x100058
#define QM_VFT_CFG_TYPE 0x10005c #define QM_VFT_CFG_TYPE 0x10005c
#define QM_SQC_VFT 0x0
#define QM_CQC_VFT 0x1
#define QM_VFT_CFG 0x100060 #define QM_VFT_CFG 0x100060
#define QM_VFT_CFG_OP_ENABLE 0x100054 #define QM_VFT_CFG_OP_ENABLE 0x100054
#define QM_PM_CTRL 0x100148 #define QM_PM_CTRL 0x100148
...@@ -164,7 +162,6 @@ ...@@ -164,7 +162,6 @@
/* interfunction communication */ /* interfunction communication */
#define QM_IFC_READY_STATUS 0x100128 #define QM_IFC_READY_STATUS 0x100128
#define QM_IFC_C_STS_M 0x10012C
#define QM_IFC_INT_SET_P 0x100130 #define QM_IFC_INT_SET_P 0x100130
#define QM_IFC_INT_CFG 0x100134 #define QM_IFC_INT_CFG 0x100134
#define QM_IFC_INT_SOURCE_P 0x100138 #define QM_IFC_INT_SOURCE_P 0x100138
...@@ -198,7 +195,6 @@ ...@@ -198,7 +195,6 @@
#define PCI_BAR_2 2 #define PCI_BAR_2 2
#define PCI_BAR_4 4 #define PCI_BAR_4 4
#define QM_SQE_DATA_ALIGN_MASK GENMASK(6, 0)
#define QMC_ALIGN(sz) ALIGN(sz, 32) #define QMC_ALIGN(sz) ALIGN(sz, 32)
#define QM_DBG_READ_LEN 256 #define QM_DBG_READ_LEN 256
...@@ -212,8 +208,6 @@ ...@@ -212,8 +208,6 @@
#define QM_DRIVER_REMOVING 0 #define QM_DRIVER_REMOVING 0
#define QM_RST_SCHED 1 #define QM_RST_SCHED 1
#define QM_QOS_PARAM_NUM 2 #define QM_QOS_PARAM_NUM 2
#define QM_QOS_VAL_NUM 1
#define QM_QOS_BDF_PARAM_NUM 4
#define QM_QOS_MAX_VAL 1000 #define QM_QOS_MAX_VAL 1000
#define QM_QOS_RATE 100 #define QM_QOS_RATE 100
#define QM_QOS_EXPAND_RATE 1000 #define QM_QOS_EXPAND_RATE 1000
...@@ -225,18 +219,14 @@ ...@@ -225,18 +219,14 @@
#define QM_SHAPER_FACTOR_CBS_B_SHIFT 15 #define QM_SHAPER_FACTOR_CBS_B_SHIFT 15
#define QM_SHAPER_FACTOR_CBS_S_SHIFT 19 #define QM_SHAPER_FACTOR_CBS_S_SHIFT 19
#define QM_SHAPER_CBS_B 1 #define QM_SHAPER_CBS_B 1
#define QM_SHAPER_CBS_S 16
#define QM_SHAPER_VFT_OFFSET 6 #define QM_SHAPER_VFT_OFFSET 6
#define WAIT_FOR_QOS_VF 100
#define QM_QOS_MIN_ERROR_RATE 5 #define QM_QOS_MIN_ERROR_RATE 5
#define QM_QOS_TYPICAL_NUM 8
#define QM_SHAPER_MIN_CBS_S 8 #define QM_SHAPER_MIN_CBS_S 8
#define QM_QOS_TICK 0x300U #define QM_QOS_TICK 0x300U
#define QM_QOS_DIVISOR_CLK 0x1f40U #define QM_QOS_DIVISOR_CLK 0x1f40U
#define QM_QOS_MAX_CIR_B 200 #define QM_QOS_MAX_CIR_B 200
#define QM_QOS_MIN_CIR_B 100 #define QM_QOS_MIN_CIR_B 100
#define QM_QOS_MAX_CIR_U 6 #define QM_QOS_MAX_CIR_U 6
#define QM_QOS_MAX_CIR_S 11
#define QM_AUTOSUSPEND_DELAY 3000 #define QM_AUTOSUSPEND_DELAY 3000
#define QM_MK_CQC_DW3_V1(hop_num, pg_sz, buf_sz, cqe_sz) \ #define QM_MK_CQC_DW3_V1(hop_num, pg_sz, buf_sz, cqe_sz) \
......
...@@ -122,7 +122,6 @@ enum qp_state { ...@@ -122,7 +122,6 @@ enum qp_state {
}; };
enum qm_hw_ver { enum qm_hw_ver {
QM_HW_UNKNOWN = -1,
QM_HW_V1 = 0x20, QM_HW_V1 = 0x20,
QM_HW_V2 = 0x21, QM_HW_V2 = 0x21,
QM_HW_V3 = 0x30, QM_HW_V3 = 0x30,
...@@ -332,7 +331,6 @@ struct hisi_qm { ...@@ -332,7 +331,6 @@ struct hisi_qm {
const char *algs; const char *algs;
bool use_sva; bool use_sva;
bool is_frozen;
resource_size_t phys_base; resource_size_t phys_base;
resource_size_t db_phys_base; resource_size_t db_phys_base;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment