Commit a2bc283f authored by Ben Skeggs's avatar Ben Skeggs

drm/nv50-/disp: initial work towards supporting external encoders

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 5a885f0b
...@@ -165,6 +165,7 @@ nouveau-y += core/engine/disp/hdanvd0.o ...@@ -165,6 +165,7 @@ nouveau-y += core/engine/disp/hdanvd0.o
nouveau-y += core/engine/disp/hdminv84.o nouveau-y += core/engine/disp/hdminv84.o
nouveau-y += core/engine/disp/hdminva3.o nouveau-y += core/engine/disp/hdminva3.o
nouveau-y += core/engine/disp/hdminvd0.o nouveau-y += core/engine/disp/hdminvd0.o
nouveau-y += core/engine/disp/piornv50.o
nouveau-y += core/engine/disp/sornv50.o nouveau-y += core/engine/disp/sornv50.o
nouveau-y += core/engine/disp/sornv94.o nouveau-y += core/engine/disp/sornv94.o
nouveau-y += core/engine/disp/sornvd0.o nouveau-y += core/engine/disp/sornvd0.o
......
...@@ -70,6 +70,7 @@ struct nouveau_dp_func { ...@@ -70,6 +70,7 @@ struct nouveau_dp_func {
extern const struct nouveau_dp_func nv94_sor_dp_func; extern const struct nouveau_dp_func nv94_sor_dp_func;
extern const struct nouveau_dp_func nvd0_sor_dp_func; extern const struct nouveau_dp_func nvd0_sor_dp_func;
extern const struct nouveau_dp_func nv50_pior_dp_func;
int nouveau_dp_train(struct nouveau_disp *, const struct nouveau_dp_func *, int nouveau_dp_train(struct nouveau_disp *, const struct nouveau_dp_func *,
struct dcb_output *, int, u32); struct dcb_output *, int, u32);
......
...@@ -678,6 +678,9 @@ nv50_disp_base_omthds[] = { ...@@ -678,6 +678,9 @@ nv50_disp_base_omthds[] = {
{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd }, { SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },
{ DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd },
{ DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_TMDS_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_DP_PWR) , nv50_pior_mthd },
{}, {},
}; };
...@@ -1227,9 +1230,12 @@ nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -1227,9 +1230,12 @@ nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
priv->head.nr = 2; priv->head.nr = 2;
priv->dac.nr = 3; priv->dac.nr = 3;
priv->sor.nr = 2; priv->sor.nr = 2;
priv->pior.nr = 3;
priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power;
priv->dac.sense = nv50_dac_sense; priv->dac.sense = nv50_dac_sense;
priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power;
priv->pior.power = nv50_pior_power;
priv->pior.dp = &nv50_pior_dp_func;
return 0; return 0;
} }
......
...@@ -35,6 +35,12 @@ struct nv50_disp_priv { ...@@ -35,6 +35,12 @@ struct nv50_disp_priv {
u32 lvdsconf; u32 lvdsconf;
const struct nouveau_dp_func *dp; const struct nouveau_dp_func *dp;
} sor; } sor;
struct {
int nr;
int (*power)(struct nv50_disp_priv *, int ext, u32 data);
u8 type[3];
const struct nouveau_dp_func *dp;
} pior;
}; };
#define DAC_MTHD(n) (n), (n) + 0x03 #define DAC_MTHD(n) (n), (n) + 0x03
...@@ -73,6 +79,11 @@ int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32, ...@@ -73,6 +79,11 @@ int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32, int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
struct dcb_output *); struct dcb_output *);
#define PIOR_MTHD(n) (n), (n) + 0x03
int nv50_pior_mthd(struct nouveau_object *, u32, void *, u32);
int nv50_pior_power(struct nv50_disp_priv *, int, u32);
struct nv50_disp_base { struct nv50_disp_base {
struct nouveau_parent base; struct nouveau_parent base;
struct nouveau_ramht *ramht; struct nouveau_ramht *ramht;
......
...@@ -46,6 +46,9 @@ nv84_disp_base_omthds[] = { ...@@ -46,6 +46,9 @@ nv84_disp_base_omthds[] = {
{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd }, { SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },
{ DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd },
{ DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_TMDS_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_DP_PWR) , nv50_pior_mthd },
{}, {},
}; };
...@@ -77,10 +80,13 @@ nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -77,10 +80,13 @@ nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
priv->head.nr = 2; priv->head.nr = 2;
priv->dac.nr = 3; priv->dac.nr = 3;
priv->sor.nr = 2; priv->sor.nr = 2;
priv->pior.nr = 3;
priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power;
priv->dac.sense = nv50_dac_sense; priv->dac.sense = nv50_dac_sense;
priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power;
priv->sor.hdmi = nv84_hdmi_ctrl; priv->sor.hdmi = nv84_hdmi_ctrl;
priv->pior.power = nv50_pior_power;
priv->pior.dp = &nv50_pior_dp_func;
return 0; return 0;
} }
......
...@@ -46,6 +46,9 @@ nv94_disp_base_omthds[] = { ...@@ -46,6 +46,9 @@ nv94_disp_base_omthds[] = {
{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd }, { SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },
{ DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd },
{ DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_TMDS_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_DP_PWR) , nv50_pior_mthd },
{}, {},
}; };
...@@ -77,11 +80,14 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -77,11 +80,14 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
priv->head.nr = 2; priv->head.nr = 2;
priv->dac.nr = 3; priv->dac.nr = 3;
priv->sor.nr = 4; priv->sor.nr = 4;
priv->pior.nr = 3;
priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power;
priv->dac.sense = nv50_dac_sense; priv->dac.sense = nv50_dac_sense;
priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power;
priv->sor.hdmi = nv84_hdmi_ctrl; priv->sor.hdmi = nv84_hdmi_ctrl;
priv->sor.dp = &nv94_sor_dp_func; priv->sor.dp = &nv94_sor_dp_func;
priv->pior.power = nv50_pior_power;
priv->pior.dp = &nv50_pior_dp_func;
return 0; return 0;
} }
......
...@@ -67,10 +67,13 @@ nva0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -67,10 +67,13 @@ nva0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
priv->head.nr = 2; priv->head.nr = 2;
priv->dac.nr = 3; priv->dac.nr = 3;
priv->sor.nr = 2; priv->sor.nr = 2;
priv->pior.nr = 3;
priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power;
priv->dac.sense = nv50_dac_sense; priv->dac.sense = nv50_dac_sense;
priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power;
priv->sor.hdmi = nv84_hdmi_ctrl; priv->sor.hdmi = nv84_hdmi_ctrl;
priv->pior.power = nv50_pior_power;
priv->pior.dp = &nv50_pior_dp_func;
return 0; return 0;
} }
......
...@@ -47,6 +47,9 @@ nva3_disp_base_omthds[] = { ...@@ -47,6 +47,9 @@ nva3_disp_base_omthds[] = {
{ SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd }, { SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },
{ DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd },
{ DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd }, { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_TMDS_PWR) , nv50_pior_mthd },
{ PIOR_MTHD(NV50_DISP_PIOR_DP_PWR) , nv50_pior_mthd },
{}, {},
}; };
...@@ -78,12 +81,15 @@ nva3_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -78,12 +81,15 @@ nva3_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
priv->head.nr = 2; priv->head.nr = 2;
priv->dac.nr = 3; priv->dac.nr = 3;
priv->sor.nr = 4; priv->sor.nr = 4;
priv->pior.nr = 3;
priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power;
priv->dac.sense = nv50_dac_sense; priv->dac.sense = nv50_dac_sense;
priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power;
priv->sor.hda_eld = nva3_hda_eld; priv->sor.hda_eld = nva3_hda_eld;
priv->sor.hdmi = nva3_hdmi_ctrl; priv->sor.hdmi = nva3_hdmi_ctrl;
priv->sor.dp = &nv94_sor_dp_func; priv->sor.dp = &nv94_sor_dp_func;
priv->pior.power = nv50_pior_power;
priv->pior.dp = &nv50_pior_dp_func;
return 0; return 0;
} }
......
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <core/os.h>
#include <core/class.h>
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/timer.h>
#include <subdev/i2c.h>
#include "nv50.h"
/******************************************************************************
* DisplayPort
*****************************************************************************/
static struct nouveau_i2c_port *
nv50_pior_dp_find(struct nouveau_disp *disp, struct dcb_output *outp)
{
struct nouveau_i2c *i2c = nouveau_i2c(disp);
return i2c->find_type(i2c, NV_I2C_TYPE_EXTAUX(outp->extdev));
}
static int
nv50_pior_dp_pattern(struct nouveau_disp *disp, struct dcb_output *outp,
int head, int pattern)
{
struct nouveau_i2c_port *port;
int ret = -EINVAL;
port = nv50_pior_dp_find(disp, outp);
if (port) {
if (port->func->pattern)
ret = port->func->pattern(port, pattern);
else
ret = 0;
}
return ret;
}
static int
nv50_pior_dp_lnk_ctl(struct nouveau_disp *disp, struct dcb_output *outp,
int head, int lane_nr, int link_bw, bool enh)
{
struct nouveau_i2c_port *port;
int ret = -EINVAL;
port = nv50_pior_dp_find(disp, outp);
if (port && port->func->lnk_ctl)
ret = port->func->lnk_ctl(port, lane_nr, link_bw, enh);
return ret;
}
static int
nv50_pior_dp_drv_ctl(struct nouveau_disp *disp, struct dcb_output *outp,
int head, int lane, int vsw, int pre)
{
struct nouveau_i2c_port *port;
int ret = -EINVAL;
port = nv50_pior_dp_find(disp, outp);
if (port) {
if (port->func->drv_ctl)
ret = port->func->drv_ctl(port, lane, vsw, pre);
else
ret = 0;
}
return ret;
}
const struct nouveau_dp_func
nv50_pior_dp_func = {
.pattern = nv50_pior_dp_pattern,
.lnk_ctl = nv50_pior_dp_lnk_ctl,
.drv_ctl = nv50_pior_dp_drv_ctl,
};
/******************************************************************************
* General PIOR handling
*****************************************************************************/
int
nv50_pior_power(struct nv50_disp_priv *priv, int or, u32 data)
{
const u32 stat = data & NV50_DISP_PIOR_PWR_STATE;
const u32 soff = (or * 0x800);
nv_wait(priv, 0x61e004 + soff, 0x80000000, 0x00000000);
nv_mask(priv, 0x61e004 + soff, 0x80000101, 0x80000000 | stat);
nv_wait(priv, 0x61e004 + soff, 0x80000000, 0x00000000);
return 0;
}
int
nv50_pior_mthd(struct nouveau_object *object, u32 mthd, void *args, u32 size)
{
struct nv50_disp_priv *priv = (void *)object->engine;
const u8 type = (mthd & NV50_DISP_PIOR_MTHD_TYPE) >> 12;
const u8 or = (mthd & NV50_DISP_PIOR_MTHD_OR);
u32 *data = args;
int ret;
if (size < sizeof(u32))
return -EINVAL;
mthd &= ~NV50_DISP_PIOR_MTHD_TYPE;
mthd &= ~NV50_DISP_PIOR_MTHD_OR;
switch (mthd) {
case NV50_DISP_PIOR_PWR:
ret = priv->pior.power(priv, or, data[0]);
priv->pior.type[or] = type;
break;
default:
return -EINVAL;
}
return ret;
}
...@@ -219,6 +219,23 @@ struct nv04_display_class { ...@@ -219,6 +219,23 @@ struct nv04_display_class {
#define NV50_DISP_DAC_LOAD 0x0002000c #define NV50_DISP_DAC_LOAD 0x0002000c
#define NV50_DISP_DAC_LOAD_VALUE 0x00000007 #define NV50_DISP_DAC_LOAD_VALUE 0x00000007
#define NV50_DISP_PIOR_MTHD 0x00030000
#define NV50_DISP_PIOR_MTHD_TYPE 0x0000f000
#define NV50_DISP_PIOR_MTHD_OR 0x00000003
#define NV50_DISP_PIOR_PWR 0x00030000
#define NV50_DISP_PIOR_PWR_STATE 0x00000001
#define NV50_DISP_PIOR_PWR_STATE_ON 0x00000001
#define NV50_DISP_PIOR_PWR_STATE_OFF 0x00000000
#define NV50_DISP_PIOR_TMDS_PWR 0x00032000
#define NV50_DISP_PIOR_TMDS_PWR_STATE 0x00000001
#define NV50_DISP_PIOR_TMDS_PWR_STATE_ON 0x00000001
#define NV50_DISP_PIOR_TMDS_PWR_STATE_OFF 0x00000000
#define NV50_DISP_PIOR_DP_PWR 0x00036000
#define NV50_DISP_PIOR_DP_PWR_STATE 0x00000001
#define NV50_DISP_PIOR_DP_PWR_STATE_ON 0x00000001
#define NV50_DISP_PIOR_DP_PWR_STATE_OFF 0x00000000
struct nv50_display_class { struct nv50_display_class {
}; };
......
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