Commit a305cc2f authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Gregory CLEMENT

ARM: dts: mvebu: fix reference to a390 spi controller

The SPI controller in the arch/arm/boot/dts/armada-39x.dtsi file has moved
to a different location in the hierarchy, which breaks the overrides
in the board specific file:

Warning (reg_format): "reg" property in /soc/internal-regs/spi@10680/spi-flash@1 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/internal-regs/spi@10680/spi-flash@1

This changes the board to reference the spi controller by its label
(which has not changed) rather than the full path.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Fixes: 0160a4b6 ("ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node")
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 4c0437d0
......@@ -66,36 +66,6 @@ soc {
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
internal-regs {
spi@10680 {
status = "okay";
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
spi-flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13",
"jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x400000>;
};
partition@400000 {
label = "Filesystem";
reg = <0x400000 0xc00000>;
};
};
};
};
i2c@11000 {
status = "okay";
clock-frequency = <100000>;
......@@ -173,3 +143,33 @@ pcie@3,0 {
};
};
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
spi-flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13",
"jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x400000>;
};
partition@400000 {
label = "Filesystem";
reg = <0x400000 0xc00000>;
};
};
};
};
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