Commit a33c89db authored by Pratyush Yadav's avatar Pratyush Yadav Committed by Vignesh Raghavendra

mtd: spi-nor: core: enable octal DTR mode when possible

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.
Signed-off-by: default avatarPratyush Yadav <p.yadav@ti.com>
Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201005153138.6437-11-p.yadav@ti.com
parent 981a8d60
...@@ -3067,6 +3067,38 @@ static int spi_nor_init_params(struct spi_nor *nor) ...@@ -3067,6 +3067,38 @@ static int spi_nor_init_params(struct spi_nor *nor)
return 0; return 0;
} }
/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
* @nor: pointer to a 'struct spi_nor'
* @enable: whether to enable or disable Octal DTR
*
* Return: 0 on success, -errno otherwise.
*/
static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
{
int ret;
if (!nor->params->octal_dtr_enable)
return 0;
if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
nor->write_proto == SNOR_PROTO_8_8_8_DTR))
return 0;
if (!(nor->flags & SNOR_F_IO_MODE_EN_VOLATILE))
return 0;
ret = nor->params->octal_dtr_enable(nor, enable);
if (ret)
return ret;
if (enable)
nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
else
nor->reg_proto = SNOR_PROTO_1_1_1;
return 0;
}
/** /**
* spi_nor_quad_enable() - enable Quad I/O if needed. * spi_nor_quad_enable() - enable Quad I/O if needed.
* @nor: pointer to a 'struct spi_nor' * @nor: pointer to a 'struct spi_nor'
...@@ -3106,6 +3138,12 @@ static int spi_nor_init(struct spi_nor *nor) ...@@ -3106,6 +3138,12 @@ static int spi_nor_init(struct spi_nor *nor)
{ {
int err; int err;
err = spi_nor_octal_dtr_enable(nor, true);
if (err) {
dev_dbg(nor->dev, "octal mode not supported\n");
return err;
}
err = spi_nor_quad_enable(nor); err = spi_nor_quad_enable(nor);
if (err) { if (err) {
dev_dbg(nor->dev, "quad mode not supported\n"); dev_dbg(nor->dev, "quad mode not supported\n");
......
...@@ -204,6 +204,7 @@ struct spi_nor_locking_ops { ...@@ -204,6 +204,7 @@ struct spi_nor_locking_ops {
* higher index in the array, the higher priority. * higher index in the array, the higher priority.
* @erase_map: the erase map parsed from the SFDP Sector Map Parameter * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
* Table. * Table.
* @octal_dtr_enable: enables SPI NOR octal DTR mode.
* @quad_enable: enables SPI NOR quad mode. * @quad_enable: enables SPI NOR quad mode.
* @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
* @convert_addr: converts an absolute address into something the flash * @convert_addr: converts an absolute address into something the flash
...@@ -227,6 +228,7 @@ struct spi_nor_flash_parameter { ...@@ -227,6 +228,7 @@ struct spi_nor_flash_parameter {
struct spi_nor_erase_map erase_map; struct spi_nor_erase_map erase_map;
int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
int (*quad_enable)(struct spi_nor *nor); int (*quad_enable)(struct spi_nor *nor);
int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
u32 (*convert_addr)(struct spi_nor *nor, u32 addr); u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
......
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