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Commit a3a42460 authored by Mark Brown's avatar Mark Brown
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Merge remote-tracking branches 'spi/topic/cadence', 'spi/topic/dt',... 

Merge remote-tracking branches 'spi/topic/cadence', 'spi/topic/dt', 'spi/topic/ep93xx' and 'spi/topic/falcon' into spi-next
parents 45cfc32b 80274089 25c56c88 d9a01771 1a41aa13
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Showing with 193 additions and 348 deletions
drivers/spi/spi-cadence.c
View file @ a3a42460
...@@ -576,10 +576,10 @@ static int cdns_spi_probe(struct platform_device *pdev) ...@@ -576,10 +576,10 @@ static int cdns_spi_probe(struct platform_device *pdev)
goto clk_dis_apb; goto clk_dis_apb;
} }
pm_runtime_enable(&pdev->dev);
pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
pm_runtime_set_active(&pdev->dev); pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
if (ret < 0) if (ret < 0)
...@@ -704,7 +704,9 @@ static int __maybe_unused cdns_spi_resume(struct device *dev) ...@@ -704,7 +704,9 @@ static int __maybe_unused cdns_spi_resume(struct device *dev)
{ {
struct platform_device *pdev = to_platform_device(dev); struct platform_device *pdev = to_platform_device(dev);
struct spi_master *master = platform_get_drvdata(pdev); struct spi_master *master = platform_get_drvdata(pdev);
struct cdns_spi *xspi = spi_master_get_devdata(master);
cdns_spi_init_hw(xspi);
return spi_master_resume(master); return spi_master_resume(master);
} }
......
drivers/spi/spi-ep93xx.c
View file @ a3a42460
...@@ -70,12 +70,9 @@ ...@@ -70,12 +70,9 @@
/** /**
* struct ep93xx_spi - EP93xx SPI controller structure * struct ep93xx_spi - EP93xx SPI controller structure
* @pdev: pointer to platform device
* @clk: clock for the controller * @clk: clock for the controller
* @regs_base: pointer to ioremap()'d registers * @mmio: pointer to ioremap()'d registers
* @sspdr_phys: physical address of the SSPDR register * @sspdr_phys: physical address of the SSPDR register
* @wait: wait here until given transfer is completed
* @current_msg: message that is currently processed (or %NULL if none)
* @tx: current byte in transfer to transmit * @tx: current byte in transfer to transmit
* @rx: current byte in transfer to receive * @rx: current byte in transfer to receive
* @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one * @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one
...@@ -90,12 +87,9 @@ ...@@ -90,12 +87,9 @@
* the client * the client
*/ */
struct ep93xx_spi { struct ep93xx_spi {
const struct platform_device *pdev;
struct clk *clk; struct clk *clk;
void __iomem *regs_base; void __iomem *mmio;
unsigned long sspdr_phys; unsigned long sspdr_phys;
struct completion wait;
struct spi_message *current_msg;
size_t tx; size_t tx;
size_t rx; size_t rx;
size_t fifo_level; size_t fifo_level;
...@@ -111,91 +105,23 @@ struct ep93xx_spi { ...@@ -111,91 +105,23 @@ struct ep93xx_spi {
/* converts bits per word to CR0.DSS value */ /* converts bits per word to CR0.DSS value */
#define bits_per_word_to_dss(bpw) ((bpw) - 1) #define bits_per_word_to_dss(bpw) ((bpw) - 1)
static void ep93xx_spi_write_u8(const struct ep93xx_spi *espi,
u16 reg, u8 value)
{
writeb(value, espi->regs_base + reg);
}
static u8 ep93xx_spi_read_u8(const struct ep93xx_spi *spi, u16 reg)
{
return readb(spi->regs_base + reg);
}
static void ep93xx_spi_write_u16(const struct ep93xx_spi *espi,
u16 reg, u16 value)
{
writew(value, espi->regs_base + reg);
}
static u16 ep93xx_spi_read_u16(const struct ep93xx_spi *spi, u16 reg)
{
return readw(spi->regs_base + reg);
}
static int ep93xx_spi_enable(const struct ep93xx_spi *espi)
{
u8 regval;
int err;
err = clk_enable(espi->clk);
if (err)
return err;
regval = ep93xx_spi_read_u8(espi, SSPCR1);
regval |= SSPCR1_SSE;
ep93xx_spi_write_u8(espi, SSPCR1, regval);
return 0;
}
static void ep93xx_spi_disable(const struct ep93xx_spi *espi)
{
u8 regval;
regval = ep93xx_spi_read_u8(espi, SSPCR1);
regval &= ~SSPCR1_SSE;
ep93xx_spi_write_u8(espi, SSPCR1, regval);
clk_disable(espi->clk);
}
static void ep93xx_spi_enable_interrupts(const struct ep93xx_spi *espi)
{
u8 regval;
regval = ep93xx_spi_read_u8(espi, SSPCR1);
regval |= (SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE);
ep93xx_spi_write_u8(espi, SSPCR1, regval);
}
static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi)
{
u8 regval;
regval = ep93xx_spi_read_u8(espi, SSPCR1);
regval &= ~(SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE);
ep93xx_spi_write_u8(espi, SSPCR1, regval);
}
/** /**
* ep93xx_spi_calc_divisors() - calculates SPI clock divisors * ep93xx_spi_calc_divisors() - calculates SPI clock divisors
* @espi: ep93xx SPI controller struct * @master: SPI master
* @rate: desired SPI output clock rate * @rate: desired SPI output clock rate
* @div_cpsr: pointer to return the cpsr (pre-scaler) divider * @div_cpsr: pointer to return the cpsr (pre-scaler) divider
* @div_scr: pointer to return the scr divider * @div_scr: pointer to return the scr divider
*/ */
static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, static int ep93xx_spi_calc_divisors(struct spi_master *master,
u32 rate, u8 *div_cpsr, u8 *div_scr) u32 rate, u8 *div_cpsr, u8 *div_scr)
{ {
struct spi_master *master = platform_get_drvdata(espi->pdev); struct ep93xx_spi *espi = spi_master_get_devdata(master);
unsigned long spi_clk_rate = clk_get_rate(espi->clk); unsigned long spi_clk_rate = clk_get_rate(espi->clk);
int cpsr, scr; int cpsr, scr;
/* /*
* Make sure that max value is between values supported by the * Make sure that max value is between values supported by the
* controller. Note that minimum value is already checked in * controller.
* ep93xx_spi_transfer_one_message().
*/ */
rate = clamp(rate, master->min_speed_hz, master->max_speed_hz); rate = clamp(rate, master->min_speed_hz, master->max_speed_hz);
...@@ -220,26 +146,18 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, ...@@ -220,26 +146,18 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
return -EINVAL; return -EINVAL;
} }
static void ep93xx_spi_cs_control(struct spi_device *spi, bool enable) static int ep93xx_spi_chip_setup(struct spi_master *master,
{
if (spi->mode & SPI_CS_HIGH)
enable = !enable;
if (gpio_is_valid(spi->cs_gpio))
gpio_set_value(spi->cs_gpio, !enable);
}
static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
struct spi_device *spi, struct spi_device *spi,
struct spi_transfer *xfer) struct spi_transfer *xfer)
{ {
struct ep93xx_spi *espi = spi_master_get_devdata(master);
u8 dss = bits_per_word_to_dss(xfer->bits_per_word); u8 dss = bits_per_word_to_dss(xfer->bits_per_word);
u8 div_cpsr = 0; u8 div_cpsr = 0;
u8 div_scr = 0; u8 div_scr = 0;
u16 cr0; u16 cr0;
int err; int err;
err = ep93xx_spi_calc_divisors(espi, xfer->speed_hz, err = ep93xx_spi_calc_divisors(master, xfer->speed_hz,
&div_cpsr, &div_scr); &div_cpsr, &div_scr);
if (err) if (err)
return err; return err;
...@@ -248,51 +166,49 @@ static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi, ...@@ -248,51 +166,49 @@ static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT; cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT;
cr0 |= dss; cr0 |= dss;
dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", dev_dbg(&master->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
spi->mode, div_cpsr, div_scr, dss); spi->mode, div_cpsr, div_scr, dss);
dev_dbg(&espi->pdev->dev, "setup: cr0 %#x\n", cr0); dev_dbg(&master->dev, "setup: cr0 %#x\n", cr0);
ep93xx_spi_write_u8(espi, SSPCPSR, div_cpsr); writel(div_cpsr, espi->mmio + SSPCPSR);
ep93xx_spi_write_u16(espi, SSPCR0, cr0); writel(cr0, espi->mmio + SSPCR0);
return 0; return 0;
} }
static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t) static void ep93xx_do_write(struct spi_master *master)
{ {
if (t->bits_per_word > 8) { struct ep93xx_spi *espi = spi_master_get_devdata(master);
u16 tx_val = 0; struct spi_transfer *xfer = master->cur_msg->state;
u32 val = 0;
if (t->tx_buf) if (xfer->bits_per_word > 8) {
tx_val = ((u16 *)t->tx_buf)[espi->tx]; if (xfer->tx_buf)
ep93xx_spi_write_u16(espi, SSPDR, tx_val); val = ((u16 *)xfer->tx_buf)[espi->tx];
espi->tx += sizeof(tx_val); espi->tx += 2;
} else { } else {
u8 tx_val = 0; if (xfer->tx_buf)
val = ((u8 *)xfer->tx_buf)[espi->tx];
if (t->tx_buf) espi->tx += 1;
tx_val = ((u8 *)t->tx_buf)[espi->tx];
ep93xx_spi_write_u8(espi, SSPDR, tx_val);
espi->tx += sizeof(tx_val);
} }
writel(val, espi->mmio + SSPDR);
} }
static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t) static void ep93xx_do_read(struct spi_master *master)
{ {
if (t->bits_per_word > 8) { struct ep93xx_spi *espi = spi_master_get_devdata(master);
u16 rx_val; struct spi_transfer *xfer = master->cur_msg->state;
u32 val;
rx_val = ep93xx_spi_read_u16(espi, SSPDR);
if (t->rx_buf) val = readl(espi->mmio + SSPDR);
((u16 *)t->rx_buf)[espi->rx] = rx_val; if (xfer->bits_per_word > 8) {
espi->rx += sizeof(rx_val); if (xfer->rx_buf)
((u16 *)xfer->rx_buf)[espi->rx] = val;
espi->rx += 2;
} else { } else {
u8 rx_val; if (xfer->rx_buf)
((u8 *)xfer->rx_buf)[espi->rx] = val;
rx_val = ep93xx_spi_read_u8(espi, SSPDR); espi->rx += 1;
if (t->rx_buf)
((u8 *)t->rx_buf)[espi->rx] = rx_val;
espi->rx += sizeof(rx_val);
} }
} }
...@@ -307,44 +223,32 @@ static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t) ...@@ -307,44 +223,32 @@ static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t)
* When this function is finished, RX FIFO should be empty and TX FIFO should be * When this function is finished, RX FIFO should be empty and TX FIFO should be
* full. * full.
*/ */
static int ep93xx_spi_read_write(struct ep93xx_spi *espi) static int ep93xx_spi_read_write(struct spi_master *master)
{ {
struct spi_message *msg = espi->current_msg; struct ep93xx_spi *espi = spi_master_get_devdata(master);
struct spi_transfer *t = msg->state; struct spi_transfer *xfer = master->cur_msg->state;
/* read as long as RX FIFO has frames in it */ /* read as long as RX FIFO has frames in it */
while ((ep93xx_spi_read_u8(espi, SSPSR) & SSPSR_RNE)) { while ((readl(espi->mmio + SSPSR) & SSPSR_RNE)) {
ep93xx_do_read(espi, t); ep93xx_do_read(master);
espi->fifo_level--; espi->fifo_level--;
} }
/* write as long as TX FIFO has room */ /* write as long as TX FIFO has room */
while (espi->fifo_level < SPI_FIFO_SIZE && espi->tx < t->len) { while (espi->fifo_level < SPI_FIFO_SIZE && espi->tx < xfer->len) {
ep93xx_do_write(espi, t); ep93xx_do_write(master);
espi->fifo_level++; espi->fifo_level++;
} }
if (espi->rx == t->len) if (espi->rx == xfer->len)
return 0; return 0;
return -EINPROGRESS; return -EINPROGRESS;
} }
static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
{
/*
* Now everything is set up for the current transfer. We prime the TX
* FIFO, enable interrupts, and wait for the transfer to complete.
*/
if (ep93xx_spi_read_write(espi)) {
ep93xx_spi_enable_interrupts(espi);
wait_for_completion(&espi->wait);
}
}
/** /**
* ep93xx_spi_dma_prepare() - prepares a DMA transfer * ep93xx_spi_dma_prepare() - prepares a DMA transfer
* @espi: ep93xx SPI controller struct * @master: SPI master
* @dir: DMA transfer direction * @dir: DMA transfer direction
* *
* Function configures the DMA, maps the buffer and prepares the DMA * Function configures the DMA, maps the buffer and prepares the DMA
...@@ -352,9 +256,11 @@ static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi) ...@@ -352,9 +256,11 @@ static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
* in case of failure. * in case of failure.
*/ */
static struct dma_async_tx_descriptor * static struct dma_async_tx_descriptor *
ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) ep93xx_spi_dma_prepare(struct spi_master *master,
enum dma_transfer_direction dir)
{ {
struct spi_transfer *t = espi->current_msg->state; struct ep93xx_spi *espi = spi_master_get_devdata(master);
struct spi_transfer *xfer = master->cur_msg->state;
struct dma_async_tx_descriptor *txd; struct dma_async_tx_descriptor *txd;
enum dma_slave_buswidth buswidth; enum dma_slave_buswidth buswidth;
struct dma_slave_config conf; struct dma_slave_config conf;
...@@ -362,10 +268,10 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) ...@@ -362,10 +268,10 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
struct sg_table *sgt; struct sg_table *sgt;
struct dma_chan *chan; struct dma_chan *chan;
const void *buf, *pbuf; const void *buf, *pbuf;
size_t len = t->len; size_t len = xfer->len;
int i, ret, nents; int i, ret, nents;
if (t->bits_per_word > 8) if (xfer->bits_per_word > 8)
buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES; buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
else else
buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE; buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE;
...@@ -375,14 +281,14 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) ...@@ -375,14 +281,14 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
if (dir == DMA_DEV_TO_MEM) { if (dir == DMA_DEV_TO_MEM) {
chan = espi->dma_rx; chan = espi->dma_rx;
buf = t->rx_buf; buf = xfer->rx_buf;
sgt = &espi->rx_sgt; sgt = &espi->rx_sgt;
conf.src_addr = espi->sspdr_phys; conf.src_addr = espi->sspdr_phys;
conf.src_addr_width = buswidth; conf.src_addr_width = buswidth;
} else { } else {
chan = espi->dma_tx; chan = espi->dma_tx;
buf = t->tx_buf; buf = xfer->tx_buf;
sgt = &espi->tx_sgt; sgt = &espi->tx_sgt;
conf.dst_addr = espi->sspdr_phys; conf.dst_addr = espi->sspdr_phys;
...@@ -429,7 +335,7 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) ...@@ -429,7 +335,7 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
} }
if (WARN_ON(len)) { if (WARN_ON(len)) {
dev_warn(&espi->pdev->dev, "len = %zu expected 0!\n", len); dev_warn(&master->dev, "len = %zu expected 0!\n", len);
return ERR_PTR(-EINVAL); return ERR_PTR(-EINVAL);
} }
...@@ -447,15 +353,16 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) ...@@ -447,15 +353,16 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
/** /**
* ep93xx_spi_dma_finish() - finishes with a DMA transfer * ep93xx_spi_dma_finish() - finishes with a DMA transfer
* @espi: ep93xx SPI controller struct * @master: SPI master
* @dir: DMA transfer direction * @dir: DMA transfer direction
* *
* Function finishes with the DMA transfer. After this, the DMA buffer is * Function finishes with the DMA transfer. After this, the DMA buffer is
* unmapped. * unmapped.
*/ */
static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi, static void ep93xx_spi_dma_finish(struct spi_master *master,
enum dma_transfer_direction dir) enum dma_transfer_direction dir)
{ {
struct ep93xx_spi *espi = spi_master_get_devdata(master);
struct dma_chan *chan; struct dma_chan *chan;
struct sg_table *sgt; struct sg_table *sgt;
...@@ -472,72 +379,107 @@ static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi, ...@@ -472,72 +379,107 @@ static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi,
static void ep93xx_spi_dma_callback(void *callback_param) static void ep93xx_spi_dma_callback(void *callback_param)
{ {
complete(callback_param); struct spi_master *master = callback_param;
ep93xx_spi_dma_finish(master, DMA_MEM_TO_DEV);
ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
spi_finalize_current_transfer(master);
} }
static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi) static int ep93xx_spi_dma_transfer(struct spi_master *master)
{ {
struct spi_message *msg = espi->current_msg; struct ep93xx_spi *espi = spi_master_get_devdata(master);
struct dma_async_tx_descriptor *rxd, *txd; struct dma_async_tx_descriptor *rxd, *txd;
rxd = ep93xx_spi_dma_prepare(espi, DMA_DEV_TO_MEM); rxd = ep93xx_spi_dma_prepare(master, DMA_DEV_TO_MEM);
if (IS_ERR(rxd)) { if (IS_ERR(rxd)) {
dev_err(&espi->pdev->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd)); dev_err(&master->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
msg->status = PTR_ERR(rxd); return PTR_ERR(rxd);
return;
} }
txd = ep93xx_spi_dma_prepare(espi, DMA_MEM_TO_DEV); txd = ep93xx_spi_dma_prepare(master, DMA_MEM_TO_DEV);
if (IS_ERR(txd)) { if (IS_ERR(txd)) {
ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM); ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
dev_err(&espi->pdev->dev, "DMA TX failed: %ld\n", PTR_ERR(txd)); dev_err(&master->dev, "DMA TX failed: %ld\n", PTR_ERR(txd));
msg->status = PTR_ERR(txd); return PTR_ERR(txd);
return;
} }
/* We are ready when RX is done */ /* We are ready when RX is done */
rxd->callback = ep93xx_spi_dma_callback; rxd->callback = ep93xx_spi_dma_callback;
rxd->callback_param = &espi->wait; rxd->callback_param = master;
/* Now submit both descriptors and wait while they finish */ /* Now submit both descriptors and start DMA */
dmaengine_submit(rxd); dmaengine_submit(rxd);
dmaengine_submit(txd); dmaengine_submit(txd);
dma_async_issue_pending(espi->dma_rx); dma_async_issue_pending(espi->dma_rx);
dma_async_issue_pending(espi->dma_tx); dma_async_issue_pending(espi->dma_tx);
wait_for_completion(&espi->wait); /* signal that we need to wait for completion */
return 1;
ep93xx_spi_dma_finish(espi, DMA_MEM_TO_DEV);
ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM);
} }
/** static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
* ep93xx_spi_process_transfer() - processes one SPI transfer
* @espi: ep93xx SPI controller struct
* @msg: current message
* @t: transfer to process
*
* This function processes one SPI transfer given in @t. Function waits until
* transfer is complete (may sleep) and updates @msg->status based on whether
* transfer was successfully processed or not.
*/
static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
struct spi_message *msg,
struct spi_transfer *t)
{ {
int err; struct spi_master *master = dev_id;
struct ep93xx_spi *espi = spi_master_get_devdata(master);
u32 val;
/*
* If we got ROR (receive overrun) interrupt we know that something is
* wrong. Just abort the message.
*/
if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) {
/* clear the overrun interrupt */
writel(0, espi->mmio + SSPICR);
dev_warn(&master->dev,
"receive overrun, aborting the message\n");
master->cur_msg->status = -EIO;
} else {
/*
* Interrupt is either RX (RIS) or TX (TIS). For both cases we
* simply execute next data transfer.
*/
if (ep93xx_spi_read_write(master)) {
/*
* In normal case, there still is some processing left
* for current transfer. Let's wait for the next
* interrupt then.
*/
return IRQ_HANDLED;
}
}
msg->state = t; /*
* Current transfer is finished, either with error or with success. In
* any case we disable interrupts and notify the worker to handle
* any post-processing of the message.
*/
val = readl(espi->mmio + SSPCR1);
val &= ~(SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE);
writel(val, espi->mmio + SSPCR1);
spi_finalize_current_transfer(master);
return IRQ_HANDLED;
}
err = ep93xx_spi_chip_setup(espi, msg->spi, t); static int ep93xx_spi_transfer_one(struct spi_master *master,
if (err) { struct spi_device *spi,
dev_err(&espi->pdev->dev, struct spi_transfer *xfer)
"failed to setup chip for transfer\n"); {
msg->status = err; struct ep93xx_spi *espi = spi_master_get_devdata(master);
return; u32 val;
int ret;
ret = ep93xx_spi_chip_setup(master, spi, xfer);
if (ret) {
dev_err(&master->dev, "failed to setup chip for transfer\n");
return ret;
} }
master->cur_msg->state = xfer;
espi->rx = 0; espi->rx = 0;
espi->tx = 0; espi->tx = 0;
...@@ -546,83 +488,37 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi, ...@@ -546,83 +488,37 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
* fit into the FIFO and can be transferred with a single interrupt. * fit into the FIFO and can be transferred with a single interrupt.
* So in these cases we will be using PIO and don't bother for DMA. * So in these cases we will be using PIO and don't bother for DMA.
*/ */
if (espi->dma_rx && t->len > SPI_FIFO_SIZE) if (espi->dma_rx && xfer->len > SPI_FIFO_SIZE)
ep93xx_spi_dma_transfer(espi); return ep93xx_spi_dma_transfer(master);
else
ep93xx_spi_pio_transfer(espi);
/* /* Using PIO so prime the TX FIFO and enable interrupts */
* In case of error during transmit, we bail out from processing ep93xx_spi_read_write(master);
* the message.
*/
if (msg->status)
return;
msg->actual_length += t->len; val = readl(espi->mmio + SSPCR1);
val |= (SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE);
writel(val, espi->mmio + SSPCR1);
/* /* signal that we need to wait for completion */
* After this transfer is finished, perform any possible return 1;
* post-transfer actions requested by the protocol driver.
*/
if (t->delay_usecs) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(usecs_to_jiffies(t->delay_usecs));
}
if (t->cs_change) {
if (!list_is_last(&t->transfer_list, &msg->transfers)) {
/*
* In case protocol driver is asking us to drop the
* chipselect briefly, we let the scheduler to handle
* any "delay" here.
*/
ep93xx_spi_cs_control(msg->spi, false);
cond_resched();
ep93xx_spi_cs_control(msg->spi, true);
}
}
} }
/* static int ep93xx_spi_prepare_message(struct spi_master *master,
* ep93xx_spi_process_message() - process one SPI message struct spi_message *msg)
* @espi: ep93xx SPI controller struct
* @msg: message to process
*
* This function processes a single SPI message. We go through all transfers in
* the message and pass them to ep93xx_spi_process_transfer(). Chipselect is
* asserted during the whole message (unless per transfer cs_change is set).
*
* @msg->status contains %0 in case of success or negative error code in case of
* failure.
*/
static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
struct spi_message *msg)
{ {
struct ep93xx_spi *espi = spi_master_get_devdata(master);
unsigned long timeout; unsigned long timeout;
struct spi_transfer *t;
int err;
/*
* Enable the SPI controller and its clock.
*/
err = ep93xx_spi_enable(espi);
if (err) {
dev_err(&espi->pdev->dev, "failed to enable SPI controller\n");
msg->status = err;
return;
}
/* /*
* Just to be sure: flush any data from RX FIFO. * Just to be sure: flush any data from RX FIFO.
*/ */
timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT); timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT);
while (ep93xx_spi_read_u16(espi, SSPSR) & SSPSR_RNE) { while (readl(espi->mmio + SSPSR) & SSPSR_RNE) {
if (time_after(jiffies, timeout)) { if (time_after(jiffies, timeout)) {
dev_warn(&espi->pdev->dev, dev_warn(&master->dev,
"timeout while flushing RX FIFO\n"); "timeout while flushing RX FIFO\n");
msg->status = -ETIMEDOUT; return -ETIMEDOUT;
return;
} }
ep93xx_spi_read_u16(espi, SSPDR); readl(espi->mmio + SSPDR);
} }
/* /*
...@@ -631,81 +527,38 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi, ...@@ -631,81 +527,38 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
*/ */
espi->fifo_level = 0; espi->fifo_level = 0;
/* return 0;
* Assert the chipselect.
*/
ep93xx_spi_cs_control(msg->spi, true);
list_for_each_entry(t, &msg->transfers, transfer_list) {
ep93xx_spi_process_transfer(espi, msg, t);
if (msg->status)
break;
}
/*
* Now the whole message is transferred (or failed for some reason). We
* deselect the device and disable the SPI controller.
*/
ep93xx_spi_cs_control(msg->spi, false);
ep93xx_spi_disable(espi);
} }
static int ep93xx_spi_transfer_one_message(struct spi_master *master, static int ep93xx_spi_prepare_hardware(struct spi_master *master)
struct spi_message *msg)
{ {
struct ep93xx_spi *espi = spi_master_get_devdata(master); struct ep93xx_spi *espi = spi_master_get_devdata(master);
u32 val;
int ret;
msg->state = NULL; ret = clk_enable(espi->clk);
msg->status = 0; if (ret)
msg->actual_length = 0; return ret;
espi->current_msg = msg;
ep93xx_spi_process_message(espi, msg);
espi->current_msg = NULL;
spi_finalize_current_message(master); val = readl(espi->mmio + SSPCR1);
val |= SSPCR1_SSE;
writel(val, espi->mmio + SSPCR1);
return 0; return 0;
} }
static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id) static int ep93xx_spi_unprepare_hardware(struct spi_master *master)
{ {
struct ep93xx_spi *espi = dev_id; struct ep93xx_spi *espi = spi_master_get_devdata(master);
u8 irq_status = ep93xx_spi_read_u8(espi, SSPIIR); u32 val;
/* val = readl(espi->mmio + SSPCR1);
* If we got ROR (receive overrun) interrupt we know that something is val &= ~SSPCR1_SSE;
* wrong. Just abort the message. writel(val, espi->mmio + SSPCR1);
*/
if (unlikely(irq_status & SSPIIR_RORIS)) {
/* clear the overrun interrupt */
ep93xx_spi_write_u8(espi, SSPICR, 0);
dev_warn(&espi->pdev->dev,
"receive overrun, aborting the message\n");
espi->current_msg->status = -EIO;
} else {
/*
* Interrupt is either RX (RIS) or TX (TIS). For both cases we
* simply execute next data transfer.
*/
if (ep93xx_spi_read_write(espi)) {
/*
* In normal case, there still is some processing left
* for current transfer. Let's wait for the next
* interrupt then.
*/
return IRQ_HANDLED;
}
}
/* clk_disable(espi->clk);
* Current transfer is finished, either with error or with success. In
* any case we disable interrupts and notify the worker to handle return 0;
* any post-processing of the message.
*/
ep93xx_spi_disable_interrupts(espi);
complete(&espi->wait);
return IRQ_HANDLED;
} }
static bool ep93xx_spi_dma_filter(struct dma_chan *chan, void *filter_param) static bool ep93xx_spi_dma_filter(struct dma_chan *chan, void *filter_param)
...@@ -809,7 +662,10 @@ static int ep93xx_spi_probe(struct platform_device *pdev) ...@@ -809,7 +662,10 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
if (!master) if (!master)
return -ENOMEM; return -ENOMEM;
master->transfer_one_message = ep93xx_spi_transfer_one_message; master->prepare_transfer_hardware = ep93xx_spi_prepare_hardware;
master->unprepare_transfer_hardware = ep93xx_spi_unprepare_hardware;
master->prepare_message = ep93xx_spi_prepare_message;
master->transfer_one = ep93xx_spi_transfer_one;
master->bus_num = pdev->id; master->bus_num = pdev->id;
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
...@@ -850,26 +706,23 @@ static int ep93xx_spi_probe(struct platform_device *pdev) ...@@ -850,26 +706,23 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
goto fail_release_master; goto fail_release_master;
} }
init_completion(&espi->wait);
/* /*
* Calculate maximum and minimum supported clock rates * Calculate maximum and minimum supported clock rates
* for the controller. * for the controller.
*/ */
master->max_speed_hz = clk_get_rate(espi->clk) / 2; master->max_speed_hz = clk_get_rate(espi->clk) / 2;
master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256);
espi->pdev = pdev;
espi->sspdr_phys = res->start + SSPDR; espi->sspdr_phys = res->start + SSPDR;
espi->regs_base = devm_ioremap_resource(&pdev->dev, res); espi->mmio = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(espi->regs_base)) { if (IS_ERR(espi->mmio)) {
error = PTR_ERR(espi->regs_base); error = PTR_ERR(espi->mmio);
goto fail_release_master; goto fail_release_master;
} }
error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt, error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt,
0, "ep93xx-spi", espi); 0, "ep93xx-spi", master);
if (error) { if (error) {
dev_err(&pdev->dev, "failed to request irq\n"); dev_err(&pdev->dev, "failed to request irq\n");
goto fail_release_master; goto fail_release_master;
...@@ -879,7 +732,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev) ...@@ -879,7 +732,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n"); dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n");
/* make sure that the hardware is disabled */ /* make sure that the hardware is disabled */
ep93xx_spi_write_u8(espi, SSPCR1, 0); writel(0, espi->mmio + SSPCR1);
error = devm_spi_register_master(&pdev->dev, master); error = devm_spi_register_master(&pdev->dev, master);
if (error) { if (error) {
......
drivers/spi/spi-falcon.c
View file @ a3a42460
...@@ -395,11 +395,6 @@ static int falcon_sflash_probe(struct platform_device *pdev) ...@@ -395,11 +395,6 @@ static int falcon_sflash_probe(struct platform_device *pdev)
struct spi_master *master; struct spi_master *master;
int ret; int ret;
if (ltq_boot_select() != BS_SPI) {
dev_err(&pdev->dev, "invalid bootstrap options\n");
return -ENODEV;
}
master = spi_alloc_master(&pdev->dev, sizeof(*priv)); master = spi_alloc_master(&pdev->dev, sizeof(*priv));
if (!master) if (!master)
return -ENOMEM; return -ENOMEM;
......
drivers/spi/spi-orion.c
View file @ a3a42460
...@@ -669,8 +669,8 @@ static int orion_spi_probe(struct platform_device *pdev) ...@@ -669,8 +669,8 @@ static int orion_spi_probe(struct platform_device *pdev)
status = of_property_read_u32(np, "reg", &cs); status = of_property_read_u32(np, "reg", &cs);
if (status) { if (status) {
dev_err(&pdev->dev, dev_err(&pdev->dev,
"%s has no valid 'reg' property (%d)\n", "%pOF has no valid 'reg' property (%d)\n",
np->full_name, status); np, status);
status = 0; status = 0;
continue; continue;
} }
......
drivers/spi/spi.c
View file @ a3a42460
...@@ -1587,8 +1587,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, ...@@ -1587,8 +1587,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
if (spi_controller_is_slave(ctlr)) { if (spi_controller_is_slave(ctlr)) {
if (strcmp(nc->name, "slave")) { if (strcmp(nc->name, "slave")) {
dev_err(&ctlr->dev, "%s is not called 'slave'\n", dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
nc->full_name); nc);
return -EINVAL; return -EINVAL;
} }
return 0; return 0;
...@@ -1597,8 +1597,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, ...@@ -1597,8 +1597,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
/* Device address */ /* Device address */
rc = of_property_read_u32(nc, "reg", &value); rc = of_property_read_u32(nc, "reg", &value);
if (rc) { if (rc) {
dev_err(&ctlr->dev, "%s has no valid 'reg' property (%d)\n", dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
nc->full_name, rc); nc, rc);
return rc; return rc;
} }
spi->chip_select = value; spi->chip_select = value;
...@@ -1607,8 +1607,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, ...@@ -1607,8 +1607,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
rc = of_property_read_u32(nc, "spi-max-frequency", &value); rc = of_property_read_u32(nc, "spi-max-frequency", &value);
if (rc) { if (rc) {
dev_err(&ctlr->dev, dev_err(&ctlr->dev,
"%s has no valid 'spi-max-frequency' property (%d)\n", "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc);
nc->full_name, rc);
return rc; return rc;
} }
spi->max_speed_hz = value; spi->max_speed_hz = value;
...@@ -1625,8 +1624,7 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc) ...@@ -1625,8 +1624,7 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
/* Alloc an spi_device */ /* Alloc an spi_device */
spi = spi_alloc_device(ctlr); spi = spi_alloc_device(ctlr);
if (!spi) { if (!spi) {
dev_err(&ctlr->dev, "spi_device alloc error for %s\n", dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
nc->full_name);
rc = -ENOMEM; rc = -ENOMEM;
goto err_out; goto err_out;
} }
...@@ -1635,8 +1633,7 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc) ...@@ -1635,8 +1633,7 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
rc = of_modalias_node(nc, spi->modalias, rc = of_modalias_node(nc, spi->modalias,
sizeof(spi->modalias)); sizeof(spi->modalias));
if (rc < 0) { if (rc < 0) {
dev_err(&ctlr->dev, "cannot find modalias for %s\n", dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
nc->full_name);
goto err_out; goto err_out;
} }
...@@ -1651,8 +1648,7 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc) ...@@ -1651,8 +1648,7 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
/* Register the new device */ /* Register the new device */
rc = spi_add_device(spi); rc = spi_add_device(spi);
if (rc) { if (rc) {
dev_err(&ctlr->dev, "spi_device register error %s\n", dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
nc->full_name);
goto err_of_node_put; goto err_of_node_put;
} }
...@@ -1686,8 +1682,7 @@ static void of_register_spi_devices(struct spi_controller *ctlr) ...@@ -1686,8 +1682,7 @@ static void of_register_spi_devices(struct spi_controller *ctlr)
spi = of_register_spi_device(ctlr, nc); spi = of_register_spi_device(ctlr, nc);
if (IS_ERR(spi)) { if (IS_ERR(spi)) {
dev_warn(&ctlr->dev, dev_warn(&ctlr->dev,
"Failed to create SPI device for %s\n", "Failed to create SPI device for %pOF\n", nc);
nc->full_name);
of_node_clear_flag(nc, OF_POPULATED); of_node_clear_flag(nc, OF_POPULATED);
} }
} }
...@@ -3346,8 +3341,8 @@ static int of_spi_notify(struct notifier_block *nb, unsigned long action, ...@@ -3346,8 +3341,8 @@ static int of_spi_notify(struct notifier_block *nb, unsigned long action,
put_device(&ctlr->dev); put_device(&ctlr->dev);
if (IS_ERR(spi)) { if (IS_ERR(spi)) {
pr_err("%s: failed to create for '%s'\n", pr_err("%s: failed to create for '%pOF'\n",
__func__, rd->dn->full_name); __func__, rd->dn);
of_node_clear_flag(rd->dn, OF_POPULATED); of_node_clear_flag(rd->dn, OF_POPULATED);
return notifier_from_errno(PTR_ERR(spi)); return notifier_from_errno(PTR_ERR(spi));
} }
......
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