Commit a3ea9911 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "First batch of fixes post-merge window:

   - A handful of devicetree changes for i.MX2{3,8} to change over to
     new panel bindings. The platforms were moved from legacy
     framebuffers to DRM and some development board panels hadn't yet
     been converted.

   - OMAP fixes related to ti-sysc driver conversion fallout, fixing
     some register offsets, no_console_suspend fixes, etc.

   - Droid4 changes to fix flaky eMMC probing and vibrator DTS mismerge.

   - Fixed 0755->0644 permissions on a newly added file.

   - Defconfig changes to make ARM Versatile more useful with QEMU
     (helps testing).

   - Enable defconfig options for new TI SoC platform that was merged
     this window (AM6)"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm64: defconfig: Enable TI's AM6 SoC platform
  ARM: defconfig: Update the ARM Versatile defconfig
  ARM: dts: omap4-droid4: Fix emmc errors seen on some devices
  ARM: dts: Fix file permission for am335x-osd3358-sm-red.dts
  ARM: imx_v6_v7_defconfig: Select CONFIG_DRM_PANEL_SEIKO_43WVF1G
  ARM: mxs_defconfig: Select CONFIG_DRM_PANEL_SEIKO_43WVF1G
  ARM: dts: imx23-evk: Convert to the new display bindings
  ARM: dts: imx23-evk: Move regulators outside simple-bus
  ARM: dts: imx28-evk: Convert to the new display bindings
  ARM: dts: imx28-evk: Move regulators outside simple-bus
  Revert "ARM: dts: imx7d: Invert legacy PCI irq mapping"
  arm: dts: am4372: setup rtc as system-power-controller
  ARM: dts: omap4-droid4: fix vibrations on Droid 4
  bus: ti-sysc: Fix no_console_suspend handling
  bus: ti-sysc: Fix module register ioremap for larger offsets
  ARM: OMAP2+: Fix module address for modules using mpu_rt_idx
  ARM: OMAP2+: Fix null hwmod for ti-sysc debug
parents 899ba795 a72b44a8
File mode changed from 100755 to 100644
...@@ -469,6 +469,7 @@ rtc: rtc@44e3e000 { ...@@ -469,6 +469,7 @@ rtc: rtc@44e3e000 {
ti,hwmods = "rtc"; ti,hwmods = "rtc";
clocks = <&clk_32768_ck>; clocks = <&clk_32768_ck>;
clock-names = "int-clk"; clock-names = "int-clk";
system-power-controller;
status = "disabled"; status = "disabled";
}; };
......
...@@ -13,6 +13,43 @@ memory@40000000 { ...@@ -13,6 +13,43 @@ memory@40000000 {
reg = <0x40000000 0x08000000>; reg = <0x40000000 0x08000000>;
}; };
reg_vddio_sd0: regulator-vddio-sd0 {
compatible = "regulator-fixed";
regulator-name = "vddio-sd0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 29 0>;
};
reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 18 0>;
enable-active-high;
};
reg_lcd_5v: regulator-lcd-5v {
compatible = "regulator-fixed";
regulator-name = "lcd-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
apb@80000000 { apb@80000000 {
apbh@80000000 { apbh@80000000 {
gpmi-nand@8000c000 { gpmi-nand@8000c000 {
...@@ -52,31 +89,11 @@ MX23_PAD_SSP1_DETECT__SSP1_DETECT ...@@ -52,31 +89,11 @@ MX23_PAD_SSP1_DETECT__SSP1_DETECT
lcdif@80030000 { lcdif@80030000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a>; pinctrl-0 = <&lcdif_24bit_pins_a>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay"; status = "okay";
display0: display0 { port {
bits-per-pixel = <32>; display_out: endpoint {
bus-width = <24>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9200000>;
hactive = <480>;
vactive = <272>;
hback-porch = <15>;
hfront-porch = <8>;
vback-porch = <12>;
vfront-porch = <4>;
hsync-len = <1>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
}; };
}; };
...@@ -118,32 +135,7 @@ usb0: usb@80080000 { ...@@ -118,32 +135,7 @@ usb0: usb@80080000 {
}; };
}; };
regulators { backlight_display: backlight {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_vddio_sd0: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vddio-sd0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 29 0>;
};
reg_lcd_3v3: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 18 0>;
enable-active-high;
};
};
backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm 2 5000000>; pwms = <&pwm 2 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
......
...@@ -13,6 +13,87 @@ memory@40000000 { ...@@ -13,6 +13,87 @@ memory@40000000 {
reg = <0x40000000 0x08000000>; reg = <0x40000000 0x08000000>;
}; };
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vddio_sd0: regulator-vddio-sd0 {
compatible = "regulator-fixed";
regulator-name = "vddio-sd0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 28 0>;
};
reg_fec_3v3: regulator-fec-3v3 {
compatible = "regulator-fixed";
regulator-name = "fec-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 15 0>;
};
reg_usb0_vbus: regulator-usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 9 0>;
enable-active-high;
};
reg_usb1_vbus: regulator-usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 8 0>;
enable-active-high;
};
reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 30 0>;
enable-active-high;
};
reg_can_3v3: regulator-can-3v3 {
compatible = "regulator-fixed";
regulator-name = "can-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 13 0>;
enable-active-high;
};
reg_lcd_5v: regulator-lcd-5v {
compatible = "regulator-fixed";
regulator-name = "lcd-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
apb@80000000 { apb@80000000 {
apbh@80000000 { apbh@80000000 {
gpmi-nand@8000c000 { gpmi-nand@8000c000 {
...@@ -116,31 +197,11 @@ lcdif@80030000 { ...@@ -116,31 +197,11 @@ lcdif@80030000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_evk>; &lcdif_pins_evk>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay"; status = "okay";
display0: display0 { port {
bits-per-pixel = <32>; display_out: endpoint {
bus-width = <24>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33500000>;
hactive = <800>;
vactive = <480>;
hback-porch = <89>;
hfront-porch = <164>;
vback-porch = <23>;
vfront-porch = <10>;
hsync-len = <10>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
}; };
}; };
...@@ -269,80 +330,6 @@ mac1: ethernet@800f4000 { ...@@ -269,80 +330,6 @@ mac1: ethernet@800f4000 {
}; };
}; };
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_3p3v: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vddio_sd0: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vddio-sd0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 28 0>;
};
reg_fec_3v3: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "fec-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 15 0>;
};
reg_usb0_vbus: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "usb0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 9 0>;
enable-active-high;
};
reg_usb1_vbus: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 8 0>;
enable-active-high;
};
reg_lcd_3v3: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 30 0>;
enable-active-high;
};
reg_can_3v3: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "can-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 13 0>;
enable-active-high;
};
};
sound { sound {
compatible = "fsl,imx28-evk-sgtl5000", compatible = "fsl,imx28-evk-sgtl5000",
"fsl,mxs-audio-sgtl5000"; "fsl,mxs-audio-sgtl5000";
...@@ -363,7 +350,7 @@ user { ...@@ -363,7 +350,7 @@ user {
}; };
}; };
backlight { backlight_display: backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm 2 5000000>; pwms = <&pwm 2 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
......
...@@ -126,10 +126,14 @@ pcie: pcie@33800000 { ...@@ -126,10 +126,14 @@ pcie: pcie@33800000 {
interrupt-names = "msi"; interrupt-names = "msi";
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>; interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, /*
<0 0 0 2 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, * Reference manual lists pci irqs incorrectly
<0 0 0 3 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, * Real hardware ordering is same as imx6: D+MSI, C, B, A
<0 0 0 4 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; */
interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
<&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
<&clks IMX7D_PCIE_PHY_ROOT_CLK>; <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
......
...@@ -354,7 +354,7 @@ &mmc1 { ...@@ -354,7 +354,7 @@ &mmc1 {
&mmc2 { &mmc2 {
vmmc-supply = <&vsdio>; vmmc-supply = <&vsdio>;
bus-width = <8>; bus-width = <8>;
non-removable; ti,non-removable;
}; };
&mmc3 { &mmc3 {
...@@ -621,15 +621,6 @@ OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */ ...@@ -621,15 +621,6 @@ OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */
OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */ OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
>; >;
}; };
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
vibrator_direction_pin: pinmux_vibrator_direction_pin { vibrator_direction_pin: pinmux_vibrator_direction_pin {
pinctrl-single,pins = < pinctrl-single,pins = <
...@@ -644,6 +635,15 @@ OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */ ...@@ -644,6 +635,15 @@ OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
}; };
}; };
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
};
/* /*
* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
* uart1 wakeirq. * uart1 wakeirq.
......
...@@ -257,6 +257,7 @@ CONFIG_IMX_IPUV3_CORE=y ...@@ -257,6 +257,7 @@ CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_PANEL_LVDS=y CONFIG_DRM_PANEL_LVDS=y
CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=y CONFIG_DRM_DW_HDMI_CEC=y
CONFIG_DRM_IMX=y CONFIG_DRM_IMX=y
......
...@@ -95,6 +95,7 @@ CONFIG_MFD_MXS_LRADC=y ...@@ -95,6 +95,7 @@ CONFIG_MFD_MXS_LRADC=y
CONFIG_REGULATOR=y CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
CONFIG_DRM_MXSFB=y CONFIG_DRM_MXSFB=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB_MODE_HELPERS=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LCD_SUPPORT=y
......
...@@ -5,19 +5,19 @@ CONFIG_HIGH_RES_TIMERS=y ...@@ -5,19 +5,19 @@ CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ARCH_MULTI_V7 is not set # CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_VERSATILE=y CONFIG_ARCH_VERSATILE=y
CONFIG_AEABI=y CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y CONFIG_OABI_COMPAT=y
CONFIG_CMA=y
CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=1f03 mem=32M" CONFIG_CMDLINE="root=1f03 mem=32M"
CONFIG_FPE_NWFPE=y CONFIG_FPE_NWFPE=y
CONFIG_VFP=y CONFIG_VFP=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_CMA=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y CONFIG_UNIX=y
...@@ -59,6 +59,7 @@ CONFIG_GPIO_PL061=y ...@@ -59,6 +59,7 @@ CONFIG_GPIO_PL061=y
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_PANEL_ARM_VERSATILE=y CONFIG_DRM_PANEL_ARM_VERSATILE=y
CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DUMB_VGA_DAC=y
CONFIG_DRM_PL111=y CONFIG_DRM_PL111=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB_MODE_HELPERS=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LCD_SUPPORT=y
...@@ -89,9 +90,10 @@ CONFIG_NFSD=y ...@@ -89,9 +90,10 @@ CONFIG_NFSD=y
CONFIG_NFSD_V3=y CONFIG_NFSD_V3=y
CONFIG_NLS_CODEPAGE_850=m CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m CONFIG_NLS_ISO8859_1=m
CONFIG_FONTS=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y CONFIG_DEBUG_LL=y
CONFIG_FONTS=y
CONFIG_FONT_ACORN_8x8=y
...@@ -2160,6 +2160,37 @@ static int of_dev_hwmod_lookup(struct device_node *np, ...@@ -2160,6 +2160,37 @@ static int of_dev_hwmod_lookup(struct device_node *np,
return -ENODEV; return -ENODEV;
} }
/**
* omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
*
* @oh: struct omap_hwmod *
* @np: struct device_node *
*
* Fix up module register offsets for modules with mpu_rt_idx.
* Only needed for cpsw with interconnect target module defined
* in device tree while still using legacy hwmod platform data
* for rev, sysc and syss registers.
*
* Can be removed when all cpsw hwmod platform data has been
* dropped.
*/
static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
struct device_node *np,
struct resource *res)
{
struct device_node *child = NULL;
int error;
child = of_get_next_child(np, child);
if (!child)
return;
error = of_address_to_resource(child, oh->mpu_rt_idx, res);
if (error)
pr_err("%s: error mapping mpu_rt_idx: %i\n",
__func__, error);
}
/** /**
* omap_hwmod_parse_module_range - map module IO range from device tree * omap_hwmod_parse_module_range - map module IO range from device tree
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
...@@ -2220,7 +2251,13 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh, ...@@ -2220,7 +2251,13 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
size = be32_to_cpup(ranges); size = be32_to_cpup(ranges);
pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n", pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
oh->name, np->name, base, size); oh ? oh->name : "", np->name, base, size);
if (oh && oh->mpu_rt_idx) {
omap_hwmod_fix_mpu_rt_idx(oh, np, res);
return 0;
}
res->start = base; res->start = base;
res->end = base + size - 1; res->end = base + size - 1;
......
...@@ -38,6 +38,7 @@ CONFIG_ARCH_BCM_IPROC=y ...@@ -38,6 +38,7 @@ CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BERLIN=y CONFIG_ARCH_BERLIN=y
CONFIG_ARCH_BRCMSTB=y CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_K3=y
CONFIG_ARCH_LAYERSCAPE=y CONFIG_ARCH_LAYERSCAPE=y
CONFIG_ARCH_LG1K=y CONFIG_ARCH_LG1K=y
CONFIG_ARCH_HISI=y CONFIG_ARCH_HISI=y
...@@ -605,6 +606,8 @@ CONFIG_ARCH_TEGRA_132_SOC=y ...@@ -605,6 +606,8 @@ CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_ARCH_TEGRA_186_SOC=y CONFIG_ARCH_TEGRA_186_SOC=y
CONFIG_ARCH_TEGRA_194_SOC=y CONFIG_ARCH_TEGRA_194_SOC=y
CONFIG_ARCH_K3_AM6_SOC=y
CONFIG_SOC_TI=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_EXTCON_USB_GPIO=y CONFIG_EXTCON_USB_GPIO=y
CONFIG_EXTCON_USBC_CROS_EC=y CONFIG_EXTCON_USBC_CROS_EC=y
......
...@@ -498,32 +498,29 @@ static int sysc_check_registers(struct sysc *ddata) ...@@ -498,32 +498,29 @@ static int sysc_check_registers(struct sysc *ddata)
/** /**
* syc_ioremap - ioremap register space for the interconnect target module * syc_ioremap - ioremap register space for the interconnect target module
* @ddata: deviec driver data * @ddata: device driver data
* *
* Note that the interconnect target module registers can be anywhere * Note that the interconnect target module registers can be anywhere
* within the first child device address space. For example, SGX has * within the interconnect target module range. For example, SGX has
* them at offset 0x1fc00 in the 32MB module address space. We just * them at offset 0x1fc00 in the 32MB module address space. And cpsw
* what we need around the interconnect target module registers. * has them at offset 0x1200 in the CPSW_WR child. Usually the
* the interconnect target module registers are at the beginning of
* the module range though.
*/ */
static int sysc_ioremap(struct sysc *ddata) static int sysc_ioremap(struct sysc *ddata)
{ {
u32 size = 0; int size;
if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
size = ddata->offsets[SYSC_SYSSTATUS];
else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
size = ddata->offsets[SYSC_SYSCONFIG];
else if (ddata->offsets[SYSC_REVISION] >= 0)
size = ddata->offsets[SYSC_REVISION];
else
return -EINVAL;
size &= 0xfff00; size = max3(ddata->offsets[SYSC_REVISION],
size += SZ_256; ddata->offsets[SYSC_SYSCONFIG],
ddata->offsets[SYSC_SYSSTATUS]);
if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
return -EINVAL;
ddata->module_va = devm_ioremap(ddata->dev, ddata->module_va = devm_ioremap(ddata->dev,
ddata->module_pa, ddata->module_pa,
size); size + sizeof(u32));
if (!ddata->module_va) if (!ddata->module_va)
return -EIO; return -EIO;
...@@ -1224,10 +1221,10 @@ static int sysc_child_suspend_noirq(struct device *dev) ...@@ -1224,10 +1221,10 @@ static int sysc_child_suspend_noirq(struct device *dev)
if (!pm_runtime_status_suspended(dev)) { if (!pm_runtime_status_suspended(dev)) {
error = pm_generic_runtime_suspend(dev); error = pm_generic_runtime_suspend(dev);
if (error) { if (error) {
dev_err(dev, "%s error at %i: %i\n", dev_warn(dev, "%s busy at %i: %i\n",
__func__, __LINE__, error); __func__, __LINE__, error);
return error; return 0;
} }
error = sysc_runtime_suspend(ddata->dev); error = sysc_runtime_suspend(ddata->dev);
......
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