Commit a419bfb7 authored by Or Har-Toov's avatar Or Har-Toov Committed by Jason Gunthorpe

net/mlx5: Change define name for 0x100 lkey value

Change define of 0x100 lkey value from MLX5_INVALID_LKEY to be
MLX5_TERMINATE_SCATTER_LIST_LKEY as 0x100 is the value of
terminate_scatter_list_mkey.

Link: https://lore.kernel.org/r/3a116dc3fbae4cb6b76a63d27d418830b06ade0c.1673960981.git.leon@kernel.orgSigned-off-by: default avatarOr Har-Toov <ohartoov@nvidia.com>
Reviewed-by: default avatarMichael Guralnik <michaelgur@nvidia.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent 4b7296aa
...@@ -986,7 +986,7 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev, ...@@ -986,7 +986,7 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev,
{ {
int ret = 0, npages = 0; int ret = 0, npages = 0;
u64 io_virt; u64 io_virt;
u32 key; __be32 key;
u32 byte_count; u32 byte_count;
size_t bcnt; size_t bcnt;
int inline_segment; int inline_segment;
...@@ -1000,7 +1000,7 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev, ...@@ -1000,7 +1000,7 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev,
struct mlx5_wqe_data_seg *dseg = wqe; struct mlx5_wqe_data_seg *dseg = wqe;
io_virt = be64_to_cpu(dseg->addr); io_virt = be64_to_cpu(dseg->addr);
key = be32_to_cpu(dseg->lkey); key = dseg->lkey;
byte_count = be32_to_cpu(dseg->byte_count); byte_count = be32_to_cpu(dseg->byte_count);
inline_segment = !!(byte_count & MLX5_INLINE_SEG); inline_segment = !!(byte_count & MLX5_INLINE_SEG);
bcnt = byte_count & ~MLX5_INLINE_SEG; bcnt = byte_count & ~MLX5_INLINE_SEG;
...@@ -1014,8 +1014,8 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev, ...@@ -1014,8 +1014,8 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev,
} }
/* receive WQE end of sg list. */ /* receive WQE end of sg list. */
if (receive_queue && bcnt == 0 && key == MLX5_INVALID_LKEY && if (receive_queue && bcnt == 0 &&
io_virt == 0) key == MLX5_TERMINATE_SCATTER_LIST_LKEY && io_virt == 0)
break; break;
if (!inline_segment && total_wqe_bytes) { if (!inline_segment && total_wqe_bytes) {
...@@ -1034,7 +1034,7 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev, ...@@ -1034,7 +1034,7 @@ static int pagefault_data_segments(struct mlx5_ib_dev *dev,
continue; continue;
} }
ret = pagefault_single_data_segment(dev, NULL, key, ret = pagefault_single_data_segment(dev, NULL, be32_to_cpu(key),
io_virt, bcnt, io_virt, bcnt,
&pfault->bytes_committed, &pfault->bytes_committed,
bytes_mapped); bytes_mapped);
......
...@@ -447,7 +447,7 @@ int mlx5_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, ...@@ -447,7 +447,7 @@ int mlx5_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr,
if (i < srq->msrq.max_avail_gather) { if (i < srq->msrq.max_avail_gather) {
scat[i].byte_count = 0; scat[i].byte_count = 0;
scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); scat[i].lkey = MLX5_TERMINATE_SCATTER_LIST_LKEY;
scat[i].addr = 0; scat[i].addr = 0;
} }
} }
......
...@@ -1252,7 +1252,7 @@ int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, ...@@ -1252,7 +1252,7 @@ int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
if (i < qp->rq.max_gs) { if (i < qp->rq.max_gs) {
scat[i].byte_count = 0; scat[i].byte_count = 0;
scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); scat[i].lkey = MLX5_TERMINATE_SCATTER_LIST_LKEY;
scat[i].addr = 0; scat[i].addr = 0;
} }
......
...@@ -829,7 +829,8 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params, ...@@ -829,7 +829,8 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,
/* check if num_frags is not a pow of two */ /* check if num_frags is not a pow of two */
if (rq->wqe.info.num_frags < (1 << rq->wqe.info.log_num_frags)) { if (rq->wqe.info.num_frags < (1 << rq->wqe.info.log_num_frags)) {
wqe->data[f].byte_count = 0; wqe->data[f].byte_count = 0;
wqe->data[f].lkey = cpu_to_be32(MLX5_INVALID_LKEY); wqe->data[f].lkey =
MLX5_TERMINATE_SCATTER_LIST_LKEY;
wqe->data[f].addr = 0; wqe->data[f].addr = 0;
} }
} }
......
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
#include <linux/mlx5/device.h> #include <linux/mlx5/device.h>
#include <linux/mlx5/driver.h> #include <linux/mlx5/driver.h>
#define MLX5_INVALID_LKEY 0x100 #define MLX5_TERMINATE_SCATTER_LIST_LKEY cpu_to_be32(0x100)
/* UMR (3 WQE_BB's) + SIG (3 WQE_BB's) + PSV (mem) + PSV (wire) */ /* UMR (3 WQE_BB's) + SIG (3 WQE_BB's) + PSV (mem) + PSV (wire) */
#define MLX5_SIG_WQE_SIZE (MLX5_SEND_WQE_BB * 8) #define MLX5_SIG_WQE_SIZE (MLX5_SEND_WQE_BB * 8)
#define MLX5_DIF_SIZE 8 #define MLX5_DIF_SIZE 8
......
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