Commit a45f9d41 authored by Xing Zheng's avatar Xing Zheng Committed by Heiko Stuebner

clk: rockchip: mark aclk_emmc_noc as a critical clock on rk3399

We don't have code to handle any of the noc clocks in rk3399 and they're
all just listed as critical clocks.  Let's do the same for
aclk_emmc_noc.

Without this clock being marked as critical we have problems around
suspend/resume after commit 20c389e6 ("clk: rockchip: fix incorrect
aclk_emmc source gate bits on rk3399").  Before that change we were
presumably not actually gating any of these clocks because we were
setting the wrong gate.

Fixes: 20c389e6 ("clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399")
Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 4608d96f
...@@ -1484,6 +1484,7 @@ static const char *const rk3399_cru_critical_clocks[] __initconst = { ...@@ -1484,6 +1484,7 @@ static const char *const rk3399_cru_critical_clocks[] __initconst = {
"hclk_perilp1", "hclk_perilp1",
"hclk_perilp1_noc", "hclk_perilp1_noc",
"aclk_dmac0_perilp", "aclk_dmac0_perilp",
"aclk_emmc_noc",
"gpll_hclk_perilp1_src", "gpll_hclk_perilp1_src",
"gpll_aclk_perilp0_src", "gpll_aclk_perilp0_src",
"gpll_aclk_perihp_src", "gpll_aclk_perihp_src",
......
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