Commit a49f76cd authored by Chris Brandt's avatar Chris Brandt Committed by Simon Horman

ARM: dts: r7s9210: Add SDHI support

Add SDHI support for the R7S9210 (RZ/A2) SoC.
Signed-off-by: default avatarChris Brandt <chris.brandt@renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 49da03c6
...@@ -322,6 +322,30 @@ ostm2: timer@e803d000 { ...@@ -322,6 +322,30 @@ ostm2: timer@e803d000 {
status = "disabled"; status = "disabled";
}; };
sdhi0: sd@e8228000 {
compatible = "renesas,sdhi-r7s9210";
reg = <0xe8228000 0x8c0>;
interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 103>, <&cpg CPG_MOD 102>;
clock-names = "core", "cd";
power-domains = <&cpg>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi1: sd@e822a000 {
compatible = "renesas,sdhi-r7s9210";
reg = <0xe822a000 0x8c0>;
interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 101>, <&cpg CPG_MOD 100>;
clock-names = "core", "cd";
power-domains = <&cpg>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
gic: interrupt-controller@e8221000 { gic: interrupt-controller@e8221000 {
compatible = "arm,gic-400"; compatible = "arm,gic-400";
#interrupt-cells = <3>; #interrupt-cells = <3>;
......
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