Commit a500528f authored by Julius Werner's avatar Julius Werner Committed by Krzysztof Kozlowski

dt-bindings: memory: Add jedec,lpddr4 and jedec,lpddr5 bindings

This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the
existing bindings for LPDDR2 and LPDDR3. For now, the new types are only
needed for topology description, so other properties like timing
parameters are omitted. They can be added later if needed.
Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220930220606.303395-3-jwerner@chromium.orgSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 686fe63b
......@@ -45,9 +45,13 @@ properties:
- 512
- 1024
- 2048
- 3072
- 4096
- 6144
- 8192
- 12288
- 16384
- 24576
- 32768
io-width:
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LPDDR4 SDRAM compliant to JEDEC JESD209-4
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
allOf:
- $ref: jedec,lpddr-props.yaml#
properties:
compatible:
items:
- pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$"
- const: jedec,lpddr4
required:
- compatible
- density
- io-width
unevaluatedProperties: false
examples:
- |
lpddr {
compatible = "lpddr4-ff,0100", "jedec,lpddr4";
density = <8192>;
io-width = <16>;
revision-id = <1 0>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LPDDR5 SDRAM compliant to JEDEC JESD209-5
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
allOf:
- $ref: jedec,lpddr-props.yaml#
properties:
compatible:
items:
- pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$"
- const: jedec,lpddr5
serial-id:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
Serial IDs read from Mode Registers 47 through 54. One byte per uint32
cell (i.e. <MR47 MR48 MR49 MR50 MR51 MR52 MR53 MR54>).
maxItems: 8
items:
minimum: 0
maximum: 255
required:
- compatible
- density
- io-width
unevaluatedProperties: false
examples:
- |
lpddr {
compatible = "lpddr5-01,0200", "jedec,lpddr5";
density = <8192>;
io-width = <8>;
revision-id = <2 0>;
serial-id = <3 1 0 0 0 0 0 0>;
};
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment