Commit a537314e authored by Michel Dänzer's avatar Michel Dänzer Committed by Alex Deucher

drm/radeon/cik: Fix encoding of number of banks in tiling configuration info

There are multiple valid values, not just 0 or 1.  Required
to properly support 2D tiling in the userspace drivers.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 328a50c7
...@@ -2845,10 +2845,8 @@ static void cik_gpu_init(struct radeon_device *rdev) ...@@ -2845,10 +2845,8 @@ static void cik_gpu_init(struct radeon_device *rdev)
rdev->config.cik.tile_config |= (3 << 0); rdev->config.cik.tile_config |= (3 << 0);
break; break;
} }
if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) rdev->config.cik.tile_config |=
rdev->config.cik.tile_config |= 1 << 4; ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
else
rdev->config.cik.tile_config |= 0 << 4;
rdev->config.cik.tile_config |= rdev->config.cik.tile_config |=
((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;
rdev->config.cik.tile_config |= rdev->config.cik.tile_config |=
......
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