Commit a564ac35 authored by Kevin Hao's avatar Kevin Hao Committed by Linus Walleij

Revert "gpio: thunderx: Switch to GPIOLIB_IRQCHIP"

This reverts commit a7fc89f9 because
there are some bugs in this commit, and we don't have a simple way to
fix these bugs. So revert this commit to make the thunderx gpio work
on the stable kernel at least. We will switch to GPIOLIB_IRQCHIP
for thunderx gpio by following patches.

Fixes: a7fc89f9 ("gpio: thunderx: Switch to GPIOLIB_IRQCHIP")
Signed-off-by: default avatarKevin Hao <haokexin@gmail.com>
Link: https://lore.kernel.org/r/20200114082821.14015-2-haokexin@gmail.comSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent b3a987b0
...@@ -573,7 +573,6 @@ config GPIO_THUNDERX ...@@ -573,7 +573,6 @@ config GPIO_THUNDERX
tristate "Cavium ThunderX/OCTEON-TX GPIO" tristate "Cavium ThunderX/OCTEON-TX GPIO"
depends on ARCH_THUNDER || (64BIT && COMPILE_TEST) depends on ARCH_THUNDER || (64BIT && COMPILE_TEST)
depends on PCI_MSI depends on PCI_MSI
select GPIOLIB_IRQCHIP
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
select IRQ_FASTEOI_HIERARCHY_HANDLERS select IRQ_FASTEOI_HIERARCHY_HANDLERS
help help
......
...@@ -53,6 +53,7 @@ struct thunderx_line { ...@@ -53,6 +53,7 @@ struct thunderx_line {
struct thunderx_gpio { struct thunderx_gpio {
struct gpio_chip chip; struct gpio_chip chip;
u8 __iomem *register_base; u8 __iomem *register_base;
struct irq_domain *irqd;
struct msix_entry *msix_entries; /* per line MSI-X */ struct msix_entry *msix_entries; /* per line MSI-X */
struct thunderx_line *line_entries; /* per line irq info */ struct thunderx_line *line_entries; /* per line irq info */
raw_spinlock_t lock; raw_spinlock_t lock;
...@@ -285,60 +286,54 @@ static void thunderx_gpio_set_multiple(struct gpio_chip *chip, ...@@ -285,60 +286,54 @@ static void thunderx_gpio_set_multiple(struct gpio_chip *chip,
} }
} }
static void thunderx_gpio_irq_ack(struct irq_data *d) static void thunderx_gpio_irq_ack(struct irq_data *data)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
writeq(GPIO_INTR_INTR, writeq(GPIO_INTR_INTR,
txgpio->register_base + intr_reg(irqd_to_hwirq(d))); txline->txgpio->register_base + intr_reg(txline->line));
} }
static void thunderx_gpio_irq_mask(struct irq_data *d) static void thunderx_gpio_irq_mask(struct irq_data *data)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
writeq(GPIO_INTR_ENA_W1C, writeq(GPIO_INTR_ENA_W1C,
txgpio->register_base + intr_reg(irqd_to_hwirq(d))); txline->txgpio->register_base + intr_reg(txline->line));
} }
static void thunderx_gpio_irq_mask_ack(struct irq_data *d) static void thunderx_gpio_irq_mask_ack(struct irq_data *data)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
writeq(GPIO_INTR_ENA_W1C | GPIO_INTR_INTR, writeq(GPIO_INTR_ENA_W1C | GPIO_INTR_INTR,
txgpio->register_base + intr_reg(irqd_to_hwirq(d))); txline->txgpio->register_base + intr_reg(txline->line));
} }
static void thunderx_gpio_irq_unmask(struct irq_data *d) static void thunderx_gpio_irq_unmask(struct irq_data *data)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
writeq(GPIO_INTR_ENA_W1S, writeq(GPIO_INTR_ENA_W1S,
txgpio->register_base + intr_reg(irqd_to_hwirq(d))); txline->txgpio->register_base + intr_reg(txline->line));
} }
static int thunderx_gpio_irq_set_type(struct irq_data *d, static int thunderx_gpio_irq_set_type(struct irq_data *data,
unsigned int flow_type) unsigned int flow_type)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = gpiochip_get_data(gc); struct thunderx_gpio *txgpio = txline->txgpio;
struct thunderx_line *txline =
&txgpio->line_entries[irqd_to_hwirq(d)];
u64 bit_cfg; u64 bit_cfg;
irqd_set_trigger_type(d, flow_type); irqd_set_trigger_type(data, flow_type);
bit_cfg = txline->fil_bits | GPIO_BIT_CFG_INT_EN; bit_cfg = txline->fil_bits | GPIO_BIT_CFG_INT_EN;
if (flow_type & IRQ_TYPE_EDGE_BOTH) { if (flow_type & IRQ_TYPE_EDGE_BOTH) {
irq_set_handler_locked(d, handle_fasteoi_ack_irq); irq_set_handler_locked(data, handle_fasteoi_ack_irq);
bit_cfg |= GPIO_BIT_CFG_INT_TYPE; bit_cfg |= GPIO_BIT_CFG_INT_TYPE;
} else { } else {
irq_set_handler_locked(d, handle_fasteoi_mask_irq); irq_set_handler_locked(data, handle_fasteoi_mask_irq);
} }
raw_spin_lock(&txgpio->lock); raw_spin_lock(&txgpio->lock);
...@@ -367,6 +362,33 @@ static void thunderx_gpio_irq_disable(struct irq_data *data) ...@@ -367,6 +362,33 @@ static void thunderx_gpio_irq_disable(struct irq_data *data)
irq_chip_disable_parent(data); irq_chip_disable_parent(data);
} }
static int thunderx_gpio_irq_request_resources(struct irq_data *data)
{
struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = txline->txgpio;
int r;
r = gpiochip_lock_as_irq(&txgpio->chip, txline->line);
if (r)
return r;
r = irq_chip_request_resources_parent(data);
if (r)
gpiochip_unlock_as_irq(&txgpio->chip, txline->line);
return r;
}
static void thunderx_gpio_irq_release_resources(struct irq_data *data)
{
struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
struct thunderx_gpio *txgpio = txline->txgpio;
irq_chip_release_resources_parent(data);
gpiochip_unlock_as_irq(&txgpio->chip, txline->line);
}
/* /*
* Interrupts are chained from underlying MSI-X vectors. We have * Interrupts are chained from underlying MSI-X vectors. We have
* these irq_chip functions to be able to handle level triggering * these irq_chip functions to be able to handle level triggering
...@@ -383,24 +405,50 @@ static struct irq_chip thunderx_gpio_irq_chip = { ...@@ -383,24 +405,50 @@ static struct irq_chip thunderx_gpio_irq_chip = {
.irq_unmask = thunderx_gpio_irq_unmask, .irq_unmask = thunderx_gpio_irq_unmask,
.irq_eoi = irq_chip_eoi_parent, .irq_eoi = irq_chip_eoi_parent,
.irq_set_affinity = irq_chip_set_affinity_parent, .irq_set_affinity = irq_chip_set_affinity_parent,
.irq_request_resources = thunderx_gpio_irq_request_resources,
.irq_release_resources = thunderx_gpio_irq_release_resources,
.irq_set_type = thunderx_gpio_irq_set_type, .irq_set_type = thunderx_gpio_irq_set_type,
.flags = IRQCHIP_SET_TYPE_MASKED .flags = IRQCHIP_SET_TYPE_MASKED
}; };
static int thunderx_gpio_child_to_parent_hwirq(struct gpio_chip *gc, static int thunderx_gpio_irq_translate(struct irq_domain *d,
unsigned int child, struct irq_fwspec *fwspec,
unsigned int child_type, irq_hw_number_t *hwirq,
unsigned int *parent, unsigned int *type)
unsigned int *parent_type)
{ {
struct thunderx_gpio *txgpio = gpiochip_get_data(gc); struct thunderx_gpio *txgpio = d->host_data;
*parent = txgpio->base_msi + (2 * child); if (WARN_ON(fwspec->param_count < 2))
*parent_type = IRQ_TYPE_LEVEL_HIGH; return -EINVAL;
if (fwspec->param[0] >= txgpio->chip.ngpio)
return -EINVAL;
*hwirq = fwspec->param[0];
*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
return 0; return 0;
} }
static int thunderx_gpio_irq_alloc(struct irq_domain *d, unsigned int virq,
unsigned int nr_irqs, void *arg)
{
struct thunderx_line *txline = arg;
return irq_domain_set_hwirq_and_chip(d, virq, txline->line,
&thunderx_gpio_irq_chip, txline);
}
static const struct irq_domain_ops thunderx_gpio_irqd_ops = {
.alloc = thunderx_gpio_irq_alloc,
.translate = thunderx_gpio_irq_translate
};
static int thunderx_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
{
struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
return irq_find_mapping(txgpio->irqd, offset);
}
static int thunderx_gpio_probe(struct pci_dev *pdev, static int thunderx_gpio_probe(struct pci_dev *pdev,
const struct pci_device_id *id) const struct pci_device_id *id)
{ {
...@@ -408,7 +456,6 @@ static int thunderx_gpio_probe(struct pci_dev *pdev, ...@@ -408,7 +456,6 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct thunderx_gpio *txgpio; struct thunderx_gpio *txgpio;
struct gpio_chip *chip; struct gpio_chip *chip;
struct gpio_irq_chip *girq;
int ngpio, i; int ngpio, i;
int err = 0; int err = 0;
...@@ -495,6 +542,27 @@ static int thunderx_gpio_probe(struct pci_dev *pdev, ...@@ -495,6 +542,27 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
if (err < 0) if (err < 0)
goto out; goto out;
/*
* Push GPIO specific irqdomain on hierarchy created as a side
* effect of the pci_enable_msix()
*/
txgpio->irqd = irq_domain_create_hierarchy(irq_get_irq_data(txgpio->msix_entries[0].vector)->domain,
0, 0, of_node_to_fwnode(dev->of_node),
&thunderx_gpio_irqd_ops, txgpio);
if (!txgpio->irqd) {
err = -ENOMEM;
goto out;
}
/* Push on irq_data and the domain for each line. */
for (i = 0; i < ngpio; i++) {
err = irq_domain_push_irq(txgpio->irqd,
txgpio->msix_entries[i].vector,
&txgpio->line_entries[i]);
if (err < 0)
dev_err(dev, "irq_domain_push_irq: %d\n", err);
}
chip->label = KBUILD_MODNAME; chip->label = KBUILD_MODNAME;
chip->parent = dev; chip->parent = dev;
chip->owner = THIS_MODULE; chip->owner = THIS_MODULE;
...@@ -509,28 +577,11 @@ static int thunderx_gpio_probe(struct pci_dev *pdev, ...@@ -509,28 +577,11 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
chip->set = thunderx_gpio_set; chip->set = thunderx_gpio_set;
chip->set_multiple = thunderx_gpio_set_multiple; chip->set_multiple = thunderx_gpio_set_multiple;
chip->set_config = thunderx_gpio_set_config; chip->set_config = thunderx_gpio_set_config;
girq = &chip->irq; chip->to_irq = thunderx_gpio_to_irq;
girq->chip = &thunderx_gpio_irq_chip;
girq->fwnode = of_node_to_fwnode(dev->of_node);
girq->parent_domain =
irq_get_irq_data(txgpio->msix_entries[0].vector)->domain;
girq->child_to_parent_hwirq = thunderx_gpio_child_to_parent_hwirq;
girq->handler = handle_bad_irq;
girq->default_type = IRQ_TYPE_NONE;
err = devm_gpiochip_add_data(dev, chip, txgpio); err = devm_gpiochip_add_data(dev, chip, txgpio);
if (err) if (err)
goto out; goto out;
/* Push on irq_data and the domain for each line. */
for (i = 0; i < ngpio; i++) {
err = irq_domain_push_irq(chip->irq.domain,
txgpio->msix_entries[i].vector,
chip);
if (err < 0)
dev_err(dev, "irq_domain_push_irq: %d\n", err);
}
dev_info(dev, "ThunderX GPIO: %d lines with base %d.\n", dev_info(dev, "ThunderX GPIO: %d lines with base %d.\n",
ngpio, chip->base); ngpio, chip->base);
return 0; return 0;
...@@ -545,10 +596,10 @@ static void thunderx_gpio_remove(struct pci_dev *pdev) ...@@ -545,10 +596,10 @@ static void thunderx_gpio_remove(struct pci_dev *pdev)
struct thunderx_gpio *txgpio = pci_get_drvdata(pdev); struct thunderx_gpio *txgpio = pci_get_drvdata(pdev);
for (i = 0; i < txgpio->chip.ngpio; i++) for (i = 0; i < txgpio->chip.ngpio; i++)
irq_domain_pop_irq(txgpio->chip.irq.domain, irq_domain_pop_irq(txgpio->irqd,
txgpio->msix_entries[i].vector); txgpio->msix_entries[i].vector);
irq_domain_remove(txgpio->chip.irq.domain); irq_domain_remove(txgpio->irqd);
pci_set_drvdata(pdev, NULL); pci_set_drvdata(pdev, NULL);
} }
......
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